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Dinesh P. Mehta
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2020 – today
- 2024
- [c18]Akshit Sharma
, Dinesh P. Mehta
Understanding High-Performance Subgraph Pattern Matching: A Systems Perspective. GRADES/NDA 2024: 1:1-1:12 - 2020
- [j28]Sara Bourbour, Dinesh P. Mehta
Improved methods to compare distance metrics in networks using uniform random spanning trees (DIMECOST). Networks 76(3): 402-413 (2020)
2010 – 2019
- 2019
- [j27]Christopher Richards, Dinesh P. Mehta
Navigating free-floating minefields via time-varying Voronoi graphs. Networks 73(2): 254-274 (2019) - [c17]Dinesh P. Mehta
AlgoBOWL: A Competition-Based Group Project for Algorithms Courses. ITiCSE 2019: 471-477 - 2018
- [c16]Daniel Mawhirter, Bo Wu, Dinesh P. Mehta
ApproxG: Fast Approximate Parallel Graphlet Counting Through Accuracy Control. CCGrid 2018: 533-542 - 2016
- [j26]Dinesh P. Mehta
Chemical Kinetics: A CS Perspective. Comput. Sci. Eng. 18(5): 48-55 (2016) - [j25]Dheivya Thiagarajan, Dinesh P. Mehta
Faster Algorithms for Isomer Network Generation. J. Chem. Inf. Model. 56(12): 2310-2319 (2016) - 2015
- [j24]Tina M. Kouri, Daniel Pascua, Dinesh P. Mehta
Random Models and Analyses for Chemical Graphs. Int. J. Found. Comput. Sci. 26(2): 269- (2015) - 2014
- [j23]Tina M. Kouri, Mahendra Awale, James K. Slyby, Jean-Louis Reymond
"Social" Network of Isomers Based on Bond Count Distance: Algorithms. J. Chem. Inf. Model. 54(1): 57-68 (2014) - [j22]Shantanu Dutt, Dinesh P. Mehta
New Algorithmic Techniques for Complex EDA Problems. VLSI Design 2014: 134946:1-134946:2 (2014) - 2013
- [j21]Tina M. Kouri, Dinesh P. Mehta
Faster reaction mapping through improved naming techniques. ACM J. Exp. Algorithmics 18 (2013) - [j20]Dinesh P. Mehta
Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs. VLSI Design 2013: 249592:1-249592:13 (2013) - 2012
- [c15]Dinesh P. Mehta
Forming project groups while learning about matching and network flows in algorithms. ITiCSE 2012: 40-45 - 2011
- [j19]S. Andrew Johnson, Dinesh P. Mehta
Identifying algorithmic vulnerabilities through simulated annealing. Optim. Lett. 5(3): 479-490 (2011) - [c14]Tina M. Kouri, Dinesh P. Mehta:
Improved Automated Reaction Mapping. SEA 2011: 157-168 - 2010
- [j18]John D. Crabtree, Dinesh P. Mehta
An Open-Source Java Platform for Automated Reaction Mapping. J. Chem. Inf. Model. 50(9): 1751-1756 (2010)
2000 – 2009
- 2008
- [j17]John D. Crabtree, Dinesh P. Mehta
Automated reaction mapping. ACM J. Exp. Algorithmics 13 (2008) - [e2]Charles J. Alpert, Dinesh P. Mehta
Handbook of Algorithms for Physical Design Automation. Auerbach Publications 2008, ISBN 978-0-8493-7242-1 [contents] - [r6]Charles J. Alpert, Dinesh P. Mehta
Introduction to Physical Design. Handbook of Algorithms for Physical Design Automation 2008 - [r5]Dinesh P. Mehta
Recent Advancesin Floorplanning. Handbook of Algorithms for Physical Design Automation 2008 - [r4]Dinesh P. Mehta
Basic Data Structures. Handbook of Algorithms for Physical Design Automation 2008 - 2006
- [j16]Yan Feng, Dinesh P. Mehta
Module relocation to obtain feasible constrained floorplans. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 856-866 (2006) - [c13]Yan Feng, Dinesh P. Mehta
Heterogeneous Floorplanning for FPGAs. VLSI Design 2006: 257-262 - 2004
- [j15]Sahar A. Idwan
Fast Pursuit Of Mobile Nodes Using TPR Trees. Int. J. Found. Comput. Sci. 15(5): 753-772 (2004) - [j14]Yan Feng, Dinesh P. Mehta
Constrained floorplanning using network flows. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(4): 572-580 (2004) - [j13]Brad Williams, Dinesh P. Mehta
Predictive Models to Rebroadcast in Mobile Ad Hoc Networks. IEEE Trans. Mob. Comput. 3(3): 295-303 (2004) - [c12]Yan Feng, Dinesh P. Mehta
Constrained Floorplanning with Whitespace. VLSI Design 2004: 969-974 - [c11]Kun Gao, Dinesh P. Mehta
Floorplan Classification Algorithms. VLSI Design 2004: 975-980 - [e1]Dinesh P. Mehta
Handbook of Data Structures and Applications. Chapman and Hall/CRC 2004, ISBN 978-1-58488-435-4 [contents] - [r3]Dinesh P. Mehta
Basic Structures. Handbook of Data Structures and Applications 2004 - [r2]Dinesh P. Mehta
Trees. Handbook of Data Structures and Applications 2004 - [r1]Dinesh P. Mehta
Layout Data Structures. Handbook of Data Structures and Applications 2004 - 2003
- [c10]Dinesh P. Mehta
Optimal coverage paths in ad-hoc sensor networks. ICC 2003: 507-511 - [c9]Yan Feng, Dinesh P. Mehta
Constrained "Modern" Floorplanning. ISPD 2003: 128-135 - 2002
- [j12]Krishna M. Kavi, Dinesh P. Mehta
Mutual Exclusion on Optical Buses. Parallel Process. Lett. 12(3-4): 341-358 (2002) - [j11]Dinesh P. Mehta
Decision tree approximations of Boolean functions. Theor. Comput. Sci. 270(1-2): 609-623 (2002) - 2001
- [j10]Swanwa Liao, Mario Alberto López, Dinesh P. Mehta
Constrained polygon transformations for incremental floorplanning. ACM Trans. Design Autom. Electr. Syst. 6(3): 322-342 (2001) - 2000
- [j9]Dinesh P. Mehta
On the use of flexible, rectilinear blocks to obtain minimum-area floorplans in mixed block and cell designs. ACM Trans. Design Autom. Electr. Syst. 5(1): 82-97 (2000) - [c8]Dinesh P. Mehta, Vijay Raghavan:
Decision Tree Approximations of Boolean Functions. COLT 2000: 16-24
1990 – 1999
- 1998
- [j8]Dinesh P. Mehta, Erica D. Wilson:
Parallel algorithms for corner stitching. Concurr. Pract. Exp. 10(15): 1317-1341 (1998) - [j7]Dinesh P. Mehta
Estimating the storage requirements of the rectangular and L-shaped corner stitching data structures. ACM Trans. Design Autom. Electr. Syst. 3(2): 272-284 (1998) - [j6]Dinesh P. Mehta
CLOTH MEASURE: A Software Tool for Estimating the Memory Requirements of Corner Stitching Data Structures. VLSI Design 7(4): 425-436 (1998) - 1997
- [j5]Dinesh P. Mehta
Models, techniques, and algorithms for finding, selecting, and displaying patterns in strings and other discrete objects. J. Syst. Softw. 39(3): 201-221 (1997) - [j4]Dinesh P. Mehta
Corner stitching for simple rectilinear shapes [VLSI layouts]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(2): 186-198 (1997) - [c7]Dinesh P. Mehta
T3: Physical Design. VLSI Design 1997: 3 - 1996
- [j3]Mario Alberto López, Dinesh P. Mehta
Efficient decomposition of polygons into L-shapes with application to VLSI layouts. ACM Trans. Design Autom. Electr. Syst. 1(3): 371-395 (1996) - [c6]Dinesh P. Mehta
A Minimum-Area Floorplanning Algorithm for MBC Designs. Great Lakes Symposium on VLSI 1996: 56-59 - [c5]Mario Alberto López, Dinesh P. Mehta
Partitioning Algorithms for Corner Stitching. Great Lakes Symposium on VLSI 1996: 200- - 1994
- [j2]Dinesh P. Mehta
Computing Display Conflicts in String Visualization. IEEE Trans. Computers 43(3): 350-361 (1994) - [c4]Dinesh P. Mehta
Estimating the storage requirements of the rectangular and L-shaped corner stitching data structures. Great Lakes Symposium on VLSI 1994: 34-37 - 1993
- [j1]Dinesh P. Mehta
A Data Structure for Circular String Analysis and Visualization. IEEE Trans. Computers 42(8): 992-997 (1993) - [c3]George Blust, Dinesh P. Mehta
Corner stitching for L-shaped tiles. Great Lakes Symposium on VLSI 1993: 67-68 - 1992
- [c2]Dinesh P. Mehta, Sartaj Sahni:
Computing Display Conflicts in String and Circular String Visualization. CPM 1992: 244-261 - [c1]Dinesh P. Mehta
Models and techniques for the visualization of labeled discrete objects. SAC 1992: 1224-1233
Coauthor Index
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