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Michio Yokoyama
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2020 – today
- 2024
- [c9]Tomochika Harada, Michio Yokoyama:
A Development and Evaluation of the IoT Activity Tracking System for the Daily Activity. GCCE 2024: 335-337 - 2023
- [c8]Tomochika Harada, Michio Yokoyama:
The Pillow-Type Unrestrained Heart Rate Measurement System for Sleep-State Analysis. GCCE 2023: 338-340 - [c7]Tomochika Harada, Michio Yokoyama, Shigeyuki Seko, Makoto Shohara, Ryosuke Takahashi, Satoru Miyoshi, Daisuke Yoshida:
Stress Data Collection and Analysis using "MindScale" for Stress Visualization. GCCE 2023: 754-756 - [c6]Michio Yokoyama
, Tomochika Harada, Shigeyuki Seko, Makoto Shohara
Stress Data Collection and Analysis Using "Mind Scale" with the Post-Covid World. ICCE 2023: 1-3 - 2021
- [c5]Roberto Andrino Robles, Tomochika Harada, Michio Yokoyama
Evaluation of a Filter-less AD-PLL with a Wide Input Frequency Range Using a Fast-Locking Algorithm. ICECS 2021: 1-6 - 2020
- [j9]Minami Tsuchiya
Changing Tendency Analysis of Sleep Quality on the Basis of Temperature and Respiratory Frequency Using a Neural Network Model. Int. J. Fuzzy Log. Intell. Syst. 20(2): 87-95 (2020)
2010 – 2019
- 2018
- [j8]Fumio Sato, Michio Yokoyama
Flexible and Printable Phase Shifter with Polymer Actuator for 12-GHz Band. IEICE Trans. Electron. 101-C(10): 767-774 (2018) - [j7]Seung-Il Cho
Estimation System of Blood Pressure Variation with Photoplethysmography Signals Using Multiple Regression Analysis and Neural Network. Int. J. Fuzzy Log. Intell. Syst. 18(4): 229-236 (2018) - 2015
- [j6]Yasuhiro Takahashi
SPICE model of memristive device using Tukey window function. IEICE Electron. Express 12(5): 20150149 (2015) - 2013
- [j5]Seung-Il Cho
Design of low-power clock generator synchronized with AC power for adiabatic dynamic CMOS logic. IEICE Electron. Express 10(20): 20130716 (2013) - 2012
- [j4]Seung-Il Cho
Design of the ultra low-power synchronizer using ADCL buffer for adiabatic logic. IEICE Electron. Express 9(20): 1576-1585 (2012) - [c4]Yasuhiro Takahashi
2PCDAL: Two-phase clocking dual-rail adiabatic logic. APCCAS 2012: 124-127 - [c3]Yasuhiro Takahashi
Power-saving analysis of adiabatic logic in subthreshold region. ISPACS 2012: 590-594
2000 – 2009
- 2007
- [j3]Yasuhiro Takahashi
A 70 MHz Multiplierless FIR Hilbert Transformer in 0.35 µm Standard CMOS Library. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(7): 1376-1383 (2007) - [j2]Yasuhiro Takahashi, Toshikazu Sekine, Michio Yokoyama:
VLSI Implementation of a 4 x 4-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic. IEICE Trans. Electron. 90-C(10): 2002-2006 (2007) - 2006
- [c2]Yasuhiro Takahashi
2PADCL: Two Phase drive Adiabatic Dynamic CMOS Logic. APCCAS 2006: 1484-1487 - 2005
- [c1]Yasuhiro Takahashi
New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination. ISCAS (2) 2005: 1445-1448 - 2003
- [j1]Yasuhiro Takahashi, Kei-ichi Konta, Kazukiyo Takahashi, Michio Yokoyama, Kazuhiro Shouno, Mitsuru Mizunuma:
Carry Propagation Free Adder/Subtracter Using Adiabatic Dynamic CMOS Logic Circuit Technology. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(6): 1437-1444 (2003)
Coauthor Index
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last updated on 2024-12-13 19:07 CET by the dblp team
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