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"A Configurable Parallel Hardware Architecture for Efficient Integral ..."

Shouyi Yin et al. (2016)

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DOI: 10.1109/TVLSI.2015.2462752

access: closed

type: Journal Article

metadata version: 2020-03-27

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  - https://dblp.org/rec/journals/tvlsi/YinOCLW16
Shouyi Yin, Peng Ouyang, Tianbao Chen, Leibo Liu, Shaojun Wei:
A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1305-1318 (2016)

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