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"Automatic Verification of Sequential Circuits Using Temporal Logic."

Michael C. Browne et al. (1986)

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DOI: 10.1109/TC.1986.1676711

access: closed

type: Journal Article

metadata version: 2017-05-20

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  dblp key:
  - journals/tc/BrowneCDM86
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  persistent URL:
  - https://dblp.org/rec/journals/tc/BrowneCDM86
Michael C. Browne, Edmund M. Clarke, David L. Dill, Bud Mishra:
Automatic Verification of Sequential Circuits Using Temporal Logic. IEEE Trans. Computers 35(12): 1035-1044 (1986)

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