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"Practical VHDL optimization for timing critical FPGA applications."

Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen (1999)

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DOI: 10.1016/S0141-9331(99)00062-9

access: closed

type: Journal Article

metadata version: 2020-02-22

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  - https://dblp.org/rec/journals/mam/KuusilinnaHS99
Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen:
Practical VHDL optimization for timing critical FPGA applications. Microprocess. Microsystems 23(8-9): 459-469 (1999)

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