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"A 1.5-Gb/s adaptive equalizer with periodically embedded clock encoding ..."

Chia-Chi Liu, Ching-Yuan Yang (2017)

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DOI: 10.1109/ISOCC.2017.8368877

access: closed

type: Conference or Workshop Paper

metadata version: 2018-06-15

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Chia-Chi Liu, Ching-Yuan Yang:
A 1.5-Gb/s adaptive equalizer with periodically embedded clock encoding for intra-panel interfaces. ISOCC 2017: 248-249

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