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"Combinational equivalence checking for threshold logic circuits."

Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod (2007)

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DOI: 10.1145/1228784.1228813

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod:
Combinational equivalence checking for threshold logic circuits. ACM Great Lakes Symposium on VLSI 2007: 102-107

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