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"Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm ..."

Hikaru Tamura et al. (2014)

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DOI: 10.1109/COOLCHIPS.2014.6842955

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
  - conf/coolchips/TamuraKIOUOOKYI14
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  persistent URL:
  - https://dblp.org/rec/conf/coolchips/TamuraKIOUOOKYI14
Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki:
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. COOL Chips 2014: 1-3

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