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"A soft-error hardened latch scheme for SoC in a 90 nm technology and beyond."

Yoshihide Komatsu et al. (2004)

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DOI: 10.1109/CICC.2004.1358812

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-21

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  - https://dblp.org/rec/conf/cicc/KomatsuAFYI04
Yoshihide Komatsu, Yukio Arima, Tetsuya Fujimoto, Takahiro Yamashita, Koichiro Ishibashi:
A soft-error hardened latch scheme for SoC in a 90 nm technology and beyond. CICC 2004: 329-332

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