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"High voltage tolerant ESD design for analog applications in deep submicron ..."

Chung-Hui Chen et al. (2002)

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DOI: 10.1109/CICC.2002.1012773

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-04

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Chung-Hui Chen, Yean-Kuen Fang, Chien-Chun Tsai, Shen Tu, Mark K. L. Chen, Mi-Chang Chang:
High voltage tolerant ESD design for analog applications in deep submicron CMOS technologies. CICC 2002: 89-92

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