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Danil Sokolov
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2020 – today
- 2024
- [c49]Alex Chan
, Danil Sokolov, Victor Khomenko, Alex Yakovlev:
Bridging the Design Methodologies of Burst-Mode Specifications and Signal Transition Graphs. ASPDAC 2024: 734-739 - 2023
- [j16]Alex Chan
Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1560-1573 (2023) - 2022
- [c48]Alex Chan
Formal Modelling of Burst-Mode Specifications in a Distributed Environment. FDL 2022: 1-8 - 2021
- [c47]Alex Chan
Synthesis of SI Circuits from Burst-Mode Specifications. DATE 2021: 366-369 - 2020
- [j15]Danil Sokolov
Automating the Design of Asynchronous Logic Control for AMS Electronics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(5): 952-965 (2020) - [j14]Alessandro de Gennaro
Design and Implementation of Reconfigurable Asynchronous Pipelines. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1527-1539 (2020) - [c46]Victor Khomenko, Danil Sokolov, Alex Yakovlev, David Lloyd:
Handshake Verification in WORKCRAFT. ASYNC 2020: 63-64 - [c45]Thanasin Bunnam
Empirical Temperature Model of Self-Directed Channel Memristor. IEEE SENSORS 2020: 1-4 - [c44]Thanasin Bunnam, Ahmed Soltan, Danil Sokolov, Alex Yakovlev, Oleg V. Maevsky:
Toward Designing Thermally-Aware Memristance Decoder. ISCAS 2020: 1
2010 – 2019
- 2019
- [j13]Adrian Wheeldon
Self-timed, minimum latency circuits for the internet of things. Integr. 69: 138-146 (2019) - [j12]Thanasin Bunnam
Toward Designing Thermally-Aware Memristance Decoder. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(11): 4337-4347 (2019) - [c43]Stanislavs Golubcovs, Andrey Mokhov, Alex Bystrov
Generalised Asynchronous Arbiter. ACSD 2019: 3-12 - [c42]Alberto Moreno
Synthesis from Waveform Transition Graphs. ASYNC 2019: 60-67 - 2018
- [j11]Issa Qiqieh
Significance-Driven Logic Compression for Energy-Efficient Multiplier Design. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 417-430 (2018) - [j10]Jonathan Beaumont
High-Level Asynchronous Concepts at the Interface Between Analog and Digital Worlds. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 61-74 (2018) - [c41]Danil Sokolov, Victor Khomenko, Alex Yakovlev, David Lloyd:
Design and Verification of Speed-Independent Circuits with Arbitration in Workcraft. ASYNC 2018: 30-31 - [c40]Oyinkuro Benafa, Danil Sokolov, Alex Yakovlev:
Loadable Kessels Counter. ASYNC 2018: 102-109 - [c39]Danil Sokolov, Alessandro de Gennaro, Andrey Mokhov:
Reconfigurable asynchronous pipelines: From formal models to silicon. DATE 2018: 1562-1567 - [c38]Thanasin Bunnam
An Excitation Time Model for General-purpose Memristance Tuning Circuit. ISCAS 2018: 1-5 - 2017
- [j9]Frank P. Burns
A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 938-951 (2017) - [c37]Victor Khomenko, Andrey Mokhov, Danil Sokolov, Alex Yakovlev:
Formal Design and Verification of an Asynchronous SRAM Controller. ACSD 2017: 59-67 - [c36]Victor Khomenko, Danil Sokolov, Andrey Mokhov, Alex Yakovlev:
WAITX: An Arbiter for Non-persistent Signals. ASYNC 2017: 33-40 - [c35]Johnson Fernandes, Danil Sokolov, Alex Yakovlev:
Elastic Bundles: Modelling and Synthesis of Asynchronous Circuits with Granular Rigidity. ASYNC 2017: 57-64 - [c34]Jordi Cortadella, Alberto Moreno
Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours. ASYNC 2017: 73-74 - [c33]Vladimir Dubikhin, Chris J. Myers, Danil Sokolov, Ioannis Syranidis, Alexandre Yakovlev:
Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems: Invited. DAC 2017: 36:1-36:6 - [c32]Issa Qiqieh
Energy-efficient approximate multiplier design using bit significance-driven logic compression. DATE 2017: 7-12 - [c31]Danil Sokolov, Vladimir Dubikhin, Victor Khomenko, David Lloyd, Andrey Mokhov, Alex Yakovlev:
Benefits of asynchronous control for analog electronics: Multiphase buck case study. DATE 2017: 1751-1756 - [c30]Sergey Mileiko, Alexander Kushnerov
Self-timed control of multiphase switched capacitor converters. ECCTD 2017: 1-4 - [c29]Andrey Mokhov, Danil Sokolov, Victor Khomenko, Alex Yakovlev:
Asynchronous Arbitration Primitives for New Generation of Circuits and Systems. NGCAS 2017: 81-84 - [c28]Thanasin Bunnam
Pulse controlled memristor-based delay element. PATMOS 2017: 1-8 - [c27]Adrian Wheeldon
Power proportional adder design for Internet of Things in a 65 nm process. PATMOS 2017: 1-6 - [c26]Issa Qiqieh
Energy-efficient approximate wallace-tree multiplier using significance-driven logic compression. SiPS 2017: 1-6 - 2016
- [j8]Vladimir Dubikhin
Design of Mixed-Signal Systems With Asynchronous Control. IEEE Des. Test 33(5): 44-55 (2016) - [c25]Mahdi Jelodari Mamaghani, Danil Sokolov, Jim D. Garside:
Asynchronous Dataflow De-Elastisation for Efficient Heterogeneous Synthesis. ACSD 2016: 104-113 - 2015
- [j7]Johnson Fernandes, Maciej Koutny, Lukasz Mikulski
Persistent and Nonviolent Steps and the Design of GALS Systems. Fundam. Informaticae 137(1): 143-170 (2015) - [c24]Danil Sokolov, Victor Khomenko, Andrey Mokhov, Alex Yakovlev
Design and Verification of Speed-Independent Multiphase Buck Controller. ASYNC 2015: 29-36 - [c23]Andrey Mokhov, Victor Khomenko, Danil Sokolov, Alex Yakovlev
Opportunistic Merge Element. ASYNC 2015: 116-123 - [c22]Hubin Zhao
A CMOS-based neural implantable optrode for optogenetic stimulation and electrical recording. BioCAS 2015: 1-4 - [c21]Frank P. Burns, Danil Sokolov, Alexandre Yakovlev:
GALS synthesis and verification for xMAS models. DATE 2015: 1419-1424 - [c20]Nabeel Fattah, Soumyasanta Laha, Danil Sokolov, Graeme Chester, Patrick Degenaar:
Wireless data and power transfer of an optogenetic implantable visual cortex stimulator. EMBC 2015: 8006-8009 - [c19]Jonathan Beaumont, Andrey Mokhov, Danil Sokolov, Alex Yakovlev
Compositional design of asynchronous circuits from behavioural concepts. MEMOCODE 2015: 118-127 - 2014
- [j6]Andrey Mokhov, Alexei Iliasov, Danil Sokolov, Maxim Rykunov, Alex Yakovlev
Synthesis of Processor Instruction Sets from High-Level ISA Specifications. IEEE Trans. Computers 63(6): 1552-1566 (2014) - [c18]Danil Sokolov, Alex Yakovlev
GALS Partitioning by Behavioural Decoupling Expressed in Petri Nets. ASYNC 2014: 17-26 - [c17]Hubin Zhao
An implantable optrode with Self-diagnostic function in 0.35µm CMOS for optical neural stimulation. BioCAS 2014: 244-247 - [c16]Alex Iliasov, Arseniy Alekseyev, Danil Sokolov, Andrey Mokhov:
Design of safety critical systems by refinement. DATE 2014: 1-4 - 2013
- [c15]Johnson Fernandes, Maciej Koutny, Marta Pietkiewicz-Koutny, Danil Sokolov, Alex Yakovlev
Step Persistence in the Design of GALS Systems. Petri Nets 2013: 190-209 - [c14]Maxim Rykunov, Andrey Mokhov, Danil Sokolov, Alex Yakovlev
Design-for-adaptivity of microarchitectures. ASAP 2013: 314-320 - 2012
- [j5]Fei Xia, Andrey Mokhov, Yu Zhou, Yifan Chen, Isi Mitrani, Delong Shang, Danil Sokolov, Alexandre Yakovlev
Towards power-elastic systems through concurrency management. IET Comput. Digit. Tech. 6(1): 33-42 (2012) - [c13]Andrey Mokhov, Victor Khomenko, Danil Sokolov, Alex Yakovlev
On Dual-Rail Control Logic for Enhanced Circuit Robustness. ACSD 2012: 112-121 - [c12]Andrey Mokhov, Danil Sokolov, Alex Yakovlev
Adapting Asynchronous Circuits to Operating Conditions by Logic Parametrisation. ASYNC 2012: 17-24 - 2011
- [c11]Andrey Mokhov, Danil Sokolov, Maxim Rykunov, Alex Yakovlev
Formal modelling and transformations of processor instruction sets. MEMOCODE 2011: 51-60
2000 – 2009
- 2008
- [j4]Danil Sokolov, Ivan Poliakov, Alexandre Yakovlev:
Analysis of Static Data Flow Structures. Fundam. Informaticae 88(4): 581-610 (2008) - [c10]Ivan Poliakov, Andrey Mokhov, Ashur Rafiev, Danil Sokolov, Alex Yakovlev
Automated Verification of Asynchronous Circuits Using Circuit Petri Nets. ASYNC 2008: 161-170 - [c9]Ashur Rafiev, Julian P. Murphy, Danil Sokolov, Alexandre Yakovlev
Conversion driven design of binary to mixed radix circuits. ICCD 2008: 410-415 - 2007
- [j3]Danil Sokolov, Alexandre V. Bystrov
Direct Mapping of Low-Latency Asynchronous Controllers From STGs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6): 993-1009 (2007) - [j2]Delong Shang, Alexandre Yakovlev
Registers for Phase Difference Based Logic. IEEE Trans. Very Large Scale Integr. Syst. 15(6): 720-724 (2007) - [c8]Danil Sokolov, Ivan Poliakov, Alexandre Yakovlev
Asynchronous Data Path Models. ACSD 2007: 197-210 - [c7]Ivan Poliakov, Danil Sokolov, Andrey Mokhov:
Workcraft: A Static Data Flow Structure Editing, Visualisation and Analysis Tool. ICATPN 2007: 505-514 - 2006
- [c6]Yu Zhou, Danil Sokolov, Alexandre Yakovlev
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement. ICCAD 2006: 158-163 - [c5]Deepali Koppad
Online Testing by Protocol Decomposition. IOLTS 2006: 263-268 - 2005
- [j1]Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov
Design and Analysis of Dual-Rail Circuits for Security Applications. IEEE Trans. Computers 54(4): 449-460 (2005) - 2004
- [c4]Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov
Improving the Security of Dual-Rail Circuits. CHES 2004: 282-297 - [c3]Delong Shang, Frank P. Burns, Alexandre V. Bystrov
A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits. PATMOS 2004: 471-480 - 2003
- [c2]Alexandre V. Bystrov
Low-Latency Contro Structures with Slack. ASYNC 2003: 164-173 - [c1]Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev:
STG Optimisation in the Direct Mapping of Asynchronous Circuits . DATE 2003: 10932-10939
Coauthor Index
aka: Alex Yakovlev
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