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Yajun Ran
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2000 – 2009
- 2007
- [c9]Darsun Tsiena, Chien Kuo Wang, William W. J. Wang, Yajun Ran, Philippe Hurat, Nishath Verghese:
Context-specific leakage and delay analysis of a 65nm standard cell library for lithography-induced variability. SoCC 2007: 261-268 - 2006
- [j4]Yajun Ran, Malgorzata Marek-Sadowska:
Designing via-configurable logic blocks for regular fabric. IEEE Trans. Very Large Scale Integr. Syst. 14(1): 1-14 (2006) - [j3]Yajun Ran, Malgorzata Marek-Sadowska:
Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics. IEEE Trans. Very Large Scale Integr. Syst. 14(9): 998-1009 (2006) - 2005
- [j2]Kai Wang, Yajun Ran, Hailin Jiang, Malgorzata Marek-Sadowska:
General skew constrained clock network sizing based on sequential linear programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(5): 773-782 (2005) - [j1]Yajun Ran, Alex Kondratyev, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska:
Eliminating false positives in crosstalk noise analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9): 1406-1419 (2005) - [c8]Yajun Ran, Malgorzata Marek-Sadowska:
Via-configurable routing architectures and fast design mappability estimation for regular fabrics. ICCAD 2005: 25-32 - 2004
- [c7]Yajun Ran, Malgorzata Marek-Sadowska:
Designing a via-configurable regular fabric. CICC 2004: 423-426 - [c6]Yajun Ran, Malgorzata Marek-Sadowska:
On designing via-configurable cell blocks for regular fabrics. DAC 2004: 198-203 - [c5]Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Malgorzata Marek-Sadowska:
Eliminating False Positives in Crosstalk Noise Analysis. DATE 2004: 1192-1197 - [c4]Yajun Ran, Malgorzata Marek-Sadowska:
An integrated design flow for a via-configurable gate array. ICCAD 2004: 582-589 - [c3]Yajun Ran, Malgorzata Marek-Sadowska:
The Magic of a Via-Configurable Regular Fabric. ICCD 2004: 338-343 - 2003
- [c2]Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska:
Temporofunctional crosstalk noise analysis. DAC 2003: 860-863 - [c1]Yajun Ran, Malgorzata Marek-Sadowska:
Crosstalk noise in FPGAs. DAC 2003: 944-949
Coauthor Index
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