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Kazuhiko Endo
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2020 – today
- 2020
- [j6]Chuan Xu, Seshadri K. Kolluri, Kazuhiko Endo
, Kaustav Banerjee
Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 277 (2020) - [c13]Wataru Mizubayashi, Hiroshi Oka, Koichi Fukuda, Yuki Ishikawa, Kazuhiko Endo
Analysis of charge-to-hot-carrier degradation in Ge pFinFETs. IRPS 2020: 1-4
2010 – 2019
- 2019
- [c12]Kazuhiko Endo
Post-Si Nano Device Technology. ASICON 2019: 1 - 2017
- [c11]Kazuhiko Endo
Advanced FinFET technologies for boosting SRAM performance. ASICON 2017: 1141-1144 - 2015
- [c10]Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo
PBTI for N-type tunnel FinFETs. ICICDT 2015: 1-4 - 2014
- [c9]Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo
Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance. ESSDERC 2014: 182-185 - [c8]Shinji Migita, Takashi Matsukawa, Takahiro Mori, Koichi Fukuda, Yukinori Morita, Wataru Mizubayashi, Kazuhiko Endo
Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration. ESSDERC 2014: 278-281 - 2013
- [j5]Kazuhiko Endo
Independent-Double-Gate FinFET SRAM Technology. IEICE Trans. Electron. 96-C(4): 413-423 (2013) - [j4]Chuan Xu, Seshadri K. Kolluri, Kazuhiko Endo
Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(7): 1045-1058 (2013) - [c7]Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo
Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations. ESSDERC 2013: 45-48 - [c6]Wataru Mizubayashi, Koichi Fukuda, Takahiro Mori, Kazuhiko Endo
Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes. ESSDERC 2013: 202-205 - 2012
- [j3]Shin-ichi O'Uchi
A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology. IEICE Trans. Electron. 95-C(4): 686-695 (2012) - [j2]Hideo Sakai, Shin-ichi O'Uchi
High-Frequency Precise Characterization of Intrinsic FinFET Channel. IEICE Trans. Electron. 95-C(4): 752-760 (2012) - 2010
- [c5]Shin-ichi O'Uchi, Kazuhiko Endo
Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET. CICC 2010: 1-4 - [c4]Shin-ichi O'Uchi, Kazuhiko Endo
0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits. ESSCIRC 2010: 474-477 - [c3]Seid Hadi Rasouli, Kazuhiko Endo
Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design. ICCAD 2010: 714-720
2000 – 2009
- 2009
- [c2]Seid Hadi Rasouli, Kazuhiko Endo
Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization. ICCAD 2009: 505-512 - 2008
- [j1]Shin-ichi O'Uchi
FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction. IEICE Trans. Electron. 91-C(4): 534-542 (2008) - 2007
- [c1]Shin-ichi O'Uchi
Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology. CICC 2007: 33-36
Coauthor Index
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