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Shinji Migita
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2010 – 2019
- 2015
- [c6]Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shin-ichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara:
PBTI for N-type tunnel FinFETs. ICICDT 2015: 1-4 - 2014
- [c5]Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin-ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota:
Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance. ESSDERC 2014: 182-185 - [c4]Shinji Migita, Takashi Matsukawa, Takahiro Mori, Koichi Fukuda, Yukinori Morita, Wataru Mizubayashi, Kazuhiko Endo, Yongxun Liu, Shin-ichi O'Uchi, Meishoku Masahara, Hiroyuki Ota:
Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration. ESSDERC 2014: 278-281 - 2013
- [c3]Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin-ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota:
Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations. ESSDERC 2013: 45-48 - [c2]Wataru Mizubayashi, Koichi Fukuda, Takahiro Mori, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Shin-ichi O'Uchi, Yuki Ishikawa, Shinji Migita, Yukinori Morita, Akihito Tanabe, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara, Hiroyuki Ota:
Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes. ESSDERC 2013: 202-205 - 2012
- [c1]Yukinori Morita, Shinji Migita, Wataru Mizubayashi, Meishoku Masahara, Hiroyuki Ota:
Two-step annealing effects on ultrathin EOT higher-k (k = 40) ALD-HfO2 gate stacks. ESSDERC 2012: 81-84
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