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Sridhar Narayanan
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2010 – 2019
- 2017
- [c11]Sandeep Gupta, Miron Abramovici, Magdy Abadir, Sridhar Narayanan:
Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test. VTS 2017: 1 - 2015
- [j6]Sridhar Narayanan, Kirthi Kalyanam:
Position Effects in Search Advertising and their Moderators: A Regression Discontinuity Approach. Mark. Sci. 34(3): 388-407 (2015) - 2011
- [j5]Wesley R. Hartmann, Harikesh S. Nair, Sridhar Narayanan:
Identifying Causal Marketing Mix Effects Using a Regression Discontinuity Design. Mark. Sci. 30(6): 1079-1097 (2011)
2000 – 2009
- 2009
- [j4]Sridhar Narayanan, Puneet Manchanda:
Heterogeneous Learning and the Targeting of Marketing Communication for New Products. Mark. Sci. 28(3): 424-441 (2009) - 2005
- [c10]Sudheendra Hangal, Naveen Chandra, Sridhar Narayanan, Sandeep Chakravorty:
IODINE: a tool to automatically infer dynamic invariants for hardware designs. DAC 2005: 775-778 - 2004
- [c9]Sudheendra Hangal, Durgam Vahia, Chaiyasit Manovit, Juin-Yeu Joseph Lu, Sridhar Narayanan:
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model. ISCA 2004: 114-123 - 2002
- [j3]Georgios K. Konstadinidis, Kevin Normoyle, Samson Wong, Sutikshan Bhutani, Harry Stuimer, Timothy Johnson, Alan P. Smith, Daniel Y. Cheung, Fabrizio Romano, Shifeng Yu, Sung-Hun Oh, Victor Melamed, Sridhar Narayanan, David Bunsey, Cong Khieu, Kevin J. Wu, Ralf Schmitt, Andy Dumlao, Massimo Sutera, Jade Chau, K. James Lin, William S. Coates:
Implementation of a third-generation 1.1-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 37(11): 1461-1469 (2002)
1990 – 1999
- 1997
- [c8]Sridhar Narayanan, R. Srinivasan, R. P. Kunda, Marc E. Levitt, Saied Bozorgui-Nesbat:
A fault diagnosis methodology for the UltraSPARCTM-I microprocessor. ED&TC 1997: 494-500 - [c7]Sridhar Narayanan, Ashutosh Das:
An Efficient Scheme to Diagnose Scan Chains. ITC 1997: 704-713 - 1995
- [j2]Sridhar Narayanan, Melvin A. Breuer:
Reconfiguration techniques for a single scan chain. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(6): 750-765 (1995) - [c6]Marc E. Levitt, Srinivas Nori, Sridhar Narayanan, G. P. Grewal, Lynn Youngs, Anjali Jones, Greg Billus, Siva Paramanandam:
Testability, Debuggability, and Manufacturability Features of the UltraSPARCTM-I Microprocessor. ITC 1995: 157-166 - [c5]Sridhar Narayanan, Melvin A. Breuer:
Asynchronous multiple scan chain. VTS 1995: 270-276 - 1993
- [j1]Sridhar Narayanan, Rajesh Gupta, Melvin A. Breuer:
Optimal Configuring of Multiple Scan Chains. IEEE Trans. Computers 42(9): 1121-1131 (1993) - [c4]Sridhar Narayanan, Melvin A. Breuer:
Reconfigurable scan chains: a novel approach to reduce test application time. ICCAD 1993: 710-715 - 1992
- [c3]Sridhar Narayanan, Charles Njinda, Rajesh Gupta, Melvin A. Breuer:
SIESTA: a multi-facet scan design system. EURO-DAC 1992: 246-251 - [c2]Sridhar Narayanan, Rajesh Gupta, Melvin A. Breuer:
Configuring multiple scan chains for minimum test time. ICCAD 1992: 4-8 - [c1]Sridhar Narayanan, Charles Njinda, Melvin A. Breuer:
Optimal Sequencing of Scan Registers. ITC 1992: 293-302
Coauthor Index
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