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Michael Herz
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2000 – 2009
- 2002
- [c19]Michael Herz, Reiner W. Hartenstein, Miguel Miranda, Erik Brockmeyer, Francky Catthoor:
Memory addressing organization for stream-based reconfigurable computing. ICECS 2002: 813-817 - 2001
- [b1]Michael Herz:
High performance memory communication architectures for coarse grained reconfigurable computing systems. Kaiserslautern University of Technology, Germany, 2001, ISBN 978-3-925178-56-6, pp. 1-352 - 2000
- [c18]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array. ASP-DAC 2000: 163-168 - [c17]Michael Herz:
Agilent's Key Technologies in Remote System Management. CLUSTER 2000: 135-136 - [c16]Michael Herz:
Remote System Management Principles. CLUSTER 2000: 137-138 - [c15]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). FPGA 2000: 222 - [c14]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. FPL 2000: 389-399
1990 – 1999
- 1999
- [c13]Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann:
An Internet Based Development Framework for Reconfigurable Computing. FPL 1999: 155-164 - [c12]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Mapping Applications onto Reconfigurable Kress Arrays. FPL 1999: 385-390 - [c11]Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber:
XMDS: The Xputer Multimedia Development System. HICSS 1999 - [c10]Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber:
Interfacing the MoM-PDA to an Internet-based Development System. HICSS 1999 - 1998
- [c9]Jürgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger:
Parallelization in Co-Compilation for Configurable Accelerators. ASP-DAC 1998: 23-33 - [c8]Reiner W. Hartenstein, Michael Herz, Frank Gilbert:
Designing for Xilinx XC6200 FPGAs. FPL 1998: 29-38 - [c7]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators. FPL 1998: 189-198 - [c6]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
On Reconfigurable Co-processing Units. IPPS/SPDP Workshops 1998: 67-72 - 1997
- [c5]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
A Novel Universal Sequencer Hardware. ARCS 1997: 143-152 - [c4]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
A Novel Sequencer Hardware for Application Specific Computing. ASAP 1997: 392-401 - [c3]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
Data scheduling to increase performance of parallel accelerators. FPL 1997: 294-303 - 1996
- [c2]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger:
A Synthesis System For Bus-Based Wavefront Array Architectures. ASAP 1996: 274-283 - [c1]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger:
A Partitioning Programming Environment for a Novel Parallel Architecture. IPPS 1996: 544-548
Coauthor Index
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