Design and Fabrication of an Out of Plane Micro-Inertial Sensor

The function of a micro accelerometer depends on several performance parameters such as resolution, sensitivity and noise level. This paper presents design and fabrication of an optimized micro-machined out of plane capacitive accelerometer. The accelerometer consists of a proof mass and four folded beams fabricated on a 100 μm thick single crystal silicon (SCS) substrate using high aspect ratio reactive ion etching (RIE) process. The optimization process is carried out by the use of non-dominated sorting genetic algorithm (NSGA-II) by considering performance requirements and manufacturing process limitations, such as mask printing resolution and minimum feasible feature size in RIE process. The optimization process will present a Pareto optimal front by a set of optimal designs. In order to achieve a design with maximum conformity with the read out circuit requirements, a trade off should be made between solutions. So the limits for the electrical circuit can be changed without any new optimization process.