MAX6403BS46+全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

19-2043; Rev 1; 8/01

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

General Description

____________________________Features

The MAX6400–MAX6405 is a family of ultra-low power

microprocessor (µP) supervisory circuits used for moni-

toring battery, power-supply, and regulated system

voltages. Each device contains a precision bandgap

reference comparator and is trimmed to specified trip

threshold voltages. These devices provide excellent cir-

cuit reliability and low cost by eliminating external com-

ponents and adjustments when monitoring system

voltages from 2.5V to 5.0V. A manual reset input is also

included.

o Ultra-Small 4-Bump (2 ✕ 2) Chip-Scale Package,

(Package Pending Full Qualification—Expected

Completion Date 6/30/01. See UCSP Reliability

Section for More Details.)

o 70% Smaller Than SC70 Package

o Ultra-Low 500nA (typ) Supply Current

(MAX6400/MAX6401/MAX6402)

o Factory-Trimmed Reset Thresholds from 2.20V to

4.63V in Approximately 100mV Increments

The MAX6400–MAX6405 assert a reset signal whenev-

o

2.5% Threshold Accuracy -40ꢀC to ꢁ+5ꢀC

er the V

supply voltage falls below a preset thresh-

CC

o Factory-Set 100ms (min) Reset Timeout Period

o Manual Reset Input

old. These devices are differentiated by their output

logic configurations and preset threshold voltages. The

MAX6400/MAX6403 (push-pull) and the MAX6402/

MAX6405 (open-drain) have an active-low reset (RESET

o Guaranteed Reset Valid to V

= 1.0V

CC

o Three Reset Output Logic Options: Active-Low

Push-Pull, Active-High Push-Pull, and Active-Low

Open-Drain.

is logic low when V

is below V ). The MAX6401/

TH

CC

MAX6404 have an active-high push-pull output (RESET

is logic high when V is below V ). All parts are

CC

TH

guaranteed to be in the correct output logic state for

o Immune to Short V

Transients

CC

V

down to 1V. The reset circuit is designed to ignore

CC

o No External Components

fast transients on V . The MAX6400/MAX6401/

CC

MAX6402 have voltage thresholds between 2.20V and

3.08V in approximately 100mV increments. The

MAX6403/MAX6404/MAX6405 have voltage thresholds

between 3.30V and 4.63V in approximately 100mV

increments.

Ordering Information

PART

TEMP. RANGE

-40^oC to +85^oC

PIN-PACKAGE

MAX6400BS_ _-T

MAX6401BS_ _-T

MAX6402BS_ _-T

MAX6403BS_ _-T

MAX6404BS_ _-T

MAX6405BS_ _-T

UCSP-4

Ultra-low supply current of 500nA (MAX6400/MAX6401/

MAX6402) makes these parts ideal for use in portable

equipment. These devices are available in 4-bump

chip-scale packages (UCSP™)

UCSP-4

Applications

Portable/Battery-Powered Equipment

The MAX6400–MAX6405 are available in factory-set V reset

CC

thresholds from 2.20V to 4.63V, in approximately 0.1V incre-

ments. Choose the desired reset-threshold suffix from Table 1

and insert it in the blank space following “S”. There are 21 stan-

dard versions with a required order increment of 2500 pieces.

Sample stock is generally held on the standard versions only

(Table 1). Required order increment is 10,000 pieces for non-

standard versions (Table 2). Contact factory for availability. All

devices available in tape-and-reel only.

Cell Phones

PDAs

MP3 Players

Pagers

Selector Guide

UCSP reliability is integrally linked to the user’s assembly

methods, circuit board material, and environment. Refer to the

UCSP Reliability Notice in the UCSP Reliability section of this

data sheet for more information.

NOMINAL

(V)

RESET/RESET

OUTPUT TYPE

PART

V

TH

MAX6400

MAX6401

MAX6402

MAX6403

MAX6404

MAX6405

2.20 to 3.08

3.30 to 4.63

Push-Pull, Active-Low

Push-Pull, Active-High

Open-Drain, Active-Low

Push-Pull, Active-Low

Push-Pull, Active-High

Open-Drain, Active-Low

Pin Configuration appears at end of data sheet.

UCSP is a trademark of Maxim Integrated Products, Inc.

________________________________________________________________ Maxim Integrated Products

1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

ABSOLUTE MAXIMUM RATINGS

All voltages measured with respect to GND, unless otherwise noted.

V

...........................................................................-0.3V to +6V

Continuous Power Dissipation (T = +70°C)

CC

A

RESET, RESET (push-pull) .........................-0.3V to (V

RESET (open-drain)..................................................-0.3V to +6V

MR ..............................................................-0.3V to (V + 0.3V)

+ 0.3V)

4-Bump UCSP (derate 3.8mW/°C above +70°C).........303mW

Operating Temperature Range ..........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range ............................-65°C to +150°C

Bump Reflow Temperature .............................................+235°C

CC

Input/Output into Any Pin....................................................20mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(V

= 1.0V to 5.5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V

= 3.0V and T = +25°C.) (Note 1)

CC A

CC

A

PARAMETER

SYMBOL

CONDITIONS

= 0°C to +70°C

MIN

1.0

TYP

MAX

5.5

UNITS

T

A

Supply Voltage Range

Supply Current

V

I

V

CC

= -40°C to +85°C

MAX6400/MAX6401/MAX6402

1.2

5.5

V

= 3.0V for V ≤ 2.93V,

CC

TH

0.5

1.0

µA

= 3.2V for V ≥ 2.93V, no load

CC

TH

V

= 5.5V, no load

1.75

CC

T

= +25°C

V

- 1.5%

V V

TH TH

+ 1.5%

+ 2.5%

A

TH

Reset Threshold

V

Table 1

V

TH

= -40°C to +85°C

V

TH

- 2.5%

V

TH TH

MAX6400/MAX6401/MAX6402

MAX6403/MAX6404/MAX6405

6.3

Reset Threshold Hysteresis

Reset Threshold Tempco

mV

9.5

∆V /°C

40

ppm/°C

µs

TH

V

to Reset Delay

t

V

= (V +100mV) to (V - 100mV)

20

CC

RD

CC

TH

Reset Active Timeout Period

t

100

185

280

0.8

ms

RP

V

IL

V

> 4.0V

TH

V

2.0

IH

MR Input

V

0.2 x V

CC

IL

≤ 4.0V

V

0.7 x V

1

IH

CC

MR Minimum Input Pulse Width

MR Glitch Rejection

t

µs

ns

kΩ

MD

100

200

50

MR to Reset Delay Time

MR Pullup Resistance

25

75

2

_______________________________________________________________________________________

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

ELECTRICAL CHARACTERISTICS (continued)

(V

= 1.0V to 5.5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V

= 3.0V and T = +25°C.) (Note 1)

CC A

CC

A

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

RESET Output Voltage Low

(MAX6400/MAX6402/MAX6403/

MAX6405)

I

= 1.6mA, V

≥ 2.1V, reset asserted

0.3

SINK

CC

V

OL

I

= 100µA, V

≥ 1.2V, reset asserted

0.4

SINK

= 500µA, V

= 3.2V, MAX6400,

= 4.5V,

CC

SOURCE

CC

0.8 x V

CC

only, reset not asserted

RESET Output Voltage High

(MAX6400/MAX6403)

I

SOURCE

V

= 800µA, V

≤ 4.38V, reset not asserted

TH

V

OH

I

V

= 800µA, V

= V (max),

CC TH

SOURCE

≥ 4.5V, reset not asserted

TH

I

= 500µA, V

≥ 2.1V, reset

CC

SOURCE

asserted

OH

I

= 50µA, V

≥ 1.2V, reset

CC

SOURCE

asserted

RESET Output Voltage

(MAX6401/MAX6404)

I

= 1.2mA, V

≥ 3.2V, reset not

CC

SINK

0.3

0.4

0.1

V

asserted, MAX6401 only

I

= 3.2mA, V ≥ 4.5V, reset not

SINK

CC

V

OL

asserted, V ≤ 4.38V

TH

I

V

= 3.2mA, V

≥ 4.5V, reset not asserted

= V (max),

CC TH

SINK

TH

Open-Drain RESET Output

Leakage Current (Note 2)

RESET not asserted

µA

Note 1: Production testing done at +25°C only. Overtemperature limits are guaranteed by design and not production tested.

Note 2: Guaranteed by design.

_______________________________________________________________________________________

3

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

Typical Operating Characteristics

(T = +25°C, unless otherwise noted.)

A

POWER-DOWN RESET DELAY

vs. TEMPERATURE

SUPPLY CURRENT vs. TEMPERATURE

250

200

150

100

50

V

= OVERDRIVE VOLTAGE

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

OD

V

CC

= 5V

V

CC

= 3.3V

V

OD

= 10mV

V

OD

= 20mV

V

OD

= 100mV

= 200mV

V

CC

= 1.2V

V

OD

0

-40 -20

0

20

40

60

80

-40

-20

0

20

40

60

80

TEMPERATURE (°C)

POWER-UP RESET TIMEOUT

vs. TEMPERATURE

MAXIMUM TRANSIENT DURATION

vs. THRESHOLD OVERDRIVE

500

210

200

190

180

170

160

150

140

130

400

300

200

100

RESET/RESET IS

ASSERTED

ABOVE LINE

0

-40

-20

0

20

40

60

80

1

10

100

1000

TEMPERATURE (°C)

THRESHOLD OVERDRIVE V - V (mV)

TH

CC

4

_______________________________________________________________________________________

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

Pin Description

NAME

FUNCTION

MAX6400/MAX6402

MAX6403/MAX6405

MAX6401/MAX6404

A1

GND

Ground

Active-Low Reset Output, (Open-Drain or Push-Pull). RESET

is asserted low when the V input is below the selected

CC

B1

—

RESET

reset threshold. RESET remains low for the reset timeout

period after V

exceeds the device reset threshold. Open-

CC

drain outputs require an external pullup resistor.

Active-High Reset Output. RESET remains high while V

is

CC

—

B1

RESET

below the reset threshold and for at least 100ms after V

rises above the reset threshold.

CC

Active-Low Manual Reset. Internal 50kΩ pullup to V . Pull

CC

low to assert a reset. Reset remains asserted as long as MR

is low and for the reset timeout period after MR goes high.

B2

A2

B2

A2

MR

Leave unconnected or connect to V

if unused.

CC

V

Supply Voltage and Input for the Reset Threshold Monitor

CC

the reset active timeout period (t ) after MR returns

RP

Detailed Description

high. This input has an internal 50kΩ pullup resistor, so

it can be left open if it is not used. MR can be driven

with TTL or CMOS logic levels, or with open-drain/col-

lector outputs. Connect a normally open momentary

switch from MR to GND to create a manual reset func-

tion; external debouncing circuitry is not required. If MR

is driven from long cables or if the device is used in a

noisy environment, connect a 0.1µF capacitor from MR

to ground to provide additional noise immunity (see

Figure 1).

Reset Output

A microprocessor’s (µP’s) reset input starts the µP in a

known state. These µP supervisory circuits assert reset

to prevent code execution errors during power-up,

power-down, or brownout conditions.

RESET is guaranteed to be a logic low for V

down to

CC

1V. Once V

exceeds the reset threshold, an internal

CC

timer keeps RESET low for the reset timeout period;

after this interval, RESET goes high.

If a brownout condition occurs (V

dips below the

CC

Applications Information

Interfacing to µP with Bidirectional

Reset Pins

reset threshold), RESET goes low. Any time V

goes

CC

below the reset threshold, the internal timer resets to

zero, and RESET goes low. The internal timer starts

Since the RESET output on the MAX6402/MAX6405 is

open-drain, these devices interface easily with (µPs)

that have bidirectional reset pins. Connecting the µP

supervisor’s RESET output directly to the microcon-

troller’s (µC’s) RESET pin with a single pullup resistor

allows either device to assert reset (Figure 2).

after V

returns above the reset threshold, and RESET

CC

remains low for the reset timeout period.

The manual reset input (MR) can also initiate a reset,

see the Manual Reset Input section. The MAX6401/

MAX6404 have active-high RESET outputs that are the

inverse of the MAX6400/MAX6402/MAX6403/MAX6405

outputs (Figure 1).

Negative-Going VCC Transients

These devices are relatively immune to short-duration,

Manual Reset Input

Many µP-based products require manual reset capabil-

ity, allowing the operator, a test technician, or external

logic circuit to initiate a reset. A logic low on MR asserts

reset. Reset remains asserted while MR is low, and for

negative-going V

transients (glitches).

CC

The Typical Operating Characteristics show the

Maximum Transient Duration vs. Reset Threshold

Overdrive graph, for which reset pulses are not gener-

_______________________________________________________________________________________

5

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

V

TH

V

CC

t

RD

RP

RESET

MR

t

RP

t

MR

Figure 1. Reset Timing Diagram

ated. The graph shows the maximum pulse width that a

negative going V transient may typically have when

issuing a reset signal. As the amplitude of the transient

increases, the maximum allowable pulse width

decreases.

CC

V

CC

V

CC

Chip Information

TRANSISTOR COUNT: 512

µP

MAX6402/

MAX6405

MOTOROLA

68HCXX

PROCESS: BiCMOS

RESET

INPUT

RESET

MR

GND

Figure 2. Interfacing to µPs with Bidirectional Reset Pins

6

_______________________________________________________________________________________

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

Table 1. Factory Trimmed Reset Thresholds*

Reset Threshold Voltage, V (V)

TH

PARTS

SUFFIX

T

= +25°C

T

= -40°C to +85°C

A

MIN

TYP

MAX

2.233

2.355

2.436

2.537

2.669

2.741

2.842

2.974

3.045

3.126

3.350

3.451

3.552

3.654

3.755

3.857

3.958

4.060

4.161

4.263

4.364

4.446

4.567

4.699

MIN

MAX

22*

23*

24

2.167

2.285

2.364

2.462

2.591

2.660

2.758

2.886

2.955

3.034

3.250

3.349

3.447

3.546

3.644

3.743

3.841

3.940

4.038

4.137

4.235

4.314

4.432

4.560

2.200

2.320

2.400

2.500

2.630

2.700

2.800

2.930

3.000

3.080

3.300

3.400

3.500

3.600

3.700

3.800

3.900

4.000

4.100

4.200

4.300

4.380

4.500

4.630

2.145

2.262

2.340

2.437

2.564

2.633

2.730

2.857

2.925

3.003

3.217

3.315

3.412

3.510

3.607

3.705

3.802

3.900

3.997

4.095

4.192

4.270

4.387

4.514

2.250

2.375

2.460

2.562

2.692

2.768

2.870

3.000

3.075

3.150

3.383

3.485

3.587

3.690

3.792

3.895

3.997

4.100

4.202

4.305

4.407

4.489

4.612

4.746

25

MAX6400BS

MAX6401BS

MAX6402BS

26*

27

28

29*

30

31*

33

34

35

36

37

38

MAX6403BS

MAX6404BS

MAX6405BS

39

40

41

42

43

44*

45

46*

Factory-trimmed voltage thresholds are available in approximately 100mV increments with a 1.5% room-temperature variance.

*Note: Parts marked with an asterisk (*) are standard versions.

_______________________________________________________________________________________

7

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

Table 2. Device Marking Codes

PARTS

MAX6400BS31-T

MAX6400BS30-T

MAX6400BS29-T

MAX6400BS28-T

MAX6400BS27-T

MAX6400BS26-T

MAX6400BS25-T

MAX6400BS24-T

MAX6400BS23-T

MAX6400BS22-T

TOP MARK

AAJ

PARTS

MAX6401BS31-T

MAX6401BS30-T

MAX6401BS29-T

MAX6401BS28-T

MAX6401BS27-T

MAX6401BS26-T

MAX6401BS25-T

MAX6401BS24-T

MAX6401BS23-T

MAX6401BS22-T

TOP MARK

ABV

PARTS

MAX6402BS31-T

MAX6402BS30-T

MAX6402BS29-T

MAX6402BS28-T

MAX6402BS27-T

MAX6402BS26-T

MAX6402BS25-T

MAX6402BS24-T

MAX6402BS23-T

MAX6402BS22-T

TOP MARK

ACF

ABU

ACE

AAI

ABT

ACD

AAH

ABS

ACC

AAG

AAF

ABR

ACB

ABQ

ACA

AAE

ABP

ABZ

AAD

ABO

ABY

AAC

ABN

ABX

AAB

ABM

ABW

AAA

PARTS

MAX6403BS46-T

MAX6403BS45-T

MAX6403BS44-T

MAX6403BS43-T

MAX6403BS42-T

MAX6403BS41-T

MAX6403BS40-T

MAX6403BS39-T

MAX6403BS38-T

MAX6403BS37-T

MAX6403BS36-T

MAX6403BS35-T

MAX6403BS34-T

MAX6403BS33-T

TOP MARK

ACT

PARTS

MAX6404BS46-T

MAX6404BS45-T

MAX6404BS44-T

MAX6404BS43-T

MAX6404BS42-T

MAX6404BS41-T

MAX6404BS40-T

MAX6404BS39-T

MAX6404BS38-T

MAX6404BS37-T

MAX6404BS36-T

MAX6404BS35-T

MAX6404BS34-T

MAX6404BS33-T

TOP MARK

ADH

ADG

ADF

PARTS

MAX6405BS46-T

MAX6405BS45-T

MAX6405BS44-T

MAX6405BS43-T

MAX6405BS42-T

MAX6405BS41-T

MAX6405BS40-T

MAX6405BS39-T

MAX6405BS38-T

MAX6405BS37-T

MAX6405BS36-T

MAX6405BS35-T

MAX6405BS34-T

MAX6405BS33-T

TOP MARK

ADV

ADU

ADT

ACS

ACR

ACQ

ACP

ADE

ADS

ADD

ADC

ADB

ADR

ADQ

ADP

ACO

ACN

ACM

ACL

ADA

ADO

ADN

ADM

ADL

ACZ

ACY

ACK

ACJ

ACX

ACW

ACV

ADK

ADJ

ACI

ACH

ACG

ACU

ADI

Mechanical stress performance is a greater considera-

tion for a CSP package. CSPs are attached through

direct solder contact to the user’s PC board, foregoing

the inherent stress relief of a packaged product lead

frame. Solder joint contact integrity must be considered.

Information on Maxim’s qualification plan, test data, and

recommendations are detailed in the UCSP application

note, which can be found on Maxim’s website at

www.maxim-ic.com.

UCSP Reliability

The chip-scale package (UCSP) represents a unique

packaging form factor that may not perform equally to a

packaged product through traditional mechanical reliabil-

ity tests. CSP reliability is integrally linked to the user’s

assembly methods, circuit board material, and usage

environment. The user should closely review these areas

when considering use of a CSP package. Performance

through Operating Life Test and Moisture Resistance

remains uncompromised as it is primarily determined by

the wafer-fabrication process.

8

_______________________________________________________________________________________

µP Supervisory Circuits in 4-Bump (2 ✕ 2)

Chip-Scale Package

Package Information

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ______________________9

Printed USA

is a registered trademark of Maxim Integrated Products.

电子百科

产品导航

产品型号MAX6403BS46+T的Datasheet PDF文件预览

MAX6403BS46+相关产品..

MAX6403BS46+相关文章

IC37:专业IC行业平台