MAX6404-46UK全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

INTEGRATED CIRCUITS

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

Product data

2003 May 27

Philips

Semiconductors

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

DESCRIPTION

TheMAX6400/MAX6401//MAX6402/MAX6403/MAX6404/MAX6405

microprocessor (µP) reset circuits monitor power supplies in µP and

digital systems. These devices eliminate external components and

adjustments while providing excellent circuit reliability and low cost

solution. They are used to monitor 2.5 V, 3 V, 3.3 V and 5 V power

supplies. A manual reset input is also available.

MAX6400-MAX6405 assert a reset signal when the V supply

DD

voltage falls below a preset reset threshold voltage. The reset signal

remains asserted for at least 100 ms after the V rises above the

DD

reset threshold. The reset threshold are factory trimmable from 2.2 V

to 4.63 V in approximately 100 mV increments. All these parts are

guaranteed to assert a reset for V down to 1 V. They have

DD

excellent immunity to fast transients on V

.

DD

The devices vary in their output configuration. The

MAX6400/MAX6403 have push-pull, active-LOW reset output; while

the MAX6402/MAX6405 have open drain, active-LOW reset output.

The MAX6401/MAX6404 have push-pull, active-HIGH reset output.

The lower threshold MAX6400/MAX6401/MAX6402 have ultra-low

supply current of typically 500 nA, making them ideal for battery

powered applications. All six devices are available in the 4-bump

Chip-Scale (WL-CSP4) package.

FEATURES

APPLICATIONS

• Ultra-Low 1 µA (max) supply current

• PDAs and pagers

• Precision monitoring of 2.5 V, 3 V, 3.3 V, and 5 V power supply

• MP3 players

• Portable/battery-powered equipment

• Cellular phones

voltages

• Reset thresholds available from 2.2 V to 4.63 V

• ±2.5% threshold accuracy from –40 °C to +85 °C

• 100 ms (min) Power-on-Reset delay time

• Manual Reset input

• Power transient immunity

• Available in three versions: push-pull RESET, push-pull RESET,

and open-drain RESET

• Guaranteed reset valid to V = 1.0 V

DD

• Ultra-small 4-bump Chip-Scale packages

SIMPLIFIED SYSTEM DIAGRAM

V

DD

R

PU

V

DD

RESET

MOTOROLA

68HCXX

MAX6402/MAX6405

MR

GND

PUSH-BUTTON

RESET SWITCH

SL01890

Figure 1. Simplified system diagram.

2

2003 May 27

853-2428 29962

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

ORDERING INFORMATION

MAX6400/MAX6401/MAX6402

PACKAGE

TEMPERATURE

RANGE

TYPE NUMBER

NAME

DESCRIPTION

MAX6400-XXUK

MAX6401-XXUK

WL-CSP4

Wafer-level, chip-scale package; 4 bumps; surface mount

–40 °C to +85 °C

MAX6402-XXUK

NOTE:

Each device has 5 standard voltage options, indicated by ‘XX’ on the ‘Type number’.

Additional voltage options may be available (see Table 1 for details).

XX

Reset threshold voltage (V)

(Typical)

(type number suffix)

22

23

26

29

31

2.200

2.320

2.630

2.930

3.080

MAX6403/MAX6404/MAX6405

PACKAGE

TYPE NUMBER

TEMPERATURE

RANGE

NAME

DESCRIPTION

MAX6403-XXUK

MAX6404-XXUK

WL-CSP4

Wafer-level, chip-scale package; 4 bumps; surface mount

–40 °C to +85 °C

MAX6405-XXUK

NOTE:

Each device has 2 standard voltage options, indicated by ‘XX’ on the ‘Type number’.

Additional voltage options may be available (see Table 1 for details).

XX

Reset threshold voltage (V)

(Typical)

(type number suffix)

44

46

4.380

4.630

3

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

Table 1. Factory-trimmed reset thresholds (note 1)

Reset Threshold Voltage, V (V)

th

T

= +25 °C

T

= –40 °C to +85 °C

Max

Part number

Suffix (XX)

amb

Min

Typ

Max

Min

22

2.167

2.285

2.364

2.462

2.591

2.660

2.758

2.886

2.955

3.034

3.250

3.349

3.447

3.546

3.644

3.743

3.841

3.940

4.038

4.137

4.235

4.314

4.432

4.560

2.200

2.320

2.400

2.500

2.630

2.700

2.800

2.930

3.000

3.080

3.300

3.400

3.500

3.600

3.700

3.800

3.900

4.000

4.100

4.200

4.300

4.380

4.500

4.630

2.233

2.355

2.436

2.537

2.669

2.741

2.842

2.974

3.045

3.126

3.350

3.451

3.552

3.654

3.755

3.857

3.958

4.060

4.161

4.263

4.364

4.446

4.567

4.699

2.145

2.262

2.340

2.437

2.564

2.633

2.730

2.857

2.925

3.003

3.217

3.315

3.412

3.510

3.607

3.705

3.802

3.900

3.997

4.095

4.192

4.270

4.387

2.250

2.375

2.460

2.562

2.696

2.768

2.870

3.000

3.075

3.150

3.383

3.485

3.587

3.690

3.792

3.895

3.997

4.100

4.202

4.305

4.407

4.489

4.612

23

24 (Note 2)

25 (Note 2)

26

MAX6400-XXUK

MAX6401-XXUK

MAX6402-XXUK

27 (Note 2)

28 (Note 2)

29

30 (Note 2)

31

33 (Note 2)

34 (Note 2)

35 (Note 2)

36 (Note 2)

37 (Note 2)

38 (Note 2)

39 (Note 2)

40 (Note 2)

41 (Note 2)

42 (Note 2)

43 (Note 2)

44

MAX6403-XXUK

MAX6404-XXUK

MAX6405-XXUK

45 (Note 2)

46

4.3514

4.746

NOTES:

1. Factory-trimmed reset thresholds are available in 100 mV increments with ±1.5% tolerance at room temperature.

2. Consult factory for availability.

4

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

PINNING

MAX6400/MAX6402/MAX6403/MAX6405

MAX6401/MAX6404

BUMP A1

DESIGNATOR

BUMP A1

DESIGNATOR

GND

A1

B1

A2

B2

V

GND

A1

B1

A2

B2

V

DD

RESET

MR

RESET

MR

TOP VIEW

(SUBSTRATE SIDE)

TOP VIEW

(SUBSTRATE SIDE)

SL01891

SL01892

Figure 2. MAX6400/MAX6402/MAX6403/MAX6405

pin configuration.

Figure 3. MAX6401/MAX6404

pin configuration.

MAX6400/MAX6402/MAX6403/MAX6405

Pin description

MAX6401/MAX6404

Pin description

BUMP

A1

SYMBOL

DESCRIPTION

Device ground.

BUMP

A1

SYMBOL

DESCRIPTION

Device ground.

Positive supply voltage.

Active-HIGH Reset Output. RESET

GND

A2

V

DD

Positive supply voltage.

A2

V

DD

B1

RESET

Active-LOW Reset output. RESET

B1

RESET

MR

remains LOW while V is below the

remains HIGH while V is below the

DD

reset threshold and for a reset delay time

reset threshold and remains HIGH for at

of at least 100 ms after V rises above

least 100 ms after V rises above the

DD

the reset threshold. MAX6402/MAX6405

have open-drain output and the

MAX6400/MAX6403 are push-pull output.

reset threshold.

B2

Active-LOW Manual Reset. Internal 50 kΩ

pull-up resistor to V . Pull LOW to

DD

assert a reset condition. As long as MR is

LOW, the reset remains asserted. Reset

is released in typically 185 ms (reset

delay time) after MR goes HIGH. When

B2

MR

Active-LOW Manual Reset. Internal 50 kΩ

pull-up resistor to V . Pull LOW to

DD

assert a reset condition. As long as MR is

LOW, the reset remains asserted. Reset

is released in typically 185 ms (reset

delay time) after MR goes HIGH. When

unused, the MR pin is connected to V

DD

or left floating.

unused, the MR pin is connected to V

or left floating.

DD

MAXIMUM RATINGS

SYMBOL

PARAMETER

Supply voltage

CONDITIONS

MIN.

–0.3

–

MAX.

UNIT

V

DD

+6

Voltage RESET, RESET (push-pull)

Voltage RESET (open drain)

Voltage manual reset, MR

Input current (any pin)

V

+ 0.3

V

DD

+6

+ 0.3

V

CC

I

20

mA

°C

mW

IN

Output current (any pin)

–

20

+85

+150

303

OUT

T

amb

Ambient temperature range

Storage temperature range

Power dissipation, 4-bump WL–CSP

–40

–65

–

T

stg

P

D

Derate 3.8 mW/°C above T

= 70 °C

amb

5

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

ELECTRICAL CHARACTERISTICS

V

= full range (T

= –40 °C to +85 °C) unless otherwise specified. Typical values are at T

= +25 °C and V = 3 V (Note 1).

amb DD

DD

amb

SYMBOL

PARAMETER

CONDITIONS

= 0 °C to +70 °C

MIN.

1.0

1.2

–

TYP.

–

MAX.

5.5

UNIT

V

T

V

DD

Supply voltage range

amb

T

amb

= –40 °C to +85 °C

–

5.5

V

= 3.0 V for V ≤ 2.93 V;

0.5

1.0

µA

I

Supply current

DD

th

DD

= 3.2 V for V ≥ 2.93 V, no load

th

V

T

= 5.5 V, no load

= +25 °C

–

1.0

1.75

µA

V

DD

V

– 1.5%

V

th

V

+ 1.5%

th

V

th

Reset threshold (see Table 1)

amb

th

T

amb

= –40 °C to +85 °C

– 2.5%

V

th

V

+ 2.5%

th

V

th

∆V /°C

Reset threshold temperature coefficient

Reset threshold hysteresis

–

40

6.3

9.5

20

185

–

ppm/°C

mV

µs

th

MAX6400/MAX6401/MAX6402

MAX6403/MAX6404/MAX6405

V

hys

–

t

V

DD

to Reset release delay

V

DD

= (V + 100 mV) to (V – 100 mV)

–

RD

th

Reset active time-out period

100

–

280

0.8

ms

V

RP

V

th

V

th

V

th

V

th

> 4.0 V

≤ 4.0 V

> 4.0 V

≤ 4.0 V

V

LOW-level input voltage on MR pin

IL

IH

–

0.2 × V

V

DD

2.0

–

V

HIGH-level input voltage on MR pin

0.7 × V

–

V

DD

t

MR minimum input pulse width

MR glitch rejection

1

–

µs

MD

MR

100

200

50

–

ns

MR to Reset time delay

MR pull-up resistance

–

ns

25

–

75

0.3

kΩ

V

I

= 1.6 mA; V > 2.1 V;

DD

V

LOW-level output voltage

on RESET pin

(MAX6400/MAX6402/

MAX6403/MAX6405)

SINK

OL(RESET)

OH(RESET)

RESET asserted

I

= 100 µA; V > 2.1 V;

–

0.8 × V

–

0.4

–

V

SINK

DD

RESET asserted

I

= 500 µA; V = 3.2 V;

V

HIGH-level output voltage

on RESET pin

(MAX6400/MAX6403)

SOURCE

DD

MAX6400 only; RESET released

I

= 800 µA; V = 4.5 V;

–

V

SOURCE

DD

V

≤ 4.38 V; RESET released

th

I

= 800 µA; V = V ;

th(max)

–

V

SOURCE

DD

V

≥ 4.5 V; RESET released

th

I

= 500 µA; V ≥ 2.1 V;

–

V

HIGH-level output voltage

on RESET pin

(MAX6401/MAX6404)

SOURCE

DD

OH(RESET)

RESET asserted

I

= 50 µA; V ≥ 1.2 V;

–

V

SOURCE

DD

RESET asserted

I

= 1.2 mA, V ≥ 3.2 V;

0.3

0.4

0.1

V

LOW-level output voltage

on RESET pin

(MAX6401/MAX6404)

SINK

DD

OL(RESET)

RESET released; MAX6401 only

I

= 3.2 mA, V ≥ 4.5 V;

–

V

SINK

DD

V

≤ 4.38 V; RESET released

th

I

= 3.2 mA, V = V ;

th(max)

–

V

SINK

DD

Vth ≥ 4.5 V; RESET released

Open drain RESET output leakage

current (Note 2)

RESET released

–

µA

NOTES:

1. Over-temperature limits are guaranteed by design and are not production tested.

2. Guaranteed by design; not production tested.

6

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

TIMING DIAGRAM

The timing diagram in Figure 4 depicts the operation of the device.

Letters indicate events on the TIME axis.

(Event D). At Event E, V falls below the reset threshold before the

reset delay time is reached, and reset remains asserted.

DD

On power-up, when V reaches 1 V, RESET is guaranteed to be a

At F, the V rises above the reset threshold and remains above the

DD

logic LOW.

reset threshold for typically 185 ms. At G, the reset is once again

released.

At Event A, V rises to reset threshold voltage, V . At this time,

DD

th

the internal reset delay timer is initiated. RESET and remains

asserted for a reset delay time, t of typically 180 ms after the

At H, the MR is externally pulled LOW for greater than 1 µs

(minimum MR pulse width, t

for V = +5 V).

DD

RP

MD

supply voltage rises above the reset threshold, V .

th

At I, the manual reset is asserted in 200 ns (typical MR to reset out

delay time, t for V = +5 V).

Event B: At this time, the reset is released. RESET goes HIGH.

The reset delay time helps to ensure valid reset signals with erratic

changes in supply voltage.

MR

CC

At J, the MR pin returns HIGH. At this point, reset delay timer is

initiated and in typically 180 ms (at K), the reset condition is

released.

Events C–E: At Event C, under brown-out conditions, V falls

DD

below the reset threshold minus the hysteresis voltage, V , the

hys

Event L: On power-down, when V falls below V – V , RESET

DD

th

hys

reset signal is asserted. When power recovers and V rises above

DD

is guaranteed to be asserted until V falls below 1 V.

DD

the reset threshold, it once again initiates the reset delay timer

V

DD

V

– V

hys

V

V – V

th hys

th

t

RP

RESET

MR

t

MR

t

MD

TIME

A

B

C

D

E

F

G

H

I

J

K

L

SL01893

Figure 4. Timing diagram.

7

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

TECHNICAL DISCUSSION

General discussion

Manual Reset

MAX6400–MAX6405 microprocessor (µP) supervisory ICs provide

system protection by monitoring power supply voltage and asserting

a reset signal if the supply falls below the specified threshold.

The MAX6402/MAX6405 have an active-LOW open drain output.

The MAX6400/MAX6403 have an active-LOW, push-pull output;

while the MAX6401/MAX6404 have an active-HIGH, push-pull

The manual reset input, MR is active-LOW logic. It allows the

RESET to be asserted by a pushbutton switch. A mechanical

pushbutton switch is effectively debounced by the glitch filter. The

typical glitch rejection is 100 ns. MR may be driven from an external

logic circuit since it is TTL/CMOS compatible. The minimum MR

input pulse is 1 µs for V = +1.2 V to +5.5 V. When not in use, the

DD

output. The reset state is guaranteed to remain valid as long as V

is above +1 V.

pin is left floating or tied to V

.

DD

Threshold levels

The reset threshold voltages are factory trimmable from 2.2 V to

4.63 V in approximately 100 mV increments. Sample stock is

available for all standard threshold voltages shown in Table 1,

“Factory-trimmed reset thresholds”. Guaranteed threshold voltage

tolerance is ±1.5% at T

ambient temperature, T

= 25 °C and ±2.5% over the operating

= –40 °C to +85 °C.

amb

8

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

APPLICATION INFORMATION

Interfacing to µPs with bi-directional reset pins

The MAX6402/MAX6405 RESET outputs are open drain and are

easily interfaced with microprocessors which have bi-directional

reset pins, such as the Motorola 68HC11. Directly connecting the

MAX6402/MAX6405 RESET output to the µP’s reset input and

System configurations with various µPs

The MAX6400–MAX6405 Series resets provide a system solution

for various µPs. Figures 7 and 8, respectively, reference the Philips

µPs which are compatible with the MAX6400/MAX6403 and

MAX6401/MAX6404 system resets.

providing a pull-up resistor to V allows either device to

DD

independently assert reset (Figure 5).

V

DD

V

DD

V

DD

RESET

R

PU

V

DD

MICROPROCES-

SOR

MAX6400/

MAX6403

RESET

MOTOROLA

68HCXX

MAX6402/

MAX6405

PUSH-BUTTON

RESET

SWITCH

MR

GND

PUSH-BUTTON

RESET

SWITCH

MR

GND

SL01896

NOTE:

SL01894

1. Philips microprocessors with active-LOW resets:

All 16-bit devices from the XA family (XA-Cxx, XA-Gxx, XA-Sxx,

XA-Hxx), all LPC7xx devices (P87LPC760/761/762/767/768/769,

P80C591/P87C591 (with on-chip CAN controller).

Figure 5. Interfacing to µPs with bi-directional reset pins.

Negative-going V transients

Figure 7. µP system diagram using MAX6400/MAX6403

DD

The MAX6400–MAX6405 Series resets are relatively immune to

push-pull, active-LOW resets.

short duration, negative-going V transients or power glitches. This

DD

capability greatly reduces false resets with short -duration pulses.

V

DD

Figure 6, “Maximum transient duration versus reset comparator

overdrive” shows the maximum transient condition for which reset

signals are not generated. The graph shows the maximum pulse

width that a negative-going transient may have before it will

generate a reset signal. Note: as the amplitude of the transient

increases, the maximum allowable transient pulse width decreases.

V

DD

RESET

MICROPROCES-

SOR

MAX6401/

MAX6404

450

400

PUSH-BUTTON

RESET

SWITCH

MR

GND

350

MAX6400/MAX6401/MAX6402

300

250

200

SL01897

NOTE:

1. Philips microprocessors with active-HIGH resets:

MAX6403/MAX6404/MAX6405

8xC5x, 8xC3x, 8xC5xX2, 8xC3xX2, 8xC51Fx, 8xC51Rx+,

89C51Rx2, 89C66x, 8xC554, 8xC552, etc.

150

100

50

Figure 8. µP system diagram using MAX6401/MAX6404

push-pull, active-HIGH resets.

0

1

10

100

1000

RESET COMPARATOR OVERDRIVE, V – V (mV)

th

DD

SL01895

Figure 6. Maximum transient duration versus

reset comparator overdrive.

9

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

PACKING METHOD

The MAX6401–MAX6405 Series are packed in reels, as shown in Figure 9.

GUARD

BAND

TAPE

TAPE DETAIL

REEL

ASSEMBLY

COVER TAPE

CARRIER TAPE

BARCODE

LABEL

BOX

SL01305

Figure 9. Tape and reel packing method.

WL-CSP4: wafer level, chip-scale package; 4 bumps

E

A

2

PIN A1

CORNER INDEX

A1

B1

A2

B2

A

1

D

SIDE VIEW

TOP VIEW

e

B1

A1

B2

A2

b

h

PIN A1

INDICATOR

BOTTOM VIEW

DIMENSIONS

UNIT

A

b

D

E

e

h

1

2

0.024

0.020

φ 0.009

0.013

0.0120 0.042

0.042 0.0197

0.038 BASIC reference

0.010

inch

±0.0015 reference BASIC 0.038

Meets JEDEC MO195.

10

2003 May 27

Philips Semiconductors

Product data

Ultra-low-power microprocessor reset circuit

in 4-bump Chip-Scale package

MAX6400/MAX6401/MAX6402/

MAX6403/MAX6404/MAX6405

REVISION HISTORY

Rev

Date

Description

Product data (9397 750 10644); ECN 853-2428 29962 of 27 May 2003

_1

20030527

Data sheet status

Product

status

Definitions

[1]

Level

Data sheet status

[2] [3]

I

Objective data

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

II

Preliminary data

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III

Product data

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given

in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no

representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be

expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree

to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described

or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated

viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys

nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,

copyright, or mask work right infringement, unless otherwise specified.

Koninklijke Philips Electronics N.V. 2003

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 05-03

9397 750 10644

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document order number:

Philips

Semiconductors

11

2003 May 27

型号:	MAX6404-46UK
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	PHILIPS SEMICONDUCTORS
包装说明：	FBGA, BGA4,2X2,20
Reach Compliance Code：	unknown
风险等级：	5.76
可调阈值：	NO
JESD-30 代码：	S-PBGA-B4
JESD-609代码：	e0
端子数量：	4
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	FBGA
封装等效代码：	BGA4,2X2,20
封装形状：	SQUARE
封装形式：	GRID ARRAY, FINE PITCH
电源：	1.5/5 V
认证状态：	Not Qualified
子类别：	Power Management Circuits
最大供电电流 (Isup)：	0.00175 mA
表面贴装：	YES
温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	BALL
端子节距：	0.5 mm
端子位置：	BOTTOM
阈值电压标称：	+4.63V

电子百科

产品导航

产品型号MAX6404-46UK的Datasheet PDF文件预览

MAX6404-46UK相关产品..

MAX6404-46UK相关文章

IC37:专业IC行业平台