D&R Industry Articles (December 2024)

Featured Article

A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)

TMR is not a new idea in the world of ASIC design. It was published as far back as 1962 in the IBM Journal of Research and Development. However, it has become an essential design solution for ASIC chips sent into space, a vast environment filled with radiation.

Featured Article

The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification

Building on the success of achieving PSA Certified™ Level 2 Ready through the integration of PUFcc with Arm’s CPU, Corstone platform, and TF-M, PUFsecurity and Arm move forward to the next level and successfully attain SESIP and PSA Certified™ Level 3 RoT Component certification for PUFsecurity’s Crypto Coprocessor IP, PUFcc.