[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.1145/3566097.3567886acmconferencesArticle/Chapter ViewAbstractPublication PagesaspdacConference Proceedingsconference-collections
research-article
Public Access

DependableHD: A Hyperdimensional Learning Framework for Edge-Oriented Voltage-Scaled Circuits

Published: 31 January 2023 Publication History

Abstract

Voltage scaling is one of the most promising approaches for energy efficiency improvement but also brings challenges to fully guaranteeing the stable operation in modern VLSI. To tackle such issues, we propose DependableHD, a learning framework based on HyperDimensional Computing (HDC), which supports the systems to tolerate bit-level memory failure in the low voltage region with high robustness. For the first time, DependableHD introduces the concept of margin enhancement for model retraining and utilizes noise injection to improve the robustness, which is capable of application in most state-of-the-art HDC algorithms. Our experiment shows that under 10% memory error, DependableHD exhibits a 1.22% accuracy loss on average, which achieves an 11.2× improvement compared to the baseline HDC solution. The hardware evaluation shows that DependableHD supports the systems to reduce the supply voltage from 400mV to 300mV, which provides a 50.41% energy consumption reduction while maintaining competitive accuracy performance.

References

[1]
Davide Anguita, Alessandro Ghio, Luca Oneto, Xavier Parra, and Jorge L. Reyes-Ortiz. 2012. Human Activity Recognition on Smartphones Using a Multiclass Hardware-Friendly Support Vector Machine. In AAL, José Bravo, Ramón Hervás, and Marcela Rodríguez (Eds.). Springer, 216--223.
[2]
B.H. Calhoun and A. Chandrakasan. 2004. Characterizing and Modeling Minimum Energy Operation for Subthreshold Circuits. In International Symposium on Low Power Electronics and Design. 90--95.
[3]
Ronald G Dreslinski, Michael Wieckowski, David Blaauw, Dennis Sylvester, and Trevor Mudge. 2010. Near-threshold computing: Reclaiming moore's law through energy efficient integrated circuits. Proc. IEEE 98, 2 (2010), 253--266.
[4]
Dheeru Dua and Casey Graff. 2017. UCI Machine Learning Repository. http://archive.ics.uci.edu/ml/datasets/ISOLET
[5]
Anteneh Gebregiorgis, Saman Kiamehr, Fabian Oboril, Rajendra Bishnoi, and Mehdi B Tahoori. 2016. A cross-layer analysis of soft error, aging and process variation in near threshold computing. In 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 205--210.
[6]
Alejandro Hernandez-Cane, Namiko Matsumoto, Eric Ping, and Mohsen Imani. 2021. OnlineHD: Robust, Efficient, and Single-Pass Online Learning Using Hyperdimensional System. In 2021 Design, Automation Test in Europe Conference Exhibition (DATE). 56--61.
[7]
M. Imani, J. Messerly, F. Wu, W. Pi, and T. Rosing. 2019. A Binary Learning Framework for Hyperdimensional Computing. In 2019 Design, Automation Test in Europe Conference Exhibition (DATE). 126--131.
[8]
Shailendra Jain, Surhud Khare, Satish Yada, V Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M Srinivasan, Arun Kumar, Shasi Kumar Gb, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram Vangal, Saurabh Dighe, Greg Ruhl, Paolo Aseron, Howard Wilson, Nitin Borkar, Vivek De, and Shekhar Borkar. 2012. A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS. In 2012 IEEE International Solid-State Circuits Conference. 66--68.
[9]
Pentti Kanerva. 2009. Hyperdimensional Computing: An Introduction to Computing in Distributed Representation with High-Dimensional Random Vectors. Cognitive Computation 1 (06 2009).
[10]
Yann LeCun, Corinna Cortes, and CJ Burges. 2010. MNIST handwritten digit database. ATT Labs. Available: http://yann.lecun.com/exdb/mnist 2 (2010).
[11]
Dehua Liang, Masanori Hashimoto, and Hiromitsu Awano. 2021. BloomCA: A Memory Efficient Reservoir Computing Hardware Implementation Using Cellular Automata and Ensemble Bloom Filter. In 2021 Design, Automation Test in Europe Conference Exhibition (DATE). 587--590.
[12]
Dehua Liang, Jun Shiomi, Noriyuki Miura, and Hiromitsu Awano. 2022. DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification. In 2022 IEEE Asia and South Pacific Design Automation Conference (ASP-DAC).
[13]
Prathyush Poduval, Yang Ni, Yeseong Kim, Kai Ni, Raghavan Kumar, Rosario Cammarota, and Mohsen Imani. 2021. Hyperdimensional Self-Learning Systems Robust to Technology Noise and Bit-Flip Attacks. In 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).
[14]
Prathyush Poduval, Zhuowen Zou, Hassan Najafi, Houman Homayoun, and Mohsen Imani. 2021. Stochd: Stochastic hyperdimensional system for efficient and robust learning from raw data. In IEEE/ACM DAC.
[15]
Abbas Rahimi, Sohum Datta, Denis Kleyko, Edward Paxon Frady, Bruno Olshausen, Pentti Kanerva, and Jan M. Rabaey. 2017. High-Dimensional Computing as a Nanoscalable Paradigm. IEEE Transactions on Circuits and Systems I: Regular Papers 64, 9 (2017), 2508--2521.
[16]
Abbas Rahimi, Pentti Kanerva, and Jan M Rabaey. 2016. A robust and energy-efficient classifier using brain-inspired hyperdimensional computing. In Proceedings of the 2016 International Symposium on Low Power Electronics and Design. 64--69.
[17]
Adnan Siraj Rakin, Zhezhi He, and Deliang Fan. 2019. Bit-flip attack: Crushing neural network with progressive bit search. In Proceedings of the IEEE/CVF International Conference on Computer Vision. 1211--1220.
[18]
Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Giyong Yang, Hoonki Kim, Sanghoon Baek, Jonghoon Jung, Bongjae Kwon, Sungwee Cho, Hyuntaek Jung, Yongjae Choo, and Jaeseung Choi. 2017. A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization. IEEE Journal of Solid-State Circuits 52, 1 (2017), 240--249.
[19]
A. Wang and A. Chandrakasan. 2005. A 180-mV Subthreshold FFT Processor using a Minimum Energy Design Methodology. IEEE Journal of Solid-State Circuits 40, 1 (Jan. 2005), 310--319.
[20]
B. Zhai, L. Nazhandali, J. Olson, A. Reeves, M. Minuth, R. Helfand, S. Pant, D. Blaauw, and T. Austin. 2006. A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency. In 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. 154--155.

Cited By

View all
  • (2024)DropHD: Technology/Algorithm Co-Design for Reliable Energy-Efficient NVM-Based Hyper-Dimensional Computing Under Voltage Scaling2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546626(1-6)Online publication date: 25-Mar-2024
  • (2024)A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled CircuitsACM Transactions on Embedded Computing Systems10.1145/362067123:6(1-20)Online publication date: 11-Sep-2024
  • (2023)Stress-Resiliency of AI Implementations on FPGAs2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL60245.2023.00057(333-338)Online publication date: 4-Sep-2023

Index Terms

  1. DependableHD: A Hyperdimensional Learning Framework for Edge-Oriented Voltage-Scaled Circuits
    Index terms have been assigned to the content through auto-classification.

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    ASPDAC '23: Proceedings of the 28th Asia and South Pacific Design Automation Conference
    January 2023
    807 pages
    ISBN:9781450397834
    DOI:10.1145/3566097
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    In-Cooperation

    • IPSJ
    • IEEE CAS
    • IEEE CEDA
    • IEICE

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 31 January 2023

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. hyperdimensional computing
    2. margin enhancement
    3. memory failure
    4. noise injection
    5. voltage scaling

    Qualifiers

    • Research-article

    Funding Sources

    Conference

    ASPDAC '23
    Sponsor:

    Acceptance Rates

    ASPDAC '23 Paper Acceptance Rate 102 of 328 submissions, 31%;
    Overall Acceptance Rate 466 of 1,454 submissions, 32%

    Upcoming Conference

    ASPDAC '25

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)81
    • Downloads (Last 6 weeks)6
    Reflects downloads up to 13 Dec 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2024)DropHD: Technology/Algorithm Co-Design for Reliable Energy-Efficient NVM-Based Hyper-Dimensional Computing Under Voltage Scaling2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546626(1-6)Online publication date: 25-Mar-2024
    • (2024)A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled CircuitsACM Transactions on Embedded Computing Systems10.1145/362067123:6(1-20)Online publication date: 11-Sep-2024
    • (2023)Stress-Resiliency of AI Implementations on FPGAs2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL60245.2023.00057(333-338)Online publication date: 4-Sep-2023

    View Options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Login options

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media