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research-article

Python to accelerate embedded SoC design: A case study for systems biology

Published: 10 March 2014 Publication History

Abstract

We present SysPy (System Python) a tool which exploits the strengths of the popular Python scripting language to boost design productivity of embedded System on Chips for FPGAs. SysPy acts as a “glue” software between mature HDLs, ready-to-use VHDL components and programmable processor soft IP cores. SysPy can be used to: (i) automatically translate hardware components described in Python into synthesizable VHDL, (ii) capture top-level structural descriptions of processor-centric SoCs in Python, (iii) implement all the steps necessary to compile the user's C code for an instruction set processor core and generate processor specific Tcl scripts that import to the design project all the necessary HDL files of the processor's description and instantiate/connect the core to other blocks in a synthesizable top-level Python description. Moreover, we have developed a Hardware Abstraction Layer (HAL) in Python which allows user applications running in a host PC to utilize effortlessly the SoC's resources in the FPGA. SysPy's design capabilities, when complemented with the developed HAL software API, provide all the necessary tools for hw/sw partitioning and iterative design for efficient SoC's performance tuning. We demonstrate how SysPy's design flow and functionalities can be used by building a processor-centric embedded SoC for computational systems biology. The designed SoC, implemented using a Xilinx Virtex-5 FPGA, combines the flexibility of a programmable soft processor core (Leon3) with the high performance of an application specific core to simulate flexibly and efficiently the stochastic behavior of large size biomolecular reaction networks. Such networks are essential for studying the dynamics of complex biological systems consisting of multiple interacting pathways.

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  • (2023)ZyPy: Intercepting NumPy operations for acceleration on FPGAsProceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies10.1145/3597031.3597033(100-106)Online publication date: 14-Jun-2023
  • (2020)Enabling transparent hardware acceleration on Zynq SoC for scientific computingACM SIGBED Review10.1145/3412821.341282617:1(30-35)Online publication date: 27-Jul-2020
  • (2018)Hot & Spicy: Improving Productivity with Python and HLS for FPGAs2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM.2018.00022(85-92)Online publication date: Apr-2018
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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 13, Issue 4
Regular Papers
November 2014
647 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/2592905
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 10 March 2014
Accepted: 01 August 2013
Revised: 01 May 2013
Received: 01 October 2012
Published in TECS Volume 13, Issue 4

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Author Tags

  1. Biomolecular reaction networks
  2. FPGA
  3. Gillespie's Stochastic Simulation Algorithm
  4. Python
  5. SoC
  6. SysPy
  7. Systems Biology
  8. VHDL
  9. hw/sw co-design
  10. scripting languages

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Cited By

View all
  • (2023)ZyPy: Intercepting NumPy operations for acceleration on FPGAsProceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies10.1145/3597031.3597033(100-106)Online publication date: 14-Jun-2023
  • (2020)Enabling transparent hardware acceleration on Zynq SoC for scientific computingACM SIGBED Review10.1145/3412821.341282617:1(30-35)Online publication date: 27-Jul-2020
  • (2018)Hot & Spicy: Improving Productivity with Python and HLS for FPGAs2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM.2018.00022(85-92)Online publication date: Apr-2018
  • (2016)Python facilitates the rapid prototyping and hw/sw verification of processor centric SoCs for FPGAs2016 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2016.7527465(1214-1217)Online publication date: May-2016
  • (2015)Many-core CPUs can deliver scalable performance to stochastic simulations of large-scale biochemical reaction networks2015 International Conference on High Performance Computing & Simulation (HPCS)10.1109/HPCSim.2015.7237084(517-524)Online publication date: Jul-2015

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