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iTimerC: common path pessimism removal using effective reduction methods

Published: 03 November 2014 Publication History

Abstract

Static timing analysis is a key process to guarantee timing closure for modern IC designs. Nevertheless, fast growing design complexities and increasing on-chip variations complicate this process. To capture more accurate timing performance of a design, common path pessimism removal is prevalent to eliminate artificially induced pessimism in clock paths during timing analysis. To avoid exhaustive exploration on all paths in a design, in this paper, we present a novel timing analysis framework removing common path pessimism based on block-based static timing analysis, timing graph reduction, and dynamic bounding. Experimental results show that the proposed method is highly scalable, especially with short runtimes for large-scale designs. Moreover, our approach outperforms TAU 2014 timing contest winners, generating accurate results and achieving more than 2.13X speedups.

References

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C. Visweswariah, et al., "First-order incremental block-based statistical timing analysis," in Proc. DAC, July 2004, pp. 331--336.
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J. Bhasker and R. Chadha, Static timing analysis for nanometer designs: A practical approach, Springer, 2009.
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N. Gupta, "Removing Pessimism and Optimism in Timing Analysis," EETimes. http://www.eetimes.com/document.asp?doc_id=1279958
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P. Cunningham, et al., "Clock concurrent optimization," Azuro white paper, Feb. 2009.
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J. Hu, et al., "TAU 2014 contest on removing Common path pessimism during timing analysis," in Proc. TAU Workshop, Mar. 2014, pp.56--63.
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J. Zejda and P. Frain, "General framework for removal of clock network pessimism," in Proc. ICCAD, Nov. 2002, pp. 632--639.
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D. J. Hathaway, et al., "Network timing analysis method which eliminates timing variations between signals traversing a common circuit path," US Patent no. 5,636,372, 1997.
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K. Kalafala, et al., "System and method for correlated process pessimism removal for static timing analysis," US Patent no. 7,117,466, 2006.
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R. W. Smith, "Half cycle common path pessimism removal method," US Patent no. 7,765,503, 2010.
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C. Soviani, et al., "Efficient exhaustive path-based static timing analysis using a fast estimation technique," US Patent no. 8,079,004, 2011.
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C. M. Darsow and T. D. Helvey, "Implementing forward tracing to reduce pessimism in static timing of logic blocks laid out in parallel structures on an integrated circuit chip," US Patent Application 2012/0023466, 2012.
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S. Singh, et al., "Common path pessimism removal for hierarchical timing analysis," US Patent no. 8,572,532, 2013.

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Information & Contributors

Information

Published In

cover image ACM Conferences
ICCAD '14: Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design
November 2014
801 pages
ISBN:9781479962778
  • General Chair:
  • Yao-Wen Chang

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In-Cooperation

  • IEEE SSCS Shanghai Chapter
  • IEEE-EDS: Electronic Devices Society

Publisher

IEEE Press

Publication History

Published: 03 November 2014

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Author Tags

  1. branch-and-bound
  2. common path pessimism removal
  3. on-chip variations
  4. static timing analysis

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  • Research-article

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ICCAD '14
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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

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  • (2019)A General Cache Framework for Efficient Generation of Timing Critical PathsProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317744(1-6)Online publication date: 2-Jun-2019
  • (2018)FastpassProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201643(172-177)Online publication date: 22-Jan-2018
  • (2018)iTimerMACM Transactions on Design Automation of Electronic Systems10.1145/314981823:4(1-21)Online publication date: 11-Jun-2018
  • (2016)UI-Timer 1.0IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.252456635:11(1862-1875)Online publication date: 1-Nov-2016
  • (2015)iitRACEProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840945(903-909)Online publication date: 2-Nov-2015
  • (2015)OpenTimerProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840944(895-902)Online publication date: 2-Nov-2015
  • (2015)iTimerC 2.0Proceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840943(890-894)Online publication date: 2-Nov-2015

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