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Embedded system synthesis by timing constraints solving

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Krzysztof KuchcinskiAuthors Info & Claims

ISSS '97: Proceedings of the 10th international symposium on System synthesis

Pages 50 - 57

Published: 17 September 1997 Publication History

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Abstract

This paper presents an approach to embedded system synthesis which minimizes a system cost while implementing given timing requirements. The embedded system is represented by a set of finite domain constraints defining different requirements on processes timing, system resources and interprocess communication. The assignment of processes to processors and interprocess communications to buses as well as their scheduling are then defined as an optimization problem. A prototype system, based on constraint solving techniques, has been implemented in CHIP 5, the constraint logic programming system. Experimental results show that this approach can be efficiently used to define different system constraints and generate optimized system implementations.

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Cited By

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Pop TPop PEles PPeng Z(2019)Analysis and optimisation of hierarchically scheduled multiprocessor embedded systemsInternational Journal of Parallel Programming10.1007/s10766-007-0059-936:1(37-67)Online publication date: 27-Jan-2019
https://dl.acm.org/doi/10.1007/s10766-007-0059-9
Zhang ZChan WTse TLu HMei L(2009)Resource prioritization of code optimization techniques for program synthesis of wireless sensor network applicationsJournal of Systems and Software10.1016/j.jss.2009.05.01882:9(1376-1387)Online publication date: 1-Sep-2009
https://dl.acm.org/doi/10.1016/j.jss.2009.05.018
Vahid FGivargis TGebotys CMartin G(2008)Highly-cited ideas in system codesign and synthesisProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450178(191-196)Online publication date: 19-Oct-2008
https://dl.acm.org/doi/10.1145/1450135.1450178
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Information

Published In

ISSS '97: Proceedings of the 10th international symposium on System synthesis

September 1997

141 pages

ISBN:0818679492

Chairmen:
Frank Vahid
Univ. of California, Riverside
,
Francky Catthoor
IMEC, Leuven, Belgium

Publisher

IEEE Computer Society

United States

Publication History

Published: 17 September 1997

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ISSS97

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SIGDA
IEEE-CS

ISSS97: 10th Internatioanl Symposium on System Synthesis

September 17 - 19, 1997

Antwerp, Belgium

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Overall Acceptance Rate 38 of 71 submissions, 54%

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Cited By

View all

Pop TPop PEles PPeng Z(2019)Analysis and optimisation of hierarchically scheduled multiprocessor embedded systemsInternational Journal of Parallel Programming10.1007/s10766-007-0059-936:1(37-67)Online publication date: 27-Jan-2019
https://dl.acm.org/doi/10.1007/s10766-007-0059-9
Zhang ZChan WTse TLu HMei L(2009)Resource prioritization of code optimization techniques for program synthesis of wireless sensor network applicationsJournal of Systems and Software10.1016/j.jss.2009.05.01882:9(1376-1387)Online publication date: 1-Sep-2009
https://dl.acm.org/doi/10.1016/j.jss.2009.05.018
Vahid FGivargis TGebotys CMartin G(2008)Highly-cited ideas in system codesign and synthesisProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450178(191-196)Online publication date: 19-Oct-2008
https://dl.acm.org/doi/10.1145/1450135.1450178
Jówiak LOng S(2008)Quality-driven model-based architecture synthesis for real-time embedded SoCsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2007.09.00154:3-4(349-368)Online publication date: 1-Mar-2008
https://dl.acm.org/doi/10.1016/j.sysarc.2007.09.001
Bouyssounouse BSifakis J(2005)Computing platformsEmbedded Systems Design10.5555/2137690.2137723(388-449)Online publication date: 1-Jan-2005
https://dl.acm.org/doi/10.5555/2137690.2137723
Subramani K(2005)Periodic Linear Programming with applications to real-time schedulingMathematical Structures in Computer Science10.1017/S096012950400465715:2(383-406)Online publication date: 1-Apr-2005
https://dl.acm.org/doi/10.1017/S0960129504004657
Xie YWolf W(2001)Allocation and scheduling of conditional task graph in hardware/software co-synthesisProceedings of the conference on Design, automation and test in Europe10.5555/367072.367835(620-625)Online publication date: 13-Mar-2001
https://dl.acm.org/doi/10.5555/367072.367835
Szymanek RKuchcinski KMadsen JHenkel JHu X(2001)A constructive algorithm for memory-aware task assignment and schedulingProceedings of the ninth international symposium on Hardware/software codesign10.1145/371636.371706(147-152)Online publication date: 25-Apr-2001
https://dl.acm.org/doi/10.1145/371636.371706
Kuchcinski K(1999)Integrated resource assignment and scheduling of task graphs using finite domain constraintsProceedings of the conference on Design, automation and test in Europe10.1145/307418.307494(47-es)Online publication date: 1-Jan-1999
https://dl.acm.org/doi/10.1145/307418.307494
Pop PEles PPeng ZJerraya ALavagno LVahid F(1999)Scheduling with optimized communication for time-triggered embedded systemsProceedings of the seventh international workshop on Hardware/software codesign10.1145/301177.303812(178-182)Online publication date: 1-Mar-1999
https://dl.acm.org/doi/10.1145/301177.303812
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