Modeling of power distribution systems for high-performance microprocessors
DJ Herrell, B Beker - IEEE transactions on advanced packaging, 1999 - ieeexplore.ieee.org
DJ Herrell, B Beker
IEEE transactions on advanced packaging, 1999•ieeexplore.ieee.orgThis paper presents approximate techniques for building models and simulating the
response of power distribution systems for high-performance microprocessors. Several
distributed equivalent SPICE circuit models were built by extracting the appropriate
resistance, inductance, capacitance (RLC) component values using a combination of two-
dimensional (2-D) and three-dimensional (3-D) quasi-static field solvers. They were used to
assess how well such effects as system transfer impedance and transient characteristics can …
response of power distribution systems for high-performance microprocessors. Several
distributed equivalent SPICE circuit models were built by extracting the appropriate
resistance, inductance, capacitance (RLC) component values using a combination of two-
dimensional (2-D) and three-dimensional (3-D) quasi-static field solvers. They were used to
assess how well such effects as system transfer impedance and transient characteristics can …
This paper presents approximate techniques for building models and simulating the response of power distribution systems for high-performance microprocessors. Several distributed equivalent SPICE circuit models were built by extracting the appropriate resistance, inductance, capacitance (RLC) component values using a combination of two-dimensional (2-D) and three-dimensional (3-D) quasi-static field solvers. They were used to assess how well such effects as system transfer impedance and transient characteristics can be predicted. The models include the chip, its controlled collapsed chip connection (C4) connections to the package, the power distribution structure in the package, connector and motherboard. It is found that the response of the entire power system can be treated as a second order system, by which the main features of the performance of the power delivery network are assessed. Samples of transient and frequency domain data for typical microprocessors are given and the effects of some design options are discussed, as are the tradeoffs in model complexity versus the gain of useful design information.
ieeexplore.ieee.org