WO2013161650A1

WO2013161650A1 - Display control circuit, liquid crystal display device provided with same, and display control method

Info

Publication number: WO2013161650A1
Application number: PCT/JP2013/061442
Authority: WO
Inventors: 木村　謙一
Original assignee: シャープ株式会社
Priority date: 2012-04-25
Filing date: 2013-04-18
Publication date: 2013-10-31

Abstract

Provided is a display control circuit that can create an apparent display of an image with brightness that is the same or close to a brightness corresponding to a current frame gradation value by carrying out overshooting drive. Two OS tables, an OS table set such that a write gradation value is higher than the current frame gradation value and an OS table set such that the write gradation value is lower than the current frame gradation value, are prepared for the OS table used when carrying out overshooting drive. By carrying out overshooting drive using these two OS tables alternately, the gradation value for the image displayed undergoes apparent averaging, and a viewer can see as if the image with the current frame gradation value is displayed.

Description

Display control circuit, liquid crystal display device including the same, and display control method

The present invention relates to a display control circuit for controlling display on a liquid crystal display panel based on an image signal given from the outside, a liquid crystal display device including the display control circuit, and a display control method. The present invention relates to a display control circuit for performing overdrive driving that emphasizes a temporal change of a signal, a liquid crystal display device including the display control circuit, and a display control method.

In recent years, personal computers and televisions have been strongly required to reduce the weight and thickness of displays, and liquid crystal display devices have been adopted as displays that can meet these requirements. However, since the response speed of the liquid crystal is slow, the liquid crystal display device may not be able to display a moving image with sufficient image quality. Therefore, in order to suppress deterioration in image quality when displaying a moving image, a driving method called overshoot driving (or overdrive driving) has been conventionally employed. The overshoot drive is a gradation voltage higher than the gradation voltage corresponding to the input image signal of the current frame or the input of the current frame according to the combination of the input image signal of the previous frame and the input image signal of the current frame. In this driving method, a gradation voltage lower than the gradation voltage corresponding to the image signal is supplied to the liquid crystal display panel. By adopting such overshoot driving, the time required to reach the luminance corresponding to the gradation voltage in the liquid crystal display panel is shortened, so that the deterioration of the image quality at the time of moving image display is suppressed.

A liquid crystal display device that employs overshoot driving has a gradation value corresponding to an input image signal one frame before (hereinafter referred to as “previous frame gradation value”) and a gradation value corresponding to an input image signal of the current frame (hereinafter referred to as “following frame gradation value”). Lookup for overshoot drive to determine the gradation voltage to be supplied to the liquid crystal display panel (hereinafter referred to as “write gradation voltage”) based on the combination with the “current frame gradation value”) A table (hereinafter referred to as “OS table”) is held. Based on the data stored in the OS table, the writing gradation voltage higher than the gradation voltage corresponding to the current frame gradation value or the writing gradation lower than the gradation voltage corresponding to the current frame gradation value. An overshoot drive is performed by applying a regulated voltage to the liquid crystal.

In particular, in a liquid crystal television capable of three-dimensional (hereinafter referred to as “3D”), which has been actively developed in recent years, two-dimensional (hereinafter, referred to as “parallax”) is generated in order to cause parallax between the left eye and right eye of the viewer. It is necessary to increase the response speed of the liquid crystal compared to a liquid crystal television capable of display (referred to as “2D”). For this reason, overshoot driving is performed particularly in a 3D liquid crystal television.

The liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. 2010-282089 outputs a left-eye image (hereinafter referred to as “L image”) twice, and then outputs a right-eye image (hereinafter referred to as “R image”) 2 times. By repeating the output once, 3D display is performed. Specifically, this liquid crystal display device holds two types of OS tables for coarse adjustment and fine adjustment for 3D display. First, when the first L image is output, a coarse adjustment writing gradation value close to the current frame gradation value is obtained using the coarse adjustment OS table, and the coarse adjustment writing gradation value is corresponded to the coarse adjustment writing gradation value. The coarse adjustment writing gradation voltage is supplied to the liquid crystal display panel. Next, when outputting the second L image, the fine adjustment gradation value is obtained using the fine adjustment OS table, and the fine adjustment gradation voltage corresponding to the fine adjustment gradation value is displayed on the liquid crystal display panel. To supply. Similarly for the R image, the coarse adjustment writing gradation voltage is first supplied to the liquid crystal display panel, and then the fine adjustment gradation voltage is supplied. As a result, the liquid crystal display device performs high-quality 3D display.

Japanese Unexamined Patent Publication No. 2010-282089

In a liquid crystal display device that displays an image by gradation display, a gradation voltage value corresponding to each gradation value is set. The interval between these gradation voltage values is not constant. On the other hand, in overshoot driving for performing 3D display, in order to make a transition from a high gradation to a low gradation in a short time, in particular, 0 gradation for displaying black, or 1 gradation or 2 gradations (hereinafter, referred to as black gradation). In many cases, the write gradation voltage corresponding to the 0 gradation and the gradation close thereto may be referred to as “black gradation”) is supplied to the liquid crystal display panel.

However, the writing gradation voltage is not proportional to the transmittance of the backlight light transmitted through the liquid crystal display panel, that is, the luminance of the liquid crystal display panel. In particular, the interval between the gradation voltage values corresponding to the gradation values of the black gradation is wider than the interval between the gradation voltages corresponding to the other gradation values. For this reason, even when overshoot driving is performed when transitioning from a high gradation to a low gradation, the luminance of the image displayed on the liquid crystal display panel may be different from the luminance corresponding to the current frame gradation value.

In addition, in the OS table for fine adjustment of the liquid crystal display device described in Japanese Patent Application Laid-Open No. 2010-282089, the interval of the gradation voltage value corresponding to the black gradation is wide, so that it is used for coarse adjustment and fine adjustment. Even if the writing gradation voltage obtained using the OS table is supplied to the liquid crystal display panel, the luminance of the image displayed on the liquid crystal display panel is set to the same luminance as that corresponding to the current frame gradation value. May not be possible.

Therefore, the present invention provides a display control circuit that can display an image having the same brightness as or close to the brightness corresponding to the current frame gradation value by overshoot driving, and a liquid crystal including the display control circuit. An object is to provide a display device and a display control method.

A first aspect of the present invention is a display control circuit for controlling display on a liquid crystal display panel based on an image signal given from the outside,
A writing gradation value used for correction for emphasizing a temporal change of a signal with respect to the image signal is given in the previous frame gradation value which is a gradation value in a frame immediately before the current frame and in the current frame. A storage unit that stores a plurality of lookup tables for determination based on a combination with a current frame gradation value that is a gradation value of the image signal;
A writing gradation value used for correction for selecting one look-up table from the plurality of look-up tables for each frame period and emphasizing a temporal change of the signal with respect to the image signal from the look-up table. A write gradation selection unit that reads and outputs
The plurality of look-up tables indicate that the writing gradation value used when transitioning from a first gradation value to a second gradation value different from the first gradation value is the current frame level. Including at least one first table that is a tone value higher than the tone value and a second table that is a tone value lower than the current frame tone value,
The writing gradation selection unit selects any one of the first table and the second table at a predetermined cycle, and reads the writing gradation value from the table. Features.

According to a second aspect of the present invention, in the first aspect of the present invention,
The writing gradation selection unit sequentially selects a lookup table one by one from the first and second tables, and reads and outputs the writing gradation value from the lookup table. And

According to a third aspect of the present invention, in the first aspect of the present invention,
Each of the first and second tables comprises a lookup table;
The writing gradation selection unit alternately selects the first table and the second table, and reads the writing gradation value from the selected first table or the second table. It is characterized by outputting.

According to a fourth aspect of the present invention, in the first aspect of the present invention,
The display control circuit further includes a parameter unit that is connected to the writing gradation selection unit and stores a usage ratio of the plurality of lookup tables.
The writing gradation selection unit sequentially reads out and outputs the writing gradation values from the plurality of look-up tables according to the usage ratio stored in the parameter unit.

A fifth aspect of the present invention is a liquid crystal display device capable of displaying a three-dimensional image by alternately displaying a right-eye image and a left-eye image every frame period,
Pixels arranged in a matrix corresponding to the plurality of scanning signal lines, the plurality of data signal lines intersecting with the plurality of scanning signal lines, and the intersections of the plurality of scanning signal lines and the plurality of video signal lines, respectively. A liquid crystal display panel having a forming portion;
A scanning signal line driving circuit for selectively activating the plurality of scanning signal lines;
A data signal line driving circuit for applying image signals given from the outside to the plurality of data signal lines;
A display control circuit according to any one of the first to fourth aspects of the present invention;
A counter connected to a writing gradation selection unit in the display control circuit and counting the number of times given a predetermined signal;
The writing gradation selection unit resets the number of times given the predetermined signal held in the counter when the number of times given the predetermined signal reaches a predetermined value, A lookup table for reading out gradation values is switched.

According to a sixth aspect of the present invention, the display control circuit is a display control circuit according to the second or third aspect of the present invention,
In the fifth aspect of the present invention, the predetermined signal is
It is a gate start pulse signal for driving the scanning signal line driving circuit.

According to a seventh aspect of the present invention, in the fifth aspect of the present invention,
Further comprising glasses that make the right-eye image and the left-eye image alternately visible by outputting an opening / closing control signal for opening / closing the shutter every frame period,
The display control circuit is a display control circuit according to the second or third aspect of the present invention,
The predetermined signal is the open / close control signal given to the writing gradation selection unit every two frame periods for displaying one image.

According to an eighth aspect of the present invention, in the fifth aspect of the present invention,
The display control circuit is a display control circuit according to a fourth aspect of the present invention,
The predetermined signal is the number of times of reading for each lookup table obtained based on the usage ratio of the lookup table stored in the parameter section,
The writing gradation selection unit is configured to reset a count value of the counter and switch a look-up table for reading a writing gradation value when the number of readings reaches the predetermined value. .

A ninth aspect of the present invention is the fifth aspect of the present invention,
The writing gradation selection unit uses the two-frame period for displaying the right-eye image and the left-eye image constituting one image as one unit period, and writes the writing level every one or more unit periods. The lookup table for reading the tone value is switched.

A tenth aspect of the present invention is a display control method for controlling display on a liquid crystal display panel based on an image signal given from the outside,
A writing gradation value used for correction for emphasizing a temporal change of a signal with respect to the image signal is given in the previous frame gradation value which is a gradation value in a frame immediately before the current frame and in the current frame. Referencing a plurality of lookup tables for determining based on a combination with a current frame tone value that is a tone value of the image signal;
Write gradation used for correction for selecting one look-up table from the plurality of look-up tables for each frame period and emphasizing temporal change of the signal with respect to the image signal from the look-up table Reading and outputting a value,
The step of reading out and outputting the writing gradation value is included in a plurality of lookup tables, and transits from the first gradation value to a second gradation value different from the first gradation value. A first table in which the writing gradation value used for the first frame is higher than the current frame gradation value, and a second table in which the writing gradation value is lower than the current frame gradation value; Any one of the tables is selected at a predetermined cycle, and the writing gradation value is read from the table.

According to the first aspect of the present invention, when the first gradation value transitions to the second gradation value different from the first gradation value, the temporal change of the signal with respect to the image signal In order to obtain a writing gradation value used for overshoot driving for emphasizing the writing gradation, the writing gradation selecting unit selects the first table having the gradation value higher than the current frame gradation value, or the current frame gradation value. One of the second tables having a gradation value lower than the value is selected at a predetermined cycle. Then, a voltage corresponding to the writing gradation value of the selected table is applied to the liquid crystal as a gradation voltage. As a result, an image having a gradation value higher than the current frame gradation value, which is the target value, and an image having a lower gradation value are displayed in a predetermined cycle. This makes it possible to display an image having a gradation value that is apparently equal to the current frame gradation value. Further, a liquid crystal display device using such a display control circuit only needs to have a plurality of lookup tables, and it is not necessary to make a large circuit change. Thereby, the manufacturing cost of the liquid crystal display device can be reduced, and the liquid crystal display device can be easily manufactured.

According to the second aspect of the present invention, since the overshoot drive is performed by using a plurality of lookup tables in order, the apparent writing gradation value can be adjusted with higher accuracy. Thereby, the liquid crystal display device can display an image having a gradation value closer to the current frame gradation value.

According to the third aspect of the present invention, writing corresponding to the previous frame data and the current frame data is performed by alternately using the lookup table as the first table and the lookup table as the second table. Since the gradation value is read, the viewer can visually recognize an image having a gradation value corresponding to the average value of the written gradation values. Thereby, there exists an effect similar to the 1st aspect of this invention.

According to the fourth aspect of the present invention, since the usage ratios of the plurality of lookup tables are stored in the parameter part, the usage ratio can be adjusted to a desired value. As a result, an image having a gradation value closer to the current frame gradation value can be displayed. Further, by providing the parameter unit, the number of lookup tables stored in the storage unit can be reduced, so that the capacity of the storage unit can be reduced. Thereby, the manufacturing cost of a liquid crystal display device can be reduced.

According to the fifth aspect of the present invention, the counter counts the number of times the predetermined signal is given to the writing gradation selection unit, and when the counted number reaches a predetermined value, the writing gradation Switches the lookup table from which values are read. In this case, the timing for switching the look-up table can be easily changed by changing the predetermined value.

According to the sixth aspect of the present invention, when the number of times the gate start pulse signal is given reaches a predetermined value, the number of counters is reset and the look-up table for reading out the writing gradation value is switched. Therefore, the same effect as that of the fifth aspect of the present invention is achieved.

According to the seventh aspect of the present invention, the number of counters is reset when the opening / closing control signal for opening and closing the shutter of the dedicated glasses used when viewing the 3D display reaches a predetermined value. In addition, since the look-up table for reading out the writing gradation value is switched, the same effect as in the fifth aspect of the present invention can be obtained.

According to the eighth aspect of the present invention, when the number of times of reading for each lookup table obtained based on the usage ratio of the lookup table stored in the parameter section becomes a predetermined value, the count value of the counter Is reset, and the look-up table for reading out the writing gradation value is switched, so that the same effect as in the fifth aspect of the present invention can be obtained.

According to the ninth aspect of the present invention, the lookup table is switched every one or two or more unit periods, with two frame periods for displaying the right-eye image and the left-eye image as one unit. As a result, the right-eye image and the left-eye image that form one image are overshoot-driven in the same manner. For this reason, it is possible to prevent the quality of the displayed image from being deteriorated.

According to the tenth aspect of the present invention, there are the same effects as in the first aspect of the present invention.

It is a figure which shows the VT) characteristic which is the relationship between the gradation voltage of a liquid crystal display panel used for a liquid crystal display device, and the transmittance | permeability. It is a figure which shows the relationship between the gradation value calculated | required based on the VT characteristic shown in FIG. 1, and a gradation voltage. (A) is a figure which shows the strong overshoot drive when changing from a high gradation to a low gradation, (b) is a figure which shows a weak overshoot drive, (c) is a figure which shows a gradation value. It is a figure which shows the overshoot drive for making it the present frame gradation value apparently. 1 is a block diagram illustrating an overall configuration of a liquid crystal display device according to a first embodiment of the present invention. FIG. 5 is a block diagram for explaining a functional configuration of a timing controller IC included in the liquid crystal display device shown in FIG. 4. FIG. 5 is a block diagram for explaining a detailed configuration of an overshoot drive unit and an SDRAM included in the liquid crystal display device shown in FIG. 4. (A) And (b) is a figure which shows the structure of OS table respectively stored in SDRAM contained in the liquid crystal display device shown in FIG. FIG. 5 is a diagram showing an operation of a writing gradation selection unit included in an overshoot drive unit of the liquid crystal display device shown in FIG. 4. It is a block diagram for demonstrating the detailed structure of the overshoot drive part and SDRAM which are included in the liquid crystal display device which concerns on the 2nd Embodiment of this invention. (A) And (b) is a figure which shows the structure of the OS table respectively stored in SDRAM shown in FIG. (C) and (d) are diagrams each showing a configuration of an OS table stored in the SDRAM shown in FIG. FIG. 10 is a diagram illustrating an operation of a write gradation selection unit included in the overshoot drive unit illustrated in FIG. 9. It is a block diagram for demonstrating the detailed structure of the overshoot drive part and SDRAM of the liquid crystal display device which concern on the 3rd Embodiment of this invention. It is a block diagram for demonstrating the function structure of the timing controller IC contained in the liquid crystal display device which concerns on the modification common to 1st and 2nd embodiment. FIG. 15 is a block diagram for explaining a detailed configuration of an overshoot drive unit and an SDRAM included in the timing controller IC shown in FIG. 14. (A) is a figure which shows the strong overshoot drive at the time of a transition from a low gradation to a high gradation, (b) is a figure which shows a weak overshoot drive, (c) is a figure which shows a gradation value. It is a figure which shows the overshoot drive for making it the present frame gradation value apparently. (A) And (b) is a figure which shows the structure of OS table stored in SDRAM contained in the liquid crystal display device based on the 4th Embodiment of this invention, respectively.

Before explaining embodiments of the present invention, a basic study conducted by the present inventor in order to solve the above problems will be described. In the basic examination of the present invention and each embodiment described later, the liquid crystal display device is described as a display device that displays an image of 128 gradations, but the liquid crystal display device of the present invention is not limited to this.

<1. Basic study>
FIG. 1 is a diagram showing a VT (Voltage-Transmittance) characteristic that is a relationship between a gradation voltage and a transmittance of a liquid crystal display panel used in the liquid crystal display device, and FIG. 2 shows the VT characteristic shown in FIG. It is a figure which shows the relationship between the gradation value calculated | required based on and a gradation voltage. As shown in FIG. 1, the curve indicating the VT characteristic is an S-shaped curve, and the slope of the rising area (black gradation area) is very small compared to the slope of the halftone area. As described above, in the rising region, the amount of change in light transmittance with respect to the gradation voltage is very small. Therefore, in order to perform gamma correction with a gamma value of 2.2 on the input image signal, FIG. As shown, it is necessary to widen the interval between the gradation voltage values corresponding to the gradation values in the rising region.

On the other hand, in an image having a short one frame period such as a 3D display image, it is necessary to make a transition from a high gradation to a low gradation in a short time by overshoot driving in order to increase the display speed of the image. For this reason, a writing gradation voltage corresponding to the gradation value of the black gradation region is often supplied to the liquid crystal display panel. In the present specification, the transition from the high gradation to the low gradation means a case where the current frame gradation value is lower than the previous frame gradation value.

For example, when a still image is displayed in 3D, it is necessary to alternately display an L image and an R image every frame period. In this case, if a low gradation R image is displayed by overshoot driving from a high gradation L image, the gradation value of the R image cannot be made the current frame gradation value, and is obtained by overshoot driving. An error may occur between the gradation value and the current frame gradation value. If this error is accumulated when switching from the L image to the R image, the luminance of the displayed still image greatly differs from the luminance corresponding to the current frame gradation value.

For example, a case will be described in which a 32-gradation R image is displayed from a 128-gradation L image by overshoot driving. First, it is assumed that an image of 28 gradations is displayed by applying a writing gradation voltage corresponding to a writing gradation value of 0 gradation. This means that a strong overshoot drive was performed because the write gradation voltage was too low. Next, it is assumed that an image of 36 gradations is displayed by applying a writing gradation voltage corresponding to the writing gradation value of one gradation. This means that a weak overshoot drive was performed because the write gradation voltage was too high. Thus, by changing the writing gradation voltage corresponding to one gradation, it is not possible to display a 32-gradation image that is the current frame gradation value. In this way, when transitioning from a high gradation to a low gradation, even if the write gradation voltage is increased or decreased by one gradation and the overshoot drive is performed, the gradation value remains the target gradation. There is a problem that the current frame gradation value cannot be obtained because the value becomes too high or too low than the value. In the above description, the case of displaying a still image has been described, but the same applies to the case of displaying a moving image.

Therefore, the inventor of the present invention solved the above problem as follows. 3A is a diagram showing a strong overshoot drive when transitioning from a high gray level to a low gray level, and FIG. 3B is a diagram showing a weak overshoot drive. (C) is a diagram showing overshoot driving for apparently changing the gradation value to the current frame gradation value.

As shown in FIG. 3A, when a strong overshoot drive is performed, a higher write gradation voltage is applied as the write gradation voltage corresponding to the current frame gradation value, and thus the display is performed. The gradation value of the obtained image becomes lower than the current frame gradation value. In addition, as shown in FIG. 3B, when a weak overshoot drive is performed, a lower write gradation voltage is applied as a write gradation voltage corresponding to the current frame gradation value. The gradation value of the displayed image becomes higher than the current frame gradation value.

Therefore, as an OS table used for overshoot driving, an OS table in which the writing gradation value is set to be higher than the current frame gradation value, and the writing gradation value from the current frame gradation value. Two OS tables of the OS table set so as to be lower are also prepared. Then, by performing overshoot drive using these two OS tables alternately, as shown in FIG. 3C, the gradation values of the displayed image are apparently averaged, and the viewer is It looks as if the image of the current frame gradation value is displayed.

For example, for an input image signal in a certain frame period, a writing gradation voltage (for example, the writing gradation value is reduced to 0 gradation) such that the gradation value of the displayed image is lower than the current frame gradation value. Overshoot drive is performed using an OS table for applying the corresponding). To apply a writing gradation voltage (for example, the writing gradation value corresponds to one gradation) such that the gradation value becomes higher than the current frame gradation value to the input image signal in the next frame period Overshoot drive is performed using another OS table. In this way, an OS table having a writing gradation value of 0 gradation and an OS table having a writing gradation value of 1 gradation are prepared, and overshoot driving is performed using these OS tables in order. Do. As a result, it appears that an image of the current frame gradation value is displayed.

The liquid crystal display devices according to the first to third embodiments made by the present inventor based on the above basic study will be described below with reference to the accompanying drawings.

<2. First Embodiment>
<2.1 Overall configuration and operation overview>
FIG. 4 is a block diagram showing the overall configuration of the liquid crystal display device according to the present embodiment. The liquid crystal display device includes a liquid crystal display panel 5 including a display unit 500, a control substrate 10, a source driver (data signal line driving circuit) 300, and a gate driver (scanning signal line driving circuit) 400. On the control board 10, a timing controller IC 100 as a display control circuit and a flash memory 200 as a nonvolatile memory are mounted. Note that both or one of the source driver 300 and the gate driver 400 may be included in the liquid crystal display panel 5. That is, both or one of the source driver 300 and the gate driver 400 may be monolithically formed on the glass substrate that constitutes the liquid crystal display panel 5.

The liquid crystal display device according to the present embodiment is a display device that displays only 3D images. However, the liquid crystal display device of the present invention may be a display device that displays only a 2D image or displays a 3D image and a 2D image.

The display unit 500 includes a plurality of source lines (data signal lines) SL, a plurality of gate lines (scanning signal lines) GL, and pixels provided corresponding to the intersections of the source lines SL and the gate lines GL. A forming portion is formed. In other words, the display unit 500 has a plurality of pixel formation units. The plurality of pixel forming portions are arranged in a matrix to form a pixel array. Each pixel forming portion includes a thin film transistor 50 that is a switching element having a gate terminal connected to a gate line GL that passes through a corresponding intersection and a source terminal connected to a source line SL that passes through the intersection, The pixel electrode 51 connected to the drain terminal, the common electrode 52 provided in common to the plurality of pixel formation portions, and the pixel electrode 51 and common electrode provided in common to the plurality of pixel formation portions. And a liquid crystal layer (not shown) sandwiched between them. A pixel capacitor Cp is constituted by a liquid crystal capacitor formed by the pixel electrode 51 and the common electrode 52. Normally, an auxiliary capacitor is provided in parallel with the liquid crystal capacitor in order to reliably hold the voltage in the pixel capacitor Cp. However, the auxiliary capacitor is not an essential constituent element in the present invention, and thus the description and illustration thereof are omitted. . Further, only the components corresponding to one pixel forming portion are shown in the display portion 500 of FIG.

The timing controller IC 100 receives a timing signal TS such as an image signal DAT, a horizontal synchronization signal, and a vertical synchronization signal from the outside, performs a predetermined correction process on the image signal DAT, and then performs a digital image signal DV and a source driver 300. A source start pulse signal SSP, a source clock signal SCK, and a latch strobe signal LS are output to the source driver 300. In addition, a gate start pulse signal GSP and a gate clock signal GCK for controlling the operation of the gate driver 400 are output to the gate driver 400. Immediately after the power is turned on, the timing controller IC 100 reads data necessary for the correction processing of the image signal DAT from the flash memory 200 and writes the read data to the internal volatile memory.

The source driver 300 receives the digital image signal DV, the source start pulse signal SSP, the source clock signal SCK, and the latch strobe signal LS output from the timing controller IC 100, and applies a driving image signal to each source line SL. At this time, the source driver 300 sequentially holds the digital image signal DV indicating the voltage (write gradation value) to be applied to each source line SL at the timing when the pulse of the source clock signal SCK is generated. The held digital image signal DV is converted into an analog voltage (write gradation voltage) at the timing when the pulse of the latch strobe signal LS is generated. The converted analog voltage is simultaneously applied to all the source lines SL as a drive image signal.

The gate driver 400 repeats the application of the active scanning signal to each gate line GL with a period of one frame based on the gate start pulse signal GSP and the gate clock signal GCK output from the timing controller IC100.

As described above, the driving image signal is applied to each source line SL and the active scanning signal is applied to each gate line GL, whereby an image based on the image signal DAT transmitted from the outside is displayed on the liquid crystal display panel. 5 on the display unit 500.

<2.2 Timing controller IC configuration>
FIG. 5 is a block diagram for explaining a functional configuration of the timing controller IC 100 in the present embodiment. The timing controller IC 100 includes a data reception unit 110, a data processing unit 120, a line buffer 130, a data transmission unit 140, a timing control unit 150, an SDRAM 160 as a storage unit, and an SDRAM interface unit 170. The data processing unit 120 includes a gamma correction unit 121 and an overshoot drive unit 122.

The data receiving unit 110 receives an image signal DAT transmitted from the outside and gives it to the data processing unit 120.

The gamma correction unit 121 in the data processing unit 120 performs gamma correction according to the characteristics of the liquid crystal display panel 5 used. Since this gamma correction is well known to those skilled in the art, description thereof is omitted. Various known gamma corrections can be used as the gamma correction in the present embodiment.

The overshoot drive unit 122 in the data processing unit 120 performs overshoot drive that is correction for emphasizing temporal change of the signal with respect to the image signal DAT on which gamma correction has been performed. Write gradation data WD indicating a tone value is generated and output to the line buffer 130.

FIG. 6 is a block diagram for explaining detailed configurations of the overshoot drive unit 122 and the SDAM 160 in the present embodiment. As shown in FIG. 6, the overshoot drive unit 122 includes a write gradation selection unit 21 and a counter 22. The writing gradation selection unit 21 is configured to input current frame gradation value indicated by input data (hereinafter referred to as “current frame data”) CD of the current frame to the writing gradation selection unit 21 and one frame of the current frame data CD. Based on the previous frame gradation value indicated by the previous input data (hereinafter referred to as “previous frame data”) PD, the writing gradation value is determined by referring to either the OS table LUT1 or LUT2 stored in the SDRAM 160. Then, write gradation data WD indicating it is output. Note that which of the OS tables LUT1 and LUT2 is referred to is determined by the count value CG of the counter 22, as will be described later.

In the line buffer 130, the writing gradation data WD for one line output from the overshoot driving unit 122 is held.

The data transmission unit 140 takes out the writing gradation data WD from the line buffer 130 and outputs it as a digital image signal DV.

The timing control unit 150 controls operations of the data reception unit 110, the data processing unit 120, and the data transmission unit 140 based on a timing signal TS transmitted from the outside, and also includes a source start pulse signal SSP, a source clock signal SCK, A latch strobe signal LS, a gate start pulse signal GSP, and a gate clock signal GCK are output. Further, the gate clock signal GCK is also output to the write gradation selection unit 21. The counter 22 connected to the writing gradation selection unit 21 counts the number of times the gate start pulse signal GSP is given and holds it as a count value CG.

The operation of the write gradation selection unit 21 included in the overshoot drive unit 122 will be described. When the write tone selection unit 21 receives the current frame data CD from the gamma correction unit 121, it further reads the previous frame data PD stored in the SDRAM 160. At this time, the current frame data CD received by the writing gradation selection unit 21 is stored in the SDRAM 160 as the previous frame data PD in the next frame of the current frame. Then, when the count value CG held in the counter 22 is 1 or 2, the writing gradation selection unit 21 performs overshoot driving using the OS table used in the immediately preceding frame period. On the other hand, when the count value CG is 3, the count value CG is reset to 1 and overshoot driving is performed using an OS table different from the OS table used in the immediately preceding frame period.

SDRAM 160 is a volatile memory. The SDRAM 160 stores various data (hereinafter referred to as “overshoot drive data”) used for processing in the overshoot drive unit 122. The overshoot drive data is composed of previous frame data PD and OS tables LUT1 and LUT2.

The SDRAM interface unit 170 functions as an interface between the data processing unit 120 and the SDRAM 160 when data is written to the SDRAM 160 and data is read from the SDRAM 160.

The flash memory 200 is also mounted on the control board 10 on which the timing controller IC 100 is mounted. The flash memory 200 stores at least OS tables LUT1 and LUT2 which are part of the overshoot drive data. Since the flash memory 200 is nonvolatile, the contents of the OS tables LUT1 and LUT2 are not lost even when the power supply of the liquid crystal display device is turned off. The timing controller IC 100 reads the OS tables LUT1 and LUT2 from the flash memory 200 and writes them into the internal SDRAM 160 immediately after the liquid crystal display device is powered on. Thus, by adopting a configuration in which the OS tables LUT1 and LUT2 are written in the flash memory 200, the contents of the OS tables LUT1 and LUT2 can be easily rewritten from the outside.

<2.3 Configuration of OS table>
FIGS. 7A and 7B are diagrams showing the configurations of the OS tables LUT1 and LUT2 stored in the SDRAM 160, respectively. In order to reduce the memory capacity, the OS table LUT1 (also referred to as “first table”) and LUT2 (also referred to as “second table”) are provided with data for 4 gradations × 4 gradations. Yes. In FIG. 7A and FIG. 7B, the numerical value indicated in the leftmost column indicates the previous frame gradation value, and the numerical value indicated in the uppermost line indicates the current frame gradation value. Is shown. A numerical value written at a position where each row and each column intersect indicates a writing gradation value determined based on a combination of each previous frame gradation value and each current frame gradation value. . For example, when the OS table LUT1 shown in FIG. 7A is used to transition from an image having a previous frame gradation value of 128 gradations to an image having a current frame gradation value of 32 gradations, the first floor is used. This indicates that the write gradation voltage corresponding to the tone write gradation value may be applied to the liquid crystal display panel 5.

From FIG. 7A and FIG. 7B, in the case of transition from a low gradation value to a high gradation value, each corresponding written gradation value (upper right of the diagonal line of each table). Are the same values. Therefore, the same overshoot drive is performed regardless of which of the OS table LUT1 and the OS table LUT2.

However, when transitioning from a high gradation value to a low gradation value, each corresponding writing gradation value (the writing gradation value written in the lower left of the diagonal line of each table) is Each value of the OS table LUT1 is larger by one than the value of the OS table LUT2. For this reason, the overshoot drive performed using the OS table LUT1 is a weak overshoot drive, and the overshoot drive performed using the OS table LUT2 is a strong overshoot drive.

In order to reduce the memory capacity and reduce the cost, the OS tables LUT1 and LUT2 include the number of gradations × the number of gradations (for example, 128 gradations × 128 gradations in the case of 128 gradation display). ) Is not stored, and data smaller than this, for example, data of 16 gradations × 16 gradations is generally stored. For this reason, the combination of the previous frame gradation value and the current frame gradation value may not exist in the OS table. In such a case, writing is performed by performing interpolation (typically linear interpolation) based on the gradation value using a combination of the previous frame gradation value and the current frame gradation value existing in the OS table. The gradation value is determined.

<2.4 Overshoot drive method>
A method of overshoot driving in this embodiment will be described. FIG. 8 is a diagram illustrating the operation of the write tone selection unit 21 included in the overshoot drive unit 122. Note that the gate start pulse signal GSP is supplied from the timing control unit 150 to the writing tone selection unit 21 at the timing when the gamma correction current frame data CD is supplied from the gamma correction unit 121 to the writing tone selection unit 21. . The counter 22 counts the number of gate start pulse signals GSP given to the writing gradation selection unit 21 and holds the count value CG in the counter 22. Then, when the count value CG of the counter 22 becomes 3, the writing gradation selection unit 21 resets the count value CG to 1. At the same time, the writing gradation selection unit 21 switches the OS table to be used.

As shown in FIG. 8, in the first frame period, when the L image data L1 is supplied as the current frame data CD to the write gradation selection unit 21, the write gradation selection unit 21 stores the previous frame data PD in the SDRAM 160. The stored R image data R0 is read. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21. The counter 22 counts the number of times the gate start pulse signal GSP is given, and the counter 22 holds 1 as the count value CG. Therefore, the write tone selection unit 21 uses the OS table LUT1 to write the write tone data WD from the L image data L1 as the current frame data CD and the R image data R0 as the previous frame data PD. The data OSL1 is obtained as follows and output to the line buffer 130. Note that the L image data L1 is stored in the SDRAM 160 for use as the previous frame data PD in the second frame period.

In the second frame period, when the R image data R1 is supplied as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the L image data stored in the SDRAM 160 as the previous frame data PD. Read L1. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG held in the counter 22 becomes 2. Therefore, the write tone selection unit 21 continues to use the OS table LUT1 to write the write tone data from the R image data R1 as the current frame data CD and the L image data L1 as the previous frame data PD. Data OSR1 is obtained as WD and output to line buffer 130. The R image data R1 is stored in the SDRAM 160 for use as the previous frame data PD in the third frame period.

In the third frame period, when the L image data L2 is supplied as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the R image data stored in the SDRAM 160 as the previous frame data PD. Read R1. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG held in the counter 22 becomes 3. For this reason, the count value CG is reset to 1 and switched to use the OS table LUT2. The writing gradation selection unit 21 uses the OS table LUT2 as data for writing gradation data WD from the L image data L2 as the current frame data CD and the R image data R1 as the previous frame data PD. OSL2 is obtained and output to the line buffer 130. The L image data L2 is stored in the SDRAM 160 for use as the previous frame data PD in the fourth frame period.

In the fourth frame period, when the R image data R2 is supplied as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the L image data stored in the SDRAM 160 as the previous frame data PD. Read L2. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG held in the counter 22 becomes 2. Therefore, the write tone selection unit 21 continues to use the OS table LUT2 to obtain data OSR2 as the write tone data WD from the R image data R2 and the L image data L2, and outputs the data OSR2 to the line buffer 130. The R image data R2 is stored in the SDRAM 160 for use as the previous frame data PD in the fifth frame period.

In the fifth frame period, when the L image data L3 is given as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the R image data stored in the SDRAM 160 as the previous frame data PD. Read R2. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG held in the counter 22 becomes 3. For this reason, the count value CG is reset to 1 and switched to use the OS table LUT1. The writing gradation selection unit 21 uses the OS table LUT2 as data for writing gradation data WD from the L image data L3 as the current frame data CD and the R image data R2 as the previous frame data PD. OSL3 is obtained and output to the line buffer 130. The L image data L2 is stored in the SDRAM 160 for use as the previous frame data PD in the sixth frame period. Similarly, overshoot driving is performed after the sixth frame period.

In this way, the liquid crystal display device switches between the two OS tables LUT1 and LUT2 every two frame periods, that is, for each set of L image and R image that are visually recognized as one image when 3D display is performed. Perform overshoot drive. As a result, the OS table LUT1 is used in the first and second frame periods, so the overshoot drive is weak. In the third and fourth frame periods, the OS table LUT2 is used, so the overshoot drive is strong. In the fifth and sixth frame periods, since the OS table LUT2 is used, weak overshoot driving is performed. In the same manner, the strong overshoot drive and the weak overshoot drive are repeated. Thereby, the viewer can visually recognize the image displayed by the writing gradation voltage corresponding to the gradation of 0.5, which is the average value of the gradation 0 and the gradation 1. it can.

<2.5 Effect>
According to the present embodiment, the writing gradation values corresponding to the previous frame data PD and the current frame data CD are read using the two OS tables LUT1 and LUT2 alternately. The viewer can visually recognize an image having a gradation value corresponding to the average value of the written gradation values.

In addition, the liquid crystal display device includes only two OS tables LUT1 and LUT2 in which the writing gradation value at the time of transition from the high gradation to the low gradation is set to a value higher and lower than the current frame gradation value. Well, no major circuit changes are required. Thereby, the manufacturing cost of the liquid crystal display device can be reduced, and the liquid crystal display device can be easily manufactured.

In addition, the counter 22 counts the number of times that the gate start pulse signal GSP for driving the gate driver 400 is given to the writing gradation selection unit 21, and the counted number becomes 3 (predetermined value). The OS table for reading out the writing gradation value is switched. In this case, the timing for switching the OS table can be easily changed by changing the predetermined value.

Further, the OS table is switched every one or two or more unit periods, with two frame periods for displaying the L image and the R image as one unit. As a result, the L image and the R image constituting one image are overshot in the same manner. For this reason, it is possible to prevent the quality of the displayed image from being deteriorated.

<2.6 Modification>
In this embodiment, the OS table to be used is switched every 2 frame periods. However, the OS table to be used may be switched every even period such as every 4 frame periods or every 6 frame periods. In the present embodiment, since the liquid crystal display device that performs 3D display using the parallax of the left eye and the right eye has been described, the L image and the R image are overshot using the same OS table. However, when performing 2D display, the OS table may be switched every desired number of frame periods.

<3. Second Embodiment>
The liquid crystal display device according to the second embodiment of the present invention is a display device in which the number of OS tables stored in the SDRAM 160 of the first embodiment is increased. In the present embodiment, the configuration and operation of the liquid crystal display device according to the first embodiment are the same except for the configuration of the OS table stored in the SDRAM 160 and the configuration and operation of the overshoot drive unit 122. Therefore, among the components of the liquid crystal display device according to the present embodiment, the same components as those of the liquid crystal display device according to the first embodiment are denoted by the same reference numerals and description thereof will be omitted as appropriate. . The block diagram showing the overall configuration of the liquid crystal display device according to this embodiment is the same as the block diagram shown in FIG. 4, and the block diagram for explaining the functional configuration of the timing controller IC 100 is the block shown in FIG. Since it is the same as the figure, those figures and explanation are omitted.

<3.1 Configuration of Overdrive Drive Unit>
FIG. 9 is a block diagram for explaining detailed configurations of the overshoot drive unit 122 and the SDRAM 160 in the present embodiment. As shown in FIG. 9, the overshoot drive data stored in the SDRAM 160 is composed of the previous frame data PD and the four OS tables LUT1 to LUT4.

The overshoot drive unit 122 includes a writing gradation selection unit 21 and a counter 22. The writing gradation selection unit 21 is configured to display the current frame gradation value indicated by the current frame data CD given to the writing gradation selection unit 21 and the previous frame indicated by the previous frame data PD one frame before the current frame data CD. Based on the gradation value, the writing gradation value is determined by referring to any of the four OS tables LUT1 to LUT4 stored in the SDRAM 160, and the writing gradation data WD indicating it is output. Note that which of the OS tables LUT1 to LUT4 is to be referred to is determined by the count value CG of the counter 22, as will be described later.

The timing control unit 150 outputs various control signals for controlling the operations of the data reception unit 110, the data processing unit 120, and the data transmission unit 140 based on a timing signal TS transmitted from the outside, and a gate clock signal. GCK is also output to the write gradation selection unit 21, and the counter 22 counts the number of times of the gate start pulse signal GSP given to the write gradation selection unit 21 and holds it as a count value CG.

The operation of the write gradation selection unit 21 included in the overshoot drive unit 122 will be described. When receiving the current frame data CD from the gamma correction unit 121, the writing gradation selection unit 21 reads the previous frame data PD stored in the SDRAM 160. At this time, the current frame data CD received by the writing gradation selection unit 21 is stored in the SDRAM 160 as the previous frame data PD in the next frame of the current frame. Then, when the count value CG held in the counter 22 is 1 or 2, the writing gradation selection unit 21 performs overshoot driving using the OS table used in the immediately preceding frame period. On the other hand, when the count value CG is 3, the count value CG is reset to 1 and overshoot driving is performed using a new OS table. In this way, overshoot drive is performed using the four OS tables LUT1 to LUT4 in sequence. If all the four OS tables LUT1 to LUT4 are used, the OS tables LUT1 are used again in order.

Since the OS tables LUT1 to LUT4 are written in the flash memory 200 mounted on the control board 10, the contents of the OS tables LUT1 to LUT4 can be easily rewritten from the outside as in the case of the first embodiment. In addition, even if the power of the liquid crystal display device is turned off, the contents of the OS tables LUT1 to LUT4 are not lost.

<3.2 Configuration of OS table>
FIG. 10A to FIG. 11D are diagrams showing the configurations of the four OS tables LUT1 to LUT4 stored in the SDRAM 160, respectively. As in the case of the first embodiment, data for 4 gradations × 4 gradations are prepared in the OS tables LUT1 to LUT4 in order to reduce the memory capacity. The OS table LUT1 is the same table as the OS table LUT1 shown in FIG. The OS tables LUT2 to LUT4 are all the same as the OS table LUT2 shown in FIG. The OS table LUT1 may be referred to as a first table, and the OS tables LUT2 to LUT4 may be referred to as second tables.

For this reason, when transitioning from a low gradation value to a high gradation value, the same overshoot drive is performed regardless of which of the OS tables LUT1 to LUT4. The overshoot drive performed using the OS table LUT1 is a weak overshoot drive, and the overshoot drive performed using the OS tables LUT2 to 4 is a strong overshoot drive.

Therefore, as an example of the transition from the high gradation value to the low gradation value, the gradation value of the R image is changed from the previous frame data PD having the gradation value of 128 to the 32nd gradation. When transitioning to the current key frame data CD, a weak overshoot drive is first performed using the OS table LUT1. Next, a strong overshoot drive is performed using the OS tables LUT2 to LUT4 in order. Thereby, the viewer can visually recognize the R image whose gradation value is closer to 32 gradations.

<3.3 Overshoot drive method>
A method of overshoot driving in this embodiment will be described. FIG. 12 is a diagram illustrating the operation of the write gradation selection unit 21 included in the overshoot drive unit 122. Note that the gate start pulse signal GSP is supplied from the timing control unit 150 to the writing gradation selection unit 21 at the timing when the gamma correction current frame data CD is supplied from the gamma correction unit 121 to the writing gradation selection unit 21. . The counter 22 counts the number of gate start pulse signals GSP given to the writing gradation selection unit 21 and holds the count value CG in the counter 22. When the count value CG of the counter 22 becomes 3, the writing tone selection unit 21 resets the count value CG to 1 and switches the OS table to be used.

As shown in FIG. 11, the first frame period to the fourth frame period are the same as the first frame period to the fourth frame period shown in FIG.

In the fifth frame period, when the L image data L3 is given as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the R image data stored in the SDRAM 160 as the previous frame data PD. Read R2. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG held in the counter 22 becomes 3. For this reason, the count value CG is reset to 1 and switched to use the OS table LUT3. The writing gradation selection unit 21 uses the OS table LUT3 to generate data as writing gradation data WD from the L image data L3 as the current frame data CD and the R image data R2 as the previous frame data PD. OSL3 is obtained and output to the line buffer 130. The L image data L3 is stored in the SDRAM 160 for use as the previous frame data PD in the sixth frame period.

In the sixth frame period, when the R image data R3 is supplied as the current frame data CD to the writing gradation selecting unit 21, the writing gradation selecting unit 21 stores the L image data stored in the SDRAM 160 as the previous frame data PD. Read L3. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG counted by the counter 22 becomes 2. Therefore, the writing gradation selection unit 21 continues to use the OS table LUT3 to write the writing gradation data from the R image data R3 as the current frame data CD and the L image data L3 as the previous frame data PD. The data OSR3 is obtained as WD and output to the line buffer 130. The R image data R3 is stored in the SDRAM 160 for use as the previous frame data PD in the seventh frame period.

In the seventh frame period, when the L image data L4 is supplied as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the R image data stored in the SDRAM 160 as the previous frame data PD. Read R3. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG counted by the counter 22 becomes 3. For this reason, the count value CG is reset to 1 and switched to use the OS table LUT4. The writing gradation selection unit 21 uses the OS table LUT4 to generate data as writing gradation data WD from the L image data L4 as the current frame data CD and the R image data R3 as the previous frame data PD. OSL4 is obtained and output to the line buffer 130. Note that the L image data L4 is stored in the SDRAM 160 for use as the previous frame data PD in the eighth frame period.

In the eighth frame period, when the R image data R4 is supplied as the current frame data CD to the writing gradation selecting unit 21, the writing gradation selecting unit 21 stores the L image data stored in the SDRAM 160 as the previous frame data PD. Read L4. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG counted by the counter 22 becomes 2. Therefore, the writing gradation selection unit 21 continues to use the OS table LUT4, from the R image data R4 as the current frame data CD and the L image data L4 as the previous frame data PD, as writing gradation data WD. Data OSR4 is obtained and output to the line buffer 130. The R image data R4 is stored in the SDRAM 160 for use as the previous frame data PD in the ninth frame period.

In the ninth frame period, when the L image data L4 is supplied as the current frame data CD to the writing gradation selection unit 21, the writing gradation selection unit 21 stores the R image data stored in the SDRAM 160 as the previous frame data PD. Read R4. At this time, the gate start pulse signal GSP is given from the timing control unit 150 to the writing gradation selection unit 21, and the count value CG counted by the counter 22 becomes 3. For this reason, the count value CG is reset to 1 and switched to use the OS table LUT4. The writing gradation selection unit 21 uses the OS table LUT4 to generate data as writing gradation data WD from the L image data L5 as the current frame data CD and the R image data R4 as the previous frame data PD. OSL5 is obtained and output to the line buffer 130. The L image data L5 is stored in the SDRAM 160 for use as the previous frame data PD in the tenth frame period. Overshoot driving is performed in the same manner after the tenth frame period.

In this way, when displaying an image having a gradation value corresponding to the current frame data CD, the writing gradation voltage corresponding to the writing gradation value of the OS table LUT1 is too high, and the OS tables LUT2 to LUT4 Even if the write gradation voltage corresponding to the write gradation value is too low, the four OS tables LUT1 to LUT4 are switched in order every two frame periods. As a result, when the written gradation value is 1, 0, 0, 0, the viewer appears to have displayed an image having a gradation value corresponding to the average value of 0.25. .

<3.4 Effects>
According to the present embodiment, the same effects as those of the first embodiment can be obtained. Further, by performing overshoot driving using the four OS tables LUT1 to LUT4 in order, the writing gradation value can be adjusted with higher accuracy. Thereby, the liquid crystal display device can apparently display an image having a gradation value closer to the current frame gradation value.

<3.5 Modification>
In the present embodiment, first, the writing gradation values are read in order from the OS table LUT1 to the OS table LUT4. However, first, the writing gradation values may be read sequentially from the OS table LUT4 to the OS table LUT1. Further, for example, the OS tables LUT2, LUT3, LUT1, and LUT4 may be read in any order.

When an average of 0.75 gradation writing gradation values is output, three OS tables with a writing gradation value of 1 and a writing gradation value of 0 are used. Only one OS table may be stored in the SDRAM 160, and the writing gradation value may be read sequentially from each OS table. Other writing gradation values can be obtained in the same manner.

Further, the number of OS tables stored in the SDRAM 160 is not limited to four, and may be two or more. If the number of OS tables is large, the average gradation value can be set more finely. Further, the number of OS tables necessary for performing weak overshoot driving and strong overshoot driving may be changed as appropriate according to the gradation value of the current frame data CD, the length of the frame period, and the like. .

<4. Third Embodiment>
The liquid crystal display device according to the third embodiment of the present invention is a display device further including a parameter unit 23 connected to the writing gradation selection unit 21 in the first embodiment. Except for the configuration of the OS table stored in the parameter unit 23 and the SDRAM 160 and the configuration and operation of the overshoot drive unit 122, the configuration and operation of the liquid crystal display device according to the first embodiment are the same. Therefore, among the components of the liquid crystal display device according to the present embodiment, the same components as those of the liquid crystal display device according to the first embodiment are denoted by the same reference numerals and description thereof will be omitted as appropriate. . The block diagram showing the overall configuration of the liquid crystal display device according to this embodiment is the same as the block diagram shown in FIG. 4, and the block diagram for explaining the functional configuration of the timing controller IC 100 is the block shown in FIG. Since it is the same as the figure, those figures and explanation are omitted.

<4.1 Overdrive drive configuration>
FIG. 13 is a block diagram for explaining detailed configurations of the overshoot drive unit 122 and the SDRAM 160 in the present embodiment. As shown in FIG. 13, the overshoot drive unit 122 includes a writing gradation selection unit 21, a counter 22, and a parameter unit 23. The parameter unit 23 is a non-volatile memory that holds the usage ratio PR of the two OS tables LUT1 and LUT2.

The writing gradation selection unit 21 includes a current frame gradation value indicated by the current frame data CD given to the writing gradation selection unit 21, a previous frame gradation value indicated by the previous frame data PD, and a parameter unit 23. Based on the read usage ratio PR, the writing gradation values are read from the OS tables LUT1 and LUT2 stored in the SDRAM 160 as many times as the usage ratio PR.

For example, if the usage ratio PR held in the parameter unit 23 is 1: 1, the write gradation selection unit 21 reads the write floor from the OS tables LUT1 and LUT2 as in the case of the first embodiment. Read the key value alternately. If the usage ratio PR is 1: 3, the write tone selection unit 21 reads the write tone value from the OS table LUT1 only once, as in the second embodiment, and then Repeatedly reading out the write gradation value three times from the OS table LUT2. As described above, the writing gradation selection unit 21 repeatedly reads out the writing gradation values from the OS tables LUT1 and LUT2 as many times as necessary according to the usage ratio PR of the parameter unit 23.

The operation of the writing gradation selection unit 21 will be described. When receiving the current frame data CD from the gamma correction unit 121, the writing gradation selection unit 21 reads the previous frame data PD stored in the SDRAM 160. At this time, the current frame data CD received by the writing gradation selection unit 21 is stored in the SDRAM 160 as the previous frame data PD in the next frame of the current frame.

The writing gradation selection unit 21 reads the usage ratio PR from the parameter unit 23. Next, the writing gradation selection unit 21 obtains the number of times of reading from the OS tables LUT1 and LUT2 based on the read usage ratio PR. Next, for example, the number of reads of the OS table LUT1 is counted by the counter 22, and when the count value of the counter 22 reaches the number of reads determined based on the usage ratio PR, the count value of the counter 22 is reset and the OS The table LUT1 is switched to the OS table LUT2, the writing gradation value is read, and overshoot driving is performed. Switching from the OS table LUT2 to the OS table LUT1 is performed in the same manner.

As described above, the write gradation voltage is set more finely by changing the number of times of reading the write gradation value from the two OS tables LUT1 and LUT2 based on the usage ratio PR held in the parameter unit 23. Can do.

<4.2 Configuration of OS table>
The configurations of the OS tables LUT1 and LUT2 stored in the SDRAM 160 are the same as the configurations of the OS tables LUT1 and LUT2 of the first embodiment shown in FIGS. 7A and 7B, respectively. Description and illustration are omitted.

<4.3 Overshoot drive method>
The overshoot driving method in this embodiment differs depending on the usage ratio PR held in the parameter unit 23. For example, when two OS tables LUT1 and LUT2 are stored in the SDRAM 160, and the usage ratio PR held in the parameter unit 23 is 1: 1, the overshoot shown in FIG. 8 of the first embodiment is performed. This is the same driving method as the driving method. Further, when the usage ratio PR is 1: 3, the driving method is the same as the overshoot driving method shown in FIG. 11 of the second embodiment. Therefore, the illustration and description of these overshoot driving are omitted.

<4.4 Effects>
According to the present embodiment, the same effects as those of the first embodiment can be obtained. Further, since the usage ratio PR of the two OS tables LUT1, LUT2 is stored in the parameter unit 23, the usage ratio PR can be set to a desired value. As a result, an image having a gradation value closer to the current frame gradation value can be displayed. Furthermore, since the number of OS tables stored in the SDRAM 160 can be reduced by providing the parameter unit 23, a memory having a small capacity can be used as the SDRAM 160. Thereby, the manufacturing cost of a liquid crystal display device can be reduced.

<4.5 Modification>
In the above embodiment, the OS table for performing the weak overshoot drive and the OS table for performing the strong overshoot drive are used according to the usage ratio PR of the parameter unit 23. However, the number of OS tables for performing weak overshoot driving and the number of OS tables for performing strong overshoot driving are appropriately determined according to the gradation value of the current frame data CD, the length of one frame period, and the like. It may be changed.

<5. Modification Common to First and Second Embodiments>
In the first and second embodiments, the counter 22 counts the number of times that the gate start pulse signal GSP is given to the writing gradation selection unit 21, and when the count value CG of the counter 22 reaches a predetermined number. The OS table to be used was switched. However, the OS table can be switched using a signal for switching the shutter of the dedicated glasses when the viewer views a 3D image.

FIG. 14 is a block diagram for explaining a functional configuration of a timing controller IC 100 included in a liquid crystal display device according to a modification common to the first and second embodiments, and FIG. 15 is included in the timing controller IC 100. 2 is a block diagram for explaining detailed configurations of an overshoot drive unit 122 and an SDRAM 160. Of the constituent elements included in FIGS. 14 and 15, the same constituent elements as those included in FIGS. 5 and 6 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. In the following description, a modification example of the first embodiment will be described, but the same applies to the modification example of the second embodiment.

As shown in FIGS. 14 and 15, the liquid crystal display device according to this modification includes dedicated glasses 600 connected to a timing control unit 150 included in the timing controller IC 100. The dedicated glasses 600 are provided with two shutters (not shown), and these shutters open and close in conjunction with switching between the L image and the R image displayed on the liquid crystal display panel 5. Specifically, when the viewer visually recognizes the L image with the left eye, the shutter provided at the position of the left eye of the dedicated glasses 600 opens, and when the R image is visually recognized with the right eye, the viewer moves to the position of the right eye of the dedicated glasses 600. The provided shutter opens. Since the viewer views the L image with the left eye and views the R image with the right eye, left and right parallax occurs, and a 3D image can be enjoyed. In conjunction with switching between the L image and the R image, an opening / closing signal OC for controlling the opening / closing of the shutter is supplied from the timing control unit 150 to the dedicated glasses 600 and also to the writing gradation selection unit 21 of the overshoot driving unit 122. Given.

Therefore, for example, if the open / close signal OC output when switching from the R image to the L image is a high level signal, when the write gradation selection unit 21 receives the high level open / close signal OC, The key selection unit 21 switches the OS table from which the writing gradation value is read. Thereby, the same effect as in the case of the first embodiment can be obtained.

Note that the counter 22 may count the number of times the high-level opening / closing signal OC is given, and the OS table may be switched when the counted number reaches a predetermined value. Further, the OS table may be switched when a low-level opening / closing signal is given.

<6. Fourth Embodiment>
In the first to third embodiments and the modifications thereof, the overshoot drive that makes a transition from a high gradation to a low gradation in a short time by overshoot drive has been described. However, as shown in FIG. 1, the curve indicating the VT characteristic is an S-shaped curve, and not only the slope of the rising area (black gradation area) but also the saturation area (white gradation) compared to the inclination of the halftone area. The slope of the area is very small. As described above, even in the saturation region (white gradation region), the amount of change in the light transmittance with respect to the gradation voltage is very small, so that the gamma correction with the gamma value of 2.2 is performed on the input image signal. As shown in FIG. 2, the interval between the gradation voltage values corresponding to the gradation values in the saturation region needs to be wide as in the rising region.

16A is a diagram showing a strong overshoot drive when transitioning from a low gray level to a high gray level, and FIG. 16B is a diagram showing a weak overshoot drive. (C) is a diagram showing overshoot driving for apparently changing the gradation value to the current frame gradation value. In this specification, the transition from the low gradation to the high gradation means a case where the current frame gradation value is higher than the previous frame gradation value.

As shown in FIG. 16A, when a strong overshoot drive is performed, a higher write gradation voltage is applied as the write gradation voltage corresponding to the current frame gradation value, and thus the display is performed. The gradation value of the obtained image becomes higher than the current frame gradation value. In addition, as shown in FIG. 3B, when a weak overshoot drive is performed, a lower write gradation voltage is applied as a write gradation voltage corresponding to the current frame gradation value. The gradation value of the displayed image is lower than the current frame gradation value.

Therefore, as an OS table used for overshoot driving, an OS table in which the writing gradation value is set to be higher than the current frame gradation value, and the writing gradation value from the current frame gradation value. Two OS tables of the OS table set so as to be lower are also prepared. Then, by performing overshoot driving using these two OS tables alternately, as shown in FIG. 16 (c), the gradation values of the displayed image are apparently averaged, and the viewer is informed. It looks as if the image of the current frame gradation value is displayed.

For example, with respect to an input image signal for a certain frame period, a writing gradation voltage (for example, the writing gradation value is set to 220 gradations) such that the gradation value of the displayed image is higher than the current frame gradation value. Overshoot drive is performed using an OS table for applying the corresponding). To apply a writing gradation voltage (for example, the writing gradation value corresponds to 200 gradations) such that the gradation value is lower than the current frame gradation value to the input image signal in the next frame period Overshoot drive is performed using another OS table. In this way, an OS table with a writing gradation value of 220 gradations and an OS table with a writing gradation value of 200 gradations are prepared, and overshoot driving is performed using these OS tables in order. Do. As a result, it appears that an image of the current frame gradation value is displayed.

Therefore, an embodiment corresponding to the first embodiment will be described below with respect to overshoot driving when transitioning from a low gradation to a high gradation. A block diagram showing the entire liquid crystal display device according to the present embodiment, a block diagram showing a functional configuration of the timing controller IC, and a block diagram for explaining detailed configurations of the overshoot drive unit and the SDRAM are respectively shown. Since this is the same as the block diagram shown in FIGS. 4, 5, and 6, the illustration and description thereof are omitted.

<6.1 Configuration of OS table>
FIGS. 17A and 17B are diagrams showing the configurations of the OS tables LUT1 and LUT2 stored in the SDRAM, respectively. In order to reduce the memory capacity, the OS table LUT1 (also referred to as “first table”) and LUT2 (also referred to as “second table”) are provided with data for 4 gradations × 4 gradations. Yes. For example, when the OS table LUT1 shown in FIG. 17A is used to transition from an image having a previous frame gradation value of 32 gradations to an image having a current frame gradation value of 128 gradations, the 220th floor is used. This indicates that the writing gradation voltage corresponding to the gradation writing gradation value may be applied to the liquid crystal display panel.

From FIG. 17A and FIG. 17B, in the case of transition from a high gradation value to a low gradation value, each corresponding written gradation value (lower left of the diagonal line of each table). Are the same values. Therefore, the same overshoot drive is performed regardless of which of the OS table LUT1 and the OS table LUT2.

However, when transitioning from a low gradation value to a high gradation value, each corresponding writing gradation value (the writing gradation value written on the upper right side of the diagonal line of each table) is The values of the OS table LUT1 are larger than the values of the OS table LUT2, respectively. For this reason, the overshoot drive performed using the OS table LUT1 is a strong overshoot drive, and the overshoot drive performed using the OS table LUT2 is a weak overshoot drive. The overshoot drive method is the same as the method shown in FIG.

<6.2 Effects>
According to the present embodiment, the writing gradation values corresponding to the previous frame data PD and the current frame data CD are read using the two OS tables LUT1 and LUT2 alternately. Thereby, even when transitioning from a low gradation to a high gradation, the viewer can visually recognize an image having a gradation value corresponding to the average value of these writing gradation values.

In addition, the liquid crystal display device includes only two OS tables LUT1 and LUT2 in which the writing gradation value at the time of transition from the low gradation to the high gradation is set to a value higher and lower than the current frame gradation value. Well, no major circuit changes are required. Thereby, the manufacturing cost of the liquid crystal display device can be reduced, and the liquid crystal display device can be easily manufactured. In addition, the liquid crystal display device according to the present embodiment also exhibits the other effects described in the first embodiment.

<6.3 Modification>
The method of using two OS tables has been described as a method of overshoot driving for transition from low gradation to high gradation. However, a method of using four OS tables or a method of controlling the use frequency of the two OS tables LUT1 and LUT2 by a parameter part may be used. Since these are the same as the methods described as the second and third embodiments, respectively, their illustrations and descriptions are omitted.

<7. Other>
In each of the above embodiments, the liquid crystal display device is a 3D liquid crystal display device with a short one frame period. However, although the effect is smaller than that of the 3D liquid crystal display device, a 2D liquid crystal display device may be used.

In each of the above embodiments, the present invention is applied only to overshoot driving when transitioning from high gradation to low gradation or overshoot driving when transitioning from low gradation to high gradation. explained. However, the present invention may be applied to any overshoot drive when transitioning from a high gradation to a low gradation and when transitioning from a low gradation to a high gradation.

In each of the above embodiments, the liquid crystal used in the liquid crystal display device is a normally black type in which the transmittance or reflectance is minimum (black display) when no voltage is applied, and the transmittance increases when voltage is applied. It was described as being a liquid crystal. However, it may be a normally white liquid crystal in which the transmittance or reflectance is maximum (the screen becomes white) when no voltage is applied, and the transmittance decreases when a voltage is applied.

The display control circuit of the present invention is used in a display device that performs overshoot driving in order to suppress deterioration in image quality when displaying a moving image, and is particularly used in a liquid crystal television capable of three-dimensional display.

5 ... Liquid crystal display panel 21 ... Write gradation selection unit 22 ... Counter 23 ... Parameter unit 100 ... Timing controller IC
122: Overdrive drive unit 150: Timing control unit 160: SDRAM (storage unit)
400: Gate driver (scanning signal line driving circuit)
LUT1 ... OS table (first table)
LUT2 ... OS table (second table)
LUT3 ... OS table (second table)
LUT4 ... OS table (second table)
CD ... Current frame data GSP ... Gate start pulse signal OC ... Open / close control signal PD ... Previous frame data PR ... Usage ratio

Claims

A display control circuit for controlling display on a liquid crystal display panel based on an image signal given from the outside,
A writing gradation value used for correction for emphasizing a temporal change of a signal with respect to the image signal is given in the previous frame gradation value which is a gradation value in a frame immediately before the current frame and in the current frame. A storage unit that stores a plurality of lookup tables for determination based on a combination with a current frame gradation value that is a gradation value of the image signal;
A writing gradation value used for correction for selecting one look-up table from the plurality of look-up tables for each frame period and emphasizing a temporal change of the signal with respect to the image signal from the look-up table. A write gradation selection unit that reads and outputs
The plurality of look-up tables indicate that the writing gradation value used when transitioning from a first gradation value to a second gradation value different from the first gradation value is the current frame level. Including at least one first table that is a tone value higher than the tone value and a second table that is a tone value lower than the current frame tone value,
The writing gradation selection unit selects any one of the first table and the second table at a predetermined cycle, and reads the writing gradation value from the table. A display control circuit that is characterized.
The writing gradation selection unit sequentially selects a lookup table one by one from the first and second tables, and reads and outputs the writing gradation value from the lookup table. The display control circuit according to claim 1.
Each of the first and second tables comprises a lookup table;
The writing gradation selection unit alternately selects the first table and the second table, and reads the writing gradation value from the selected first table or the second table. The display control circuit according to claim 1, wherein the display control circuit outputs the display control circuit.
The display control circuit further includes a parameter unit that is connected to the writing gradation selection unit and stores a usage ratio of the plurality of lookup tables.
The writing gradation selection unit sequentially reads out and outputs the writing gradation values from the plurality of lookup tables according to a usage ratio stored in the parameter unit. Display control circuit.
A liquid crystal display device capable of displaying a three-dimensional image by alternately displaying a right-eye image and a left-eye image for each frame period,
Pixels arranged in a matrix corresponding to the plurality of scanning signal lines, the plurality of data signal lines intersecting with the plurality of scanning signal lines, and the intersections of the plurality of scanning signal lines and the plurality of video signal lines, respectively. A liquid crystal display panel having a forming portion;
A scanning signal line driving circuit for selectively activating the plurality of scanning signal lines;
A data signal line driving circuit for applying image signals given from the outside to the plurality of data signal lines;
A display control circuit according to any one of claims 1 to 4,
A counter connected to a writing gradation selection unit in the display control circuit and counting the number of times given a predetermined signal;
The writing gradation selection unit resets the number of times given the predetermined signal held in the counter when the number of times given the predetermined signal reaches a predetermined value, A liquid crystal display device characterized by switching a look-up table for reading gradation values.
The display control circuit is a display control circuit according to claim 2 or 3,
6. The liquid crystal display device according to claim 5, wherein the predetermined signal is a gate start pulse signal for driving the scanning signal line driving circuit.
Further comprising glasses that make the right-eye image and the left-eye image alternately visible by outputting an opening / closing control signal for opening / closing the shutter every frame period,
The display control circuit is a display control circuit according to claim 2 or 3,
The liquid crystal display device according to claim 5, wherein the predetermined signal is the open / close control signal given to the writing gradation selection unit every two frame periods for displaying one image.
The display control circuit is a display control circuit according to a fourth invention,
The predetermined signal is the number of times of reading for each lookup table obtained based on the usage ratio of the lookup table stored in the parameter section,
The writing gradation selection unit is configured to reset a count value of the counter and switch a look-up table for reading a writing gradation value when the number of readings reaches the predetermined value. The liquid crystal display device according to claim 5.
The writing gradation selection unit uses the two-frame period for displaying the right-eye image and the left-eye image constituting one image as one unit period, and writes the writing level every one or more unit periods. 6. The liquid crystal display device according to claim 5, wherein a look-up table for reading out the tone value is switched.
A display control method for controlling display on a liquid crystal display panel based on an image signal given from the outside,
A writing gradation value used for correction for emphasizing a temporal change of a signal with respect to the image signal is given in the previous frame gradation value which is a gradation value in a frame immediately before the current frame and in the current frame. Referencing a plurality of lookup tables for determining based on a combination with a current frame tone value that is a tone value of the image signal;
Write gradation used for correction for selecting one look-up table from the plurality of look-up tables for each frame period and emphasizing temporal change of the signal with respect to the image signal from the look-up table Reading and outputting a value,
The step of reading out and outputting the writing gradation value is included in a plurality of lookup tables, and transits from the first gradation value to a second gradation value different from the first gradation value. A first table in which the writing gradation value used for the first frame is higher than the current frame gradation value, and a second table in which the writing gradation value is lower than the current frame gradation value; A display control method comprising: selecting one of the tables at a predetermined cycle and reading the writing gradation value from the table.