[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

US20200098550A1 - Plasma processing apparatus - Google Patents

Plasma processing apparatus Download PDF

Info

Publication number
US20200098550A1
US20200098550A1 US16/582,115 US201916582115A US2020098550A1 US 20200098550 A1 US20200098550 A1 US 20200098550A1 US 201916582115 A US201916582115 A US 201916582115A US 2020098550 A1 US2020098550 A1 US 2020098550A1
Authority
US
United States
Prior art keywords
focus ring
shift
wafer
plasma processing
precision
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US16/582,115
Inventor
Shuichi Takahashi
Takaharu MIYADATE
Takaaki Kikuchi
Atsushi Ogata
Nobutaka Sasaki
Takashi Taira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MIYADATE, TAKAHARU, OGATA, ATSUSHI, SASAKI, NOBUTAKA, KIKUCHI, TAKAAKI, TAIRA, TAKASHI, TAKAHASHI, SHUICHI
Publication of US20200098550A1 publication Critical patent/US20200098550A1/en
Priority to US18/210,012 priority Critical patent/US12261028B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • H01J37/32724Temperature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67103Apparatus for thermal treatment mainly by conduction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/002Cooling arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/20Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated
    • H01J2237/202Movement
    • H01J2237/20221Translation
    • H01J2237/20235Z movement or adjustment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32Processing objects by plasma generation
    • H01J2237/33Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334Etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks

Definitions

  • the present disclosure relates to a plasma processing apparatus.
  • a plasma processing apparatus including a focus ring has been provided (see, Japanese Patent Application Publication No. 2008-244274).
  • the focus ring is disposed to surround an outer periphery of a processing target, e.g., a semiconductor wafer (hereinafter, referred to as “wafer”).
  • the focus ring is provided to control plasma near the outer periphery of the wafer to improve in-plane etching uniformity of the wafer.
  • the present disclosure provides a technique capable of improving the positional accuracy in driving and transferring the focus ring.
  • a plasma processing apparatus including: a table having a wafer support to hold a wafer and a peripheral segment surrounding the wafer support and having through-holes, the peripheral segment having an upper surface lower than that of the wafer support; an outer focus ring disposed over the peripheral segment and having a recess or a cutout at an inner portion of the outer focus ring, the recess or cutout having through-holes; an inner focus ring disposed in the recess or cutout of the outer focus ring; lift pins respectively extending through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring; and shift mechanisms to control shift of the respective lift pins.
  • FIG. 1 shows an example of a configuration of a plasma processing apparatus according to an embodiment
  • FIG. 2 shows an example of configurations of a focus ring, a lift pin, and a shift mechanism according to the embodiment
  • FIG. 3A is a cross-sectional view of the focus ring according to the embodiment.
  • FIG. 3B is a perspective view of the focus ring according to the embodiment.
  • FIG. 3C is a top view of an outer focus ring according to the embodiment.
  • FIG. 3D is a top view showing a state in which an inner focus ring is disposed at the outer focus ring according to the embodiment
  • FIG. 4A explains a first shift control of the inner focus ring according to the embodiment
  • FIG. 4B explains a second shift control of the inner focus ring according to the embodiment
  • FIG. 5 is a cross-sectional view of a focus ring according to a first modification
  • FIG. 6A explains a first shift control of an inner focus ring according to the first modification
  • FIG. 6B explains a second shift control of the inner focus ring according to the first modification.
  • the table side when viewed from the wafer is referred to as “lower side,” and the opposite side is referred to as “upper side.”
  • FIG. 1 shows an example of a configuration of a plasma processing apparatus 5 according to an embodiment.
  • a capacitively coupled parallel plate type plasma processing apparatus will be described as an example of the plasma processing apparatus 5 .
  • the plasma processing apparatus 5 includes a chamber 10 that is a cylindrical vacuum container made of a metal such as aluminum, stainless steel, or the like.
  • the chamber 10 is an example of a processing container and has an inner space serving as a processing chamber where plasma processing is performed.
  • the chamber 10 is grounded.
  • a disk-shaped stage 12 for mounting thereon a target object e.g., a wafer W
  • the stage 12 is supported by a cylindrical support 16 that is made of, e.g., aluminum, and extends vertically upward from the bottom of the chamber 10 and a housing 100 disposed at an inner side of the cylindrical support 16 .
  • a structure 45 is disposed between the stage 12 and the housing 100 .
  • a recess is formed on a contact surface between the structure 45 and the stage 12 , and a sealing member 47 is disposed in the recess.
  • the housing 100 is made of, e.g., ceramic.
  • the cylindrical support 16 includes an aluminum portion 16 a disposed at a lower portion of the chamber 10 and a quartz portion 16 b disposed on the aluminum portion 16 a.
  • An annular gas exhaust passage 18 is formed between the cylindrical support 16 and an inner wall of the chamber 10 .
  • An annular baffle plate 20 is installed at an upstream side or an inlet of the gas exhaust passage 18 , and a gas exhaust port 22 is provided at a downstream side of the gas exhaust passage 18 .
  • the baffle plate 20 is fitted to the cylindrical support portion 16 to be reinforced by the aluminum portion 16 a.
  • a gas exhaust unit (GEU) 26 is connected to the gas exhaust port 22 through a gas exhaust line 24 .
  • the gas exhaust unit 26 has a vacuum pump such as a turbo molecular pump or the like, and thus can reduce a pressure in a plasma generation space S in the chamber 10 to a desired vacuum level.
  • a gate valve 28 for opening and closing a loading/unloading port 27 for the wafer W is disposed an outer sidewall of the chamber 10 .
  • a second high frequency power supply 30 is electrically connected to the stage 12 via a matching unit (MU) 32 and a power feed rod 34 .
  • the second high frequency power supply 30 is configured to output a high frequency power LF at a variable power level, the high frequency power LF having a first frequency (e.g., 13.56 MHz) suitable for controlling energy of ions to be attracted to the wafer W.
  • the matching unit 32 includes a reactance variable matching circuit for matching an impedance of the second high frequency power supply 30 side and an impedance of a load (plasma or the like) side.
  • An electrostatic chuck 36 for attacting and holding the wafer W by a Coulomb force is disposed on an upper surface of the stage 12 .
  • the electrostatic chuck 36 has an electrode 36 a made of a conductive film and two insulating films 36 b .
  • the electrode 36 a is embedded between the two insulating films 36 b , and a DC power supply 40 is electrically connected to the electrode 36 a through a switch 42 and a coated wire 43 .
  • the insulating films 36 b are made of, e.g., a ceramic sintered body.
  • the wafer W is attracted and held on the electrostatic chuck 36 by an electrostatic force such as a Coulomb force generated by a DC current supplied from the DC power supply 40 .
  • a heater H that is a heating element is disposed in the electrostatic chuck 36 .
  • a heater power supply (not shown) is connected to the heater H.
  • the temperature of the wafer W on the electrostatic chuck 36 is controlled to a predetermined temperature by heating using the heater H and cooling using a coolant to be described later. Further, the heater H may be disposed in the stage 12 .
  • a coolant e.g., cooling water cw, having a predetermined temperature is supplied from a chiller unit through lines 46 and 48 and circulated in the coolant flow channel 44 . Accordingly, the temperature of the wafer W on the electrostatic chuck 36 can be controlled by the temperature of the coolant.
  • a heat transfer gas such as He gas from a heat transfer gas supply unit is supplied to a gap between an upper surface of the electrostatic chuck 36 and the backside of the wafer W through a gas supply line 50 .
  • a pusher pin that is raised and lowered while penetrating through the stage 12 in a vertical direction to load and unload the wafer W, and a shift mechanism for driving the pusher pin are provided.
  • a gas shower head 51 is disposed to block an opening formed at the ceiling of the chamber 10 through a shield ring 54 that covers an outer edge of the gas shower head 51 .
  • the gas shower head 51 is made of silicon.
  • the gas shower head 51 also serves as a facing electrode (upper electrode) opposite to the stage 12 (lower electrode).
  • a gas inlet 56 for introducing a gas is formed at the gas shower head 51 .
  • a diffusion space 58 connected to the gas inlet 56 is disposed in the gas shower head 51 .
  • the gas outputted from a gas supply source (GS) 66 is supplied to the diffusion space 58 through the gas inlet 56 , and then diffused and introduced into the plasma generation space S through a plurality of gas injection holes 52 .
  • a first high frequency power supply 57 is electrically connected to the gas shower head 51 through a matching unit (MU) 59 and a power feed line 60 .
  • the first high frequency power supply 57 is configured to output a high frequency power HF at a variable power level, the high frequency power HF having a second frequency (e.g., 40 MHz) that is suitable for plasma generation and is higher than the first frequency.
  • the matching unit 59 includes a reactance variable matching circuit for matching an impedance of the first high frequency power supply 57 side and the impedance of the load (plasma or the like) side.
  • a controller (CNT) 74 includes, e.g., a microcomputer, and is configured to control the operations of the respective components in the plasma processing apparatus 5 and the operation of the entire apparatus.
  • the components of the plasma processing apparatus 5 include the gas exhaust unit 26 , the first high frequency power supply 57 , the second high frequency power supply 30 , the matching units 32 and 59 , the switch 42 for the electrostatic chuck, the gas supply source (GS) 66 , the chiller unit, the heat transfer gas supply unit, and the like.
  • the gate valve 28 is opened, and the wafer W is loaded into the chamber 10 and mounted on the electrostatic chuck 36 . Then, the gate valve 28 is closed, and a predetermined gas is introduced from the gas supply source 66 into the chamber 10 at a predetermined flow rate and a predetermined flow rate ratio. Then, the pressure in the chamber 10 is reduced to a predetermined set value by the gas exhaust unit 26 . Further, the first high frequency power supply 57 is turned on to output the high frequency power HF for plasma generation at a predetermined power level. The high frequency power HF is supplied to the gas shower head 51 through the matching unit 59 and the power feed line 60 .
  • the second high frequency power supply 30 When the high frequency power LF for ion attraction control is applied, the second high frequency power supply 30 is turned on to output the high frequency power LF at a predetermined power level.
  • the high frequency power LF is applied to the stage 12 through the matching unit 32 and the power feed rod 34 .
  • the heat transfer gas is supplied from the heat transfer gas supply unit to the contact surface between the electrostatic chuck 36 and the wafer W.
  • the switch 42 is turned on to apply the DC voltage from the DC power supply 40 to the electrode 36 a of the electrostatic chuck 36 , and the heat transfer gas is confined to the contact surface by electrostatic attractive force.
  • a focus ring FR is disposed at an outer periphery of the stage 12 to annularly surround an outer periphery of the wafer W.
  • the focus ring FR is configured to control the plasma at the outer periphery of the wafer and improve the uniformity of the processing such as an in-plane etching rate of the wafer W or the like.
  • a cover ring CR is disposed to surround an outer periphery of the focus ring FR.
  • the cover ring CR is a ring-shaped member made of, e.g., quartz, and protects an upper surface of the cylindrical support 16 from the plasma.
  • the etching rate and/or the etching shape at an edge portion of the wafer W changes depending on a height of the focus ring FR. Therefore, when the height of an upper surface of the focus ring FT changes due to consumption of the focus ring FR, the sheath shape above the edge portion of the wafer W changes which leads to the change of the processing shape at the edge portion of the wafer W.
  • the edge portion of the wafer W indicates a ring-shaped portion spaced apart from the center of the wafer W by a distance of about 140 mm to 150 mm in a radial direction.
  • the clearance between the components of the plasma processing apparatus 5 may be about 0.1 mm to 0.5 mm. However, the clearance is appropriately omitted in the drawings.
  • the plasma processing apparatus 5 of the present embodiment includes the focus ring FR that is divided into two parts.
  • the focus ring FR is divided into an inner focus ring 38 i and an outer focus ring 38 o.
  • the plasma processing apparatus 5 of the present embodiment is configured to adjust a position of an upper surface of the inner focus ring 38 i that affects the in-plane etching uniformity of the wafer in response to the consumption of the focus ring FR. Further, the plasma processing apparatus 5 of the present embodiment is configured to automatically replace the inner focus ring 38 i without opening and closing the chamber 10 . Therefore, the plasma processing apparatus 5 of the present embodiment further includes shift mechanisms 200 and lift pins 102 in a one-to-one relationship with the shift mechanisms 200 .
  • first shift control the adjustment of the position of the upper surface of the inner focus ring 38 i , which is performed to maintain the uniformity of the plasma processing, is referred to as “first shift control.”
  • second shift control The control for raising the inner focus ring 38 i in order to replace and transfer the inner focus ring 38 i is referred to as “second shift control.”
  • each of the shift mechanisms 200 adjusts a shift amount of the corresponding the lift pin 102 with a driving precision of 0.02 mm at a pitch of 1.0 mm to 2.0 mm, for example.
  • the position of the upper surface of the inner focus ring 38 i is adjusted by the shift of the respective lift pins 102 .
  • each of the shift mechanisms 200 adjusts the shift amount of the corresponding lift pin 102 with a driving precision of about 0.1 mm at a pitch of about 20 mm, e.g., 18 mm.
  • the shift mechanisms 200 move the lift pins 102 at a pitch larger than that used for adjusting the position of the upper surface of the inner focus ring 38 i .
  • the inner focus ring 38 i is lifted.
  • the lifted inner focus ring 38 i can be transferred to the outside of the chamber 10 by the same transfer unit as that used for transferring the wafer W. Thereafter, a new inner focus ring 38 i can be transferred into the chamber 10 in the same manner as for transferring the wafer W.
  • FIG. 2 shows an example of the configurations of the focus ring FR, the lift pins 102 , and the shift mechanisms 200 according to the embodiment.
  • FIGS. 2 to 6B only one lift pin 102 and one shift mechanism are illustrated for the sake of convenience.
  • the shift mechanism 200 will be described with reference to FIG. 2 .
  • the shift mechanism 200 includes a driver 101 , a transmitter 103 , and a thruster 105 .
  • the driver 101 is, e.g., a motor such as a stepping motor, or an air driving mechanism.
  • the driver 101 is arranged at a position apart from the axial direction of the lift pin 102 and is connected to the lift pin 102 through the transmitter 103 and the thruster 105 .
  • the power generated by the driver 101 is transmitted to the thruster 105 and further the lift pin 102 through the transmitter 103 .
  • a piezo actuator may be appropriately employed.
  • a motor such as the stepping motor, the air driver, or the like is employed to perform the first shift control and the second shift control by one shift mechanism 200 .
  • the transmitter 103 is disposed between the driver 101 and the thruster 105 that are disposed on two different axes, and connects the driver 101 and the thruster 105 .
  • the transmitter 103 transmits the power of the driver 101 to the thruster 105 and the lift pin 102 .
  • the transmitter 103 is configured to connect an end portion of the driver 101 and the thruster 105 .
  • the thruster 105 is provided to absorb the deviation caused by disposing the driver 101 and the lift pin 102 at different axes.
  • the driver 101 and the lift pin 102 are connected by the transmitter 103 . Since, however, the driver 101 and the lift pin 102 are disposed at the end portions of the transmitter 103 , a direction of the load applied to the lift pin 102 may be deviated from the vertical direction due to the inclination of the transmitter 103 or the like. When the direction of the load applied to the lift pin 102 is deviated from the vertical direction, the lift pin 102 may be damaged. Therefore, the thruster 105 is provided to absorb the deviation in a shift direction of the lift pin 102 .
  • the shift mechanism 200 By providing the shift mechanism 200 , the power generated by the driver 101 is transmitted to the lift pin 102 , and the lift pin 102 is moved vertically.
  • the driver 101 and the lift pin 102 may be arranged coaxially.
  • the transmitter 103 and the thruster 105 may be omitted.
  • the lift pin 102 is connected to the thruster 105 of the shift mechanism 200 and extends upward from the thruster 105 .
  • the lift pin 102 extends thorough through-holes 12 a , 36 f , and 38 f (see FIG. 3A , which will be described later) extending through the stage 12 , the electrostatic chuck 36 , and the outer focus ring 38 o .
  • the upper end of the lift pin 102 is brought into contact with a bottom surface of the inner focus ring 38 i to support the inner focus ring 38 i .
  • an O-ring 110 is disposed in the through-hole 12 a of the stage 12 to partition a vacuum space and an atmosphere space.
  • the upper end of the lift pin 102 is in contact with the bottom surface of the inner focus ring 38 i even when the first shift control and the second shift control are not performed.
  • the material of the lift pin 102 is not particularly limited, but the lift pin 102 is preferably made of a material that is less likely to generate particles when exposed to plasma, a material that is less likely to be consumed when exposed to plasma, or a material having a high stiffness. Therefore, the lift pin 102 is preferably made of sapphire or quartz.
  • the shift mechanism 200 of the present embodiment is capable of vertically shifting the lift pin 102 during the first shift control and the second shift control.
  • the driver 101 of the shift mechanism 200 is configured to realize a precise vertical shift (first shift control) with a driving precision of 0.02 mm at a pitch of, e.g., 1.0 to 2.0 mm as well as a vertical shift having a larger pitch (second shift control) with a driving precision of about 0.1 mm at a pitch of about 20.0 mm, e.g., 18 mm.
  • the driver 101 of the shift mechanism 200 raises the lift pin 102 in response to the consumption of the inner focus ring 38 i due to the plasma processing. Accordingly, the positional relationship between the position of the upper surface of the inner focus ring 38 i and the position of an upper surface of the wafer W on a wafer support 36 c is adjusted to a predetermined level. In one example, the position of the upper surface of the inner focus ring 38 i can be aligned with the position of the upper surface position of the wafer W on the wafer support 36 c.
  • the driver 101 of the shift mechanism 200 raises the lift pin 102 to a position where the inner focus ring 38 i is separated from the outer focus ring 38 o .
  • the first shift control requires a small pitch and a high driving precision.
  • the second shift control requires a large pitch and does not require the precision as high as that for the first shift control. Therefore, the driver 101 of the shift mechanism 200 can adjust the moving speed of the lift pin 102 during the second shift control to be higher than that during the first shift control.
  • FIG. 3A is a cross-sectional view of the focus ring FR according to the embodiment.
  • FIG. 3B is a perspective view of the focus ring FR according to the embodiment.
  • the electrostatic chuck 36 and the stage 12 constitute a table having an upper surface for mounting thereon the wafer W.
  • the electrostatic chuck 36 has the wafer support 36 c to hold the wafer W thereon and a peripheral segment 36 d surrounding the wafer support 36 c and having through-holes 36 f .
  • the peripheral segment 36 d has an upper surface lower than that of the wafer support 36 c .
  • a stepped portion 36 e having a predetermined height is formed between the wafer support 36 c and the peripheral segment 36 d.
  • the outer focus ring 38 o is disposed while having a clearance of about 0.1 mm to 0.5 mm between the outer focus ring 38 o and the peripheral segment 36 d of the electrostatic chuck 36 and between the outer focus ring 38 o and the stepped portion 36 e of the electrostatic chuck 36 .
  • a bottom surface of the outer focus ring 38 o is disposed on the peripheral segment 36 d of the electrostatic chuck 36 .
  • an inner peripheral surface of the outer focus ring 38 o faces the stepped portion 36 e of the electrostatic chuck 36 .
  • the outer focus ring 38 o has a recess 38 d formed on an inner side thereof.
  • the recess 38 d is a ring-shaped groove having a width of about 5 mm to 10 mm.
  • the recess 38 d is formed near the inner peripheral surface of the outer focus ring 38 o , e.g., at a position distant from the inner peripheral surface by a distance of about 1 to 2 mm.
  • the recess 38 d has a size that allows the inner focus ring 38 i to be disposed in the recess 38 d .
  • a height of an upper face of the outer focus ring 38 o is lower on the inner side than on the outer side of the recess 38 d .
  • the through-holes 38 f are formed in a bottom surface of the recess 38 d to penetrate through the outer focus ring 38 o in the vertical direction.
  • the inner focus ring 38 i is a ring-shaped member having a width that allows the inner focus ring 38 i to be accommodated in the recess 38 d of the outer focus ring 38 o , e.g., a width slightly smaller than about 5 mm to 10 mm.
  • a thicknesses of the inner focus ring 38 i and a thicknesses of the outer focus ring 38 o may be set such that the height of the upper surface of the inner focus ring 38 i becomes substantially the same as that of the upper surface of the outer focus ring 38 o when the inner focus ring 38 i is disposed in the recess 38 d .
  • the inner focus ring 38 i may be disposed in the recess 38 d , and the bottom surface of the inner focus ring 38 i may be in contact with the upper end(s) of the lift pin(s) 102 extending through the through-hole(s) 38 f.
  • both of the inner focus ring 38 i and the outer focus ring 38 o are substantially ring-shaped members.
  • the substantially ring-shaped recess 38 d formed on the upper surface of the outer focus ring 38 o also serves as a positioning part for the inner focus ring 38 i . Therefore, the inner focus ring 38 i is not provided with a mark or a structure for positioning, such as a notch, an orientation flat, or the like.
  • FIG. 3C is a top view of the outer focus ring 38 o according to the embodiment.
  • FIG. 3D is a top view showing a state in which the inner focus ring 38 i is disposed at the outer focus ring 38 o according to the embodiment.
  • a plurality of through-holes 38 f are disposed in the recess 38 d of the outer focus ring 38 o at the substantially equal intervals in the circumferential direction.
  • the through-holes 38 f are not seen from above.
  • the upper face of the outer focus ring 38 o is lower on the radially inner side of the recess 38 d than on the radially outer side of the recess 38 d .
  • the inner focus ring 38 i has an inner diameter greater than an outer diameter of the wafer W to avoid the interference between the inner focus ring 38 i and the wafer W.
  • the upper end of the inner peripheral surface of the inner focus ring 38 i has a chamfered upper inner corner.
  • FIGS. 4A and 4B explain the first shift control and the second shift control of the inner focus ring according to the embodiment, respectively.
  • the upper surface of the wafer W held on the wafer support 36 c , the upper surface of the inner focus ring 38 i , and the upper surface of the outer focus ring 38 o on the radially outer side of the recess 38 d have a predetermined height relationship. In one example, they have substantially the same height.
  • the lift pin 102 is raised by the first shift control of the shift mechanism 200 .
  • the inner focus ring 38 i is lifted by the lift pin 102 , and the upper surface of the wafer W and the upper surface of the inner focus ring 38 i have a predetermined height relationship. In one example, they have substantially the same height.
  • the upper surface of the outer focus ring 38 o may not have the predetermined height relationship with the upper surface of the inner focus ring 38 i and the upper surface of the wafer W.
  • the outer focus ring 38 o is far from the wafer W compared to the inner focus ring 38 i , and thus is less likely to affect the etching uniformity.
  • the cleaning using plasma may be performed to remove particles generated in the chamber 10 during the plasma processing.
  • the lift pin 102 can be raised by the first or the second shift control. This is also applied to modifications to be described later.
  • the inner focus ring 38 i is disassembled and replaced after the plasma processing is performed a predetermined number of times.
  • the number of executions of the plasma processing without replacing the inner focus ring 38 i may be determined depending on the type of plasma processing, the thickness of the focus ring FR, or the like. Since the outer focus ring 38 o is less likely to affect the etching uniformity compared to the inner focus ring 38 i , the frequency of the replacement of the outer focus ring 38 o is set to be less than that of the inner focus ring 38 i .
  • the outer focus ring 38 o may be replaced about once while the inner focus ring 38 i is replaced about three to four times.
  • the outer focus ring 38 o remains to cover the peripheral segment 36 d of the electrostatic chuck 36 . Therefore, even when the inner focus ring 38 i is lifted to perform the cleaning using the plasma, the electrostatic chuck 36 is covered by the outer focus ring 38 o . Accordingly, the exposure of the electrostatic chuck 36 to the plasma can be suppressed.
  • the lift pin 102 is raised by the second shift control of the shift mechanism 200 as shown in FIG. 4B . Then, the inner focus ring 38 i is lifted by the lift pin(s) 102 and separated from the outer focus ring 38 o . The inner focus ring 38 i separated from the outer focus ring 38 o is transferred to the outside of the chamber 10 by a robot arm or the like.
  • one shift mechanism 200 can realize both the position control in raising the focus ring FR during the plasma processing and the position control in transferring and replacing the focus ring FR.
  • the plasma processing apparatus can be used to realize a similar position control even in the case of using a focus ring having another shape.
  • a focus ring according to a first modification will be described.
  • FIG. 5 is a cross-sectional view of a focus ring FR according to a first modification.
  • the focus ring FR according to the first modification has an inner focus ring 38 i and an outer focus ring 38 o , as in the case of the focus ring FR according to the above-described embodiment.
  • the shapes of the inner focus ring 38 i and the outer focus ring 38 o are different from those in the above-described embodiment.
  • the outer focus ring 38 o has a cutout 38 e instead of the recess 38 d .
  • the cutout 38 e is formed at the inner portion of the outer focus ring 38 o and has an L-shaped cross section.
  • the inner focus ring 38 i is formed to have a size to be fittable in the cutout 38 e .
  • the inner focus ring 38 i in an initial state, has an outer portion having the same height level as that of the upper surface of the wafer W and an inner portion having an upper surface lower than that of the outer portion.
  • a thickness of the inner portion of the inner focus ring 38 i is set such that a predetermined gap is ensured between the inner portion of the inner focus ring 38 i and the wafer W to prevent the wafer W from being displaced by the inner portion of the inner focus ring 38 i when the inner focus ring 38 i is moved upward by the first shift control.
  • FIGS. 6A and 6B explain the first shift control and the second shift control of the inner focus ring according to the first modification, respectively. As shown in FIGS. 6A and 6B , even in the case of using the focus ring FR according to the first modification, the first shift control and the second shift control of the inner focus ring 38 i can be realized by using the shift mechanism 200 .
  • the focus ring FR is divided into two parts, i.e., the inner focus ring 38 i and the outer focus ring 38 o . Further, the plasma processing apparatus performs the first shift control and the second shift control of the inner focus ring 38 i .
  • the present disclosure is not limited thereto, and the focus ring FR may be formed as one member without being divided into two parts.
  • the inner focus ring 38 i and the outer focus ring 38 o shown in FIG. 3A or FIG. 5 are formed as one member FR.
  • the shift mechanism 200 controls the position of the upper surface of the focus ring FR as one member and the transfer of the focus ring FR.
  • the configurations of the lift pin(s) and the shift mechanism(s) are the same as those of the above-described embodiment and the first modification.
  • the performance of the driver (motor or the like) included in the shift mechanism or the stiffness of the lift pin can be appropriately changed depending on the size of the focus ring.
  • the size of the loading/unloading port 27 is changed in response to the size of the focus ring.
  • the positional accuracy of the focus ring can also be improved by using the same shift mechanism as that of the above-described embodiment.
  • the shift mechanism of the plasma processing apparatus performs both of the driving and the transfer of the focus ring.
  • the present disclosure is not limited thereto, and the shift mechanism of the plasma processing apparatus may perform only the second shift control without performing the first shift control.
  • the shift mechanism of the plasma processing apparatus may perform only the first shift control without performing the second shift control.
  • the shift mechanism of the plasma processing apparatus may perform only the first shift control without performing the second shift control.
  • the focus ring when the focus ring is consumed, only the transfer and the replacement of the focus ring may be performed without adjusting the position of the upper surface of the focus ring.
  • the position of the upper surface of the focus ring may be adjusted but the transfer of the focus ring may be performed by opening the chamber.
  • the lift pin(s) is constantly in contact with the bottom surface of the inner focus ring.
  • the present disclosure is not limited thereto, and the lift pin(s) may not be in constant contact with the focus ring if the shift mechanism(s) is used only for the second shift control (transfer) and not used for the first shift control (driving).
  • the lift pin(s) may be in contact with the inner focus ring only during the second shift control.
  • any one of the first shift control and the second shift control may be performed.
  • the respective parts of the focus ring FR are made of Si, SiO 2 , SiC or the like.
  • the outer focus ring 38 o and the inner focus ring 38 i may be made of the same material or different materials.
  • a width of the inner focus ring 38 i can be adjusted within a range from about 3 mm to 15 mm.
  • the width and the diameter of the inner focus ring 38 i may be appropriately set under the condition that an etching rate near the edge portion of the wafer W is changed while the etching rate of the region of the wafer excluding the edge portion of the wafer, which includes the central region of the wafer, is not significantly changed.
  • the outer diameter of the outer focus ring 38 o is, e.g., 360 mm.
  • the dimensions of the respective components of the plasma processing apparatus 5 including the focus ring FR are adjusted in response to the size of the wafer W.
  • the plasma processing apparatus includes the table, the outer focus ring, the inner focus ring, the lift pins, and the shift mechanisms.
  • the table has the wafer support to hold the wafer thereon and the peripheral segment surrounding the wafer support and having the through-holes, the peripheral segment having an upper surface lower than that of the wafer support.
  • the outer focus ring is disposed over the peripheral segment, and has a recess or a cutout at the inner portion thereof.
  • the recess or cutout has the through-holes.
  • the inner focus ring is disposed in the recess or cutout of the outer focus ring.
  • the lift pins respectively extend through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring.
  • the shift mechanisms control the shift of the respective lift pins.
  • the plasma processing apparatus of the embodiment it is possible to prevent the exposure of the table to the plasma by disposing the outer focus ring over the peripheral segment.
  • the plasma processing apparatus of the embodiment further includes the inner focus ring disposed in the recess or cutout of the outer focus ring. Therefore, it is not necessary to form, at the inner focus ring, the notch or the orientation flat for positioning. Accordingly, the marks for positioning and the like are not required, which makes it possible to improve the uniformity of the plasma processing.
  • the focus ring is divided into two parts. Therefore, the position of the focus ring can be controlled without excessively increasing the number of components.
  • the shift, i.e., the elevation, of the inner focus ring is controlled at the position of the recess or the cutout formed at the inner portion of the outer focus ring. Therefore, the position of the inner focus ring can be controlled near the outer periphery of the wafer to be processed, and the positional accuracy of the focus ring can be improved.
  • the horizontal position and the height position can be accurately controlled during the first shift control, and the horizontal position can be accurately controlled during the second shift control.
  • the lift pins may be in contact with the inner focus ring during the plasma processing.
  • the lift pins and the inner focus ring are always in contact with each other during the processing of any wafer.
  • a first wafer is subjected to the plasma processing without raising the focus ring
  • a third wafer is subjected to the plasma processing in a state where the focus ring is raised.
  • the contact state between the lift pins and the inner focus ring is maintained during the processing of the first wafer as well as the processing of the third wafer. Therefore, the plasma processing apparatus according to the embodiment can suppress the variation between the plasma processings in the amount of heat conducted through the lift pins during the plasma processing. Accordingly, in accordance with the embodiment, it is possible to suppress the variation in the processing uniformity between the wafers.
  • each of the shift mechanisms may vertically shift the corresponding lift pin with at least two levels of precision.
  • the precision used for the first shift control may be applied to that for the second shift control.
  • one shift mechanism can be used to realize the first shift control for a precise position control and the second shift control for a position control at a pitch larger than that for the first shift control.
  • each of the shift mechanisms may vertically shift the corresponding lift pin with a first shift precision of about 0.02 mm and with a second shift precision of about 0.1 mm.
  • the first precision of about 0.02 mm may be used as the second precision.
  • one shift mechanism can be used to realize the position control of the inner focus ring and the transfer control of the inner focus ring.
  • each of the shift mechanisms includes the thruster and the transmitter.
  • the thruster coaxially connected to the corresponding lift pin.
  • the transmitter transmits the power of the driver disposed on an axis different from an axis of the corresponding lift pin to the thruster. Therefore, even if it is difficult to coaxially arrange the shift mechanisms with the lift pins, respectively, due to the restriction in the internal configuration of the plasma processing apparatus, it is possible to suppress the positional displacements of the lift pins and improve the positional accuracy of the focus ring.
  • the outer focus ring is disposed such that the inner peripheral surface and the bottom surface of the outer focus ring are insulated from the table. Therefore, in accordance with the embodiment, it is possible to suppress the exposure of the insulating film of the table to the plasma through the gaps between the components near the focus ring during the plasma processing.
  • a plurality of through-holes are disposed at substantially equal intervals in the circumferential direction of the outer focus ring. Therefore, in accordance with the embodiment, the positional displacement caused by the shift of the inner focus ring can be suppressed, and the positional accuracy of the focus ring can be improved.
  • the inner focus ring has the radial width in a range from 3 mm to 15 mm. Therefore, in accordance with the embodiment, it is possible to improve the uniformity of the plasma processing while appropriately adjusting the radial width of the inner focus ring.
  • the upper end of the inner peripheral surface of the inner focus ring has a chamfered upper inner corner. Therefore, in accordance with the embodiment, it is possible to suppress the formation of the gap between the focus ring and the wafer.
  • the height of the upper face of the inner focus ring is lower at the inner side of the inner focus ring than that at the outer side of the inner focus ring. Therefore, in accordance with the embodiment, the uniformity of the plasma processing can be improved by providing the focus near the wafer.
  • the plasma processing apparatus further includes the table, the focus ring, the lift pins, and the shift mechanisms.
  • the table has the wafer support to hold thereon the wafer, and the peripheral segment surrounding the wafer support and having the through-holes, the peripheral segment having the upper surface lower than that of the wafer support.
  • the focus ring is disposed over the upper surface of the peripheral segment of the table, and the inner peripheral surface of the focus ring is disposed to face the outer peripheral surface of the wafer support.
  • the lift pins respectively extend through the table to raise the focus ring.
  • the shift mechanisms control the shift of the respective lift pins, with one of the first shift precision and the second shift precision different from the first shift precision. Further, in the plasma processing apparatus, the first shift precision is higher than the second shift precision. Therefore, the positional accuracy of the focus ring can be improved by allowing the shift mechanisms to control the vertical shift of the respective lift pins with two types of shift precision.
  • the first shift precision is used for raising the focus ring to the plasma processing position
  • the second shift precision is used for raising the focus ring to the unloading position. Therefore, it is possible to improve the positional accuracy of the focus ring by controlling the position of the focus ring with the precision suitable for the plasma processing and the precision suitable for the unloading of the focus ring.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

In a plasma processing apparatus, a table has a wafer support to hold a wafer and a peripheral segment surrounding the wafer support and having through-holes. The peripheral segment has an upper surface lower than that of the wafer support. An outer focus ring is disposed over the peripheral segment and has a recess or a cutout at an inner portion of the outer focus ring, and the recess or cutout has through-holes. An inner focus ring is disposed in the recess or cutout of the outer focus ring. Lift pins respectively extend through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring. Shift mechanisms control shift of the respective lift pins.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application claims priority to Japanese Patent Application No. 2018-180956, filed on Sep. 26, 2018, the entire contents of which are incorporated herein by reference.
  • TECHNICAL FIELD
  • The present disclosure relates to a plasma processing apparatus.
  • BACKGROUND
  • As it is known, a plasma processing apparatus including a focus ring has been provided (see, Japanese Patent Application Publication No. 2008-244274). The focus ring is disposed to surround an outer periphery of a processing target, e.g., a semiconductor wafer (hereinafter, referred to as “wafer”). The focus ring is provided to control plasma near the outer periphery of the wafer to improve in-plane etching uniformity of the wafer.
  • The present disclosure provides a technique capable of improving the positional accuracy in driving and transferring the focus ring.
  • SUMMARY
  • In accordance with an aspect of the present disclosure, there is provided a plasma processing apparatus including: a table having a wafer support to hold a wafer and a peripheral segment surrounding the wafer support and having through-holes, the peripheral segment having an upper surface lower than that of the wafer support; an outer focus ring disposed over the peripheral segment and having a recess or a cutout at an inner portion of the outer focus ring, the recess or cutout having through-holes; an inner focus ring disposed in the recess or cutout of the outer focus ring; lift pins respectively extending through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring; and shift mechanisms to control shift of the respective lift pins.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The objects and features of the present disclosure will become apparent from the following description of embodiments, given in conjunction with the accompanying drawings, in which:
  • FIG. 1 shows an example of a configuration of a plasma processing apparatus according to an embodiment;
  • FIG. 2 shows an example of configurations of a focus ring, a lift pin, and a shift mechanism according to the embodiment;
  • FIG. 3A is a cross-sectional view of the focus ring according to the embodiment;
  • FIG. 3B is a perspective view of the focus ring according to the embodiment.
  • FIG. 3C is a top view of an outer focus ring according to the embodiment;
  • FIG. 3D is a top view showing a state in which an inner focus ring is disposed at the outer focus ring according to the embodiment;
  • FIG. 4A explains a first shift control of the inner focus ring according to the embodiment;
  • FIG. 4B explains a second shift control of the inner focus ring according to the embodiment;
  • FIG. 5 is a cross-sectional view of a focus ring according to a first modification;
  • FIG. 6A explains a first shift control of an inner focus ring according to the first modification; and
  • FIG. 6B explains a second shift control of the inner focus ring according to the first modification.
  • DETAILED DESCRIPTION
  • Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. The following embodiments are not intended to limit the present disclosure. The respective embodiments may be appropriately combined with each other within a range in which processing contents do not contradict each other. Like reference numerals will be given to substantially like parts throughout this specification and the drawings, and redundant description thereof will be omitted.
  • In the following description, when a wafer is held on a table of a plasma processing apparatus, the table side when viewed from the wafer is referred to as “lower side,” and the opposite side is referred to as “upper side.”
  • FIG. 1 shows an example of a configuration of a plasma processing apparatus 5 according to an embodiment. In the present embodiment, a capacitively coupled parallel plate type plasma processing apparatus will be described as an example of the plasma processing apparatus 5.
  • The plasma processing apparatus 5 includes a chamber 10 that is a cylindrical vacuum container made of a metal such as aluminum, stainless steel, or the like. The chamber 10 is an example of a processing container and has an inner space serving as a processing chamber where plasma processing is performed. The chamber 10 is grounded.
  • At a lower central portion of the chamber 10, a disk-shaped stage 12 for mounting thereon a target object, e.g., a wafer W, is disposed as a substrate holder serving as a lower electrode. The stage 12 is supported by a cylindrical support 16 that is made of, e.g., aluminum, and extends vertically upward from the bottom of the chamber 10 and a housing 100 disposed at an inner side of the cylindrical support 16. In the example shown in FIG. 1, a structure 45 is disposed between the stage 12 and the housing 100. A recess is formed on a contact surface between the structure 45 and the stage 12, and a sealing member 47 is disposed in the recess. The housing 100 is made of, e.g., ceramic. In the example shown in FIG. 1, the cylindrical support 16 includes an aluminum portion 16 a disposed at a lower portion of the chamber 10 and a quartz portion 16 b disposed on the aluminum portion 16 a.
  • An annular gas exhaust passage 18 is formed between the cylindrical support 16 and an inner wall of the chamber 10. An annular baffle plate 20 is installed at an upstream side or an inlet of the gas exhaust passage 18, and a gas exhaust port 22 is provided at a downstream side of the gas exhaust passage 18. The baffle plate 20 is fitted to the cylindrical support portion 16 to be reinforced by the aluminum portion 16 a.
  • A gas exhaust unit (GEU) 26 is connected to the gas exhaust port 22 through a gas exhaust line 24. The gas exhaust unit 26 has a vacuum pump such as a turbo molecular pump or the like, and thus can reduce a pressure in a plasma generation space S in the chamber 10 to a desired vacuum level. A gate valve 28 for opening and closing a loading/unloading port 27 for the wafer W is disposed an outer sidewall of the chamber 10.
  • A second high frequency power supply 30 is electrically connected to the stage 12 via a matching unit (MU) 32 and a power feed rod 34. The second high frequency power supply 30 is configured to output a high frequency power LF at a variable power level, the high frequency power LF having a first frequency (e.g., 13.56 MHz) suitable for controlling energy of ions to be attracted to the wafer W. The matching unit 32 includes a reactance variable matching circuit for matching an impedance of the second high frequency power supply 30 side and an impedance of a load (plasma or the like) side.
  • An electrostatic chuck 36 for attacting and holding the wafer W by a Coulomb force is disposed on an upper surface of the stage 12. The electrostatic chuck 36 has an electrode 36 a made of a conductive film and two insulating films 36 b. The electrode 36 a is embedded between the two insulating films 36 b, and a DC power supply 40 is electrically connected to the electrode 36 a through a switch 42 and a coated wire 43. The insulating films 36 b are made of, e.g., a ceramic sintered body. The wafer W is attracted and held on the electrostatic chuck 36 by an electrostatic force such as a Coulomb force generated by a DC current supplied from the DC power supply 40. A heater H that is a heating element is disposed in the electrostatic chuck 36. A heater power supply (not shown) is connected to the heater H. The temperature of the wafer W on the electrostatic chuck 36 is controlled to a predetermined temperature by heating using the heater H and cooling using a coolant to be described later. Further, the heater H may be disposed in the stage 12.
  • An annular coolant channel 44 extending in, e.g., a circumferential direction, is formed in the stage 12. A coolant, e.g., cooling water cw, having a predetermined temperature is supplied from a chiller unit through lines 46 and 48 and circulated in the coolant flow channel 44. Accordingly, the temperature of the wafer W on the electrostatic chuck 36 can be controlled by the temperature of the coolant. In addition, a heat transfer gas such as He gas from a heat transfer gas supply unit is supplied to a gap between an upper surface of the electrostatic chuck 36 and the backside of the wafer W through a gas supply line 50. Further, a pusher pin that is raised and lowered while penetrating through the stage 12 in a vertical direction to load and unload the wafer W, and a shift mechanism for driving the pusher pin are provided.
  • A gas shower head 51 is disposed to block an opening formed at the ceiling of the chamber 10 through a shield ring 54 that covers an outer edge of the gas shower head 51. The gas shower head 51 is made of silicon. The gas shower head 51 also serves as a facing electrode (upper electrode) opposite to the stage 12 (lower electrode).
  • A gas inlet 56 for introducing a gas is formed at the gas shower head 51. A diffusion space 58 connected to the gas inlet 56 is disposed in the gas shower head 51. The gas outputted from a gas supply source (GS) 66 is supplied to the diffusion space 58 through the gas inlet 56, and then diffused and introduced into the plasma generation space S through a plurality of gas injection holes 52.
  • A first high frequency power supply 57 is electrically connected to the gas shower head 51 through a matching unit (MU) 59 and a power feed line 60. The first high frequency power supply 57 is configured to output a high frequency power HF at a variable power level, the high frequency power HF having a second frequency (e.g., 40 MHz) that is suitable for plasma generation and is higher than the first frequency. The matching unit 59 includes a reactance variable matching circuit for matching an impedance of the first high frequency power supply 57 side and the impedance of the load (plasma or the like) side.
  • A controller (CNT) 74 includes, e.g., a microcomputer, and is configured to control the operations of the respective components in the plasma processing apparatus 5 and the operation of the entire apparatus. The components of the plasma processing apparatus 5 include the gas exhaust unit 26, the first high frequency power supply 57, the second high frequency power supply 30, the matching units 32 and 59, the switch 42 for the electrostatic chuck, the gas supply source (GS) 66, the chiller unit, the heat transfer gas supply unit, and the like.
  • In order to perform various processes such as etching and the like in the plasma processing apparatus 5, first, the gate valve 28 is opened, and the wafer W is loaded into the chamber 10 and mounted on the electrostatic chuck 36. Then, the gate valve 28 is closed, and a predetermined gas is introduced from the gas supply source 66 into the chamber 10 at a predetermined flow rate and a predetermined flow rate ratio. Then, the pressure in the chamber 10 is reduced to a predetermined set value by the gas exhaust unit 26. Further, the first high frequency power supply 57 is turned on to output the high frequency power HF for plasma generation at a predetermined power level. The high frequency power HF is supplied to the gas shower head 51 through the matching unit 59 and the power feed line 60.
  • When the high frequency power LF for ion attraction control is applied, the second high frequency power supply 30 is turned on to output the high frequency power LF at a predetermined power level. The high frequency power LF is applied to the stage 12 through the matching unit 32 and the power feed rod 34. In addition, the heat transfer gas is supplied from the heat transfer gas supply unit to the contact surface between the electrostatic chuck 36 and the wafer W. Further, the switch 42 is turned on to apply the DC voltage from the DC power supply 40 to the electrode 36 a of the electrostatic chuck 36, and the heat transfer gas is confined to the contact surface by electrostatic attractive force.
  • <Configuration of Focus Ring FR According to Embodiment>
  • A focus ring FR is disposed at an outer periphery of the stage 12 to annularly surround an outer periphery of the wafer W. The focus ring FR is configured to control the plasma at the outer periphery of the wafer and improve the uniformity of the processing such as an in-plane etching rate of the wafer W or the like. In addition, a cover ring CR is disposed to surround an outer periphery of the focus ring FR. The cover ring CR is a ring-shaped member made of, e.g., quartz, and protects an upper surface of the cylindrical support 16 from the plasma.
  • The etching rate and/or the etching shape at an edge portion of the wafer W changes depending on a height of the focus ring FR. Therefore, when the height of an upper surface of the focus ring FT changes due to consumption of the focus ring FR, the sheath shape above the edge portion of the wafer W changes which leads to the change of the processing shape at the edge portion of the wafer W. In the present embodiment, the edge portion of the wafer W indicates a ring-shaped portion spaced apart from the center of the wafer W by a distance of about 140 mm to 150 mm in a radial direction. The clearance between the components of the plasma processing apparatus 5 may be about 0.1 mm to 0.5 mm. However, the clearance is appropriately omitted in the drawings.
  • Therefore, the plasma processing apparatus 5 of the present embodiment includes the focus ring FR that is divided into two parts. In the present embodiment, the focus ring FR is divided into an inner focus ring 38 i and an outer focus ring 38 o.
  • Further, the plasma processing apparatus 5 of the present embodiment is configured to adjust a position of an upper surface of the inner focus ring 38 i that affects the in-plane etching uniformity of the wafer in response to the consumption of the focus ring FR. Further, the plasma processing apparatus 5 of the present embodiment is configured to automatically replace the inner focus ring 38 i without opening and closing the chamber 10. Therefore, the plasma processing apparatus 5 of the present embodiment further includes shift mechanisms 200 and lift pins 102 in a one-to-one relationship with the shift mechanisms 200. Hereinafter, the adjustment of the position of the upper surface of the inner focus ring 38 i, which is performed to maintain the uniformity of the plasma processing, is referred to as “first shift control.” The control for raising the inner focus ring 38 i in order to replace and transfer the inner focus ring 38 i is referred to as “second shift control.”
  • When the first shift control is performed, each of the shift mechanisms 200 adjusts a shift amount of the corresponding the lift pin 102 with a driving precision of 0.02 mm at a pitch of 1.0 mm to 2.0 mm, for example. The position of the upper surface of the inner focus ring 38 i is adjusted by the shift of the respective lift pins 102.
  • When the second shift control is performed, each of the shift mechanisms 200 adjusts the shift amount of the corresponding lift pin 102 with a driving precision of about 0.1 mm at a pitch of about 20 mm, e.g., 18 mm. In other words, in the second shift control, the shift mechanisms 200 move the lift pins 102 at a pitch larger than that used for adjusting the position of the upper surface of the inner focus ring 38 i. As the lift pins 102 are moved up, the inner focus ring 38 i is lifted. The lifted inner focus ring 38 i can be transferred to the outside of the chamber 10 by the same transfer unit as that used for transferring the wafer W. Thereafter, a new inner focus ring 38 i can be transferred into the chamber 10 in the same manner as for transferring the wafer W.
  • <Configuration Example of Shift Mechanism 200>
  • FIG. 2 shows an example of the configurations of the focus ring FR, the lift pins 102, and the shift mechanisms 200 according to the embodiment. In FIGS. 2 to 6B, only one lift pin 102 and one shift mechanism are illustrated for the sake of convenience. First, the shift mechanism 200 will be described with reference to FIG. 2.
  • The shift mechanism 200 includes a driver 101, a transmitter 103, and a thruster 105.
  • The driver 101 is, e.g., a motor such as a stepping motor, or an air driving mechanism. The driver 101 is arranged at a position apart from the axial direction of the lift pin 102 and is connected to the lift pin 102 through the transmitter 103 and the thruster 105. The power generated by the driver 101 is transmitted to the thruster 105 and further the lift pin 102 through the transmitter 103. As for a micron level driver, a piezo actuator may be appropriately employed. However, in the present embodiment, a motor such as the stepping motor, the air driver, or the like is employed to perform the first shift control and the second shift control by one shift mechanism 200.
  • The transmitter 103 is disposed between the driver 101 and the thruster 105 that are disposed on two different axes, and connects the driver 101 and the thruster 105. The transmitter 103 transmits the power of the driver 101 to the thruster 105 and the lift pin 102. The transmitter 103 is configured to connect an end portion of the driver 101 and the thruster 105.
  • The thruster 105 is provided to absorb the deviation caused by disposing the driver 101 and the lift pin 102 at different axes. The driver 101 and the lift pin 102 are connected by the transmitter 103. Since, however, the driver 101 and the lift pin 102 are disposed at the end portions of the transmitter 103, a direction of the load applied to the lift pin 102 may be deviated from the vertical direction due to the inclination of the transmitter 103 or the like. When the direction of the load applied to the lift pin 102 is deviated from the vertical direction, the lift pin 102 may be damaged. Therefore, the thruster 105 is provided to absorb the deviation in a shift direction of the lift pin 102.
  • By providing the shift mechanism 200, the power generated by the driver 101 is transmitted to the lift pin 102, and the lift pin 102 is moved vertically.
  • Meanwhile, depending on the configuration of the plasma processing apparatus 5, the driver 101 and the lift pin 102 may be arranged coaxially. In this case, the transmitter 103 and the thruster 105 may be omitted.
  • <Configuration Example of Lift Pin 102>
  • The lift pin 102 is connected to the thruster 105 of the shift mechanism 200 and extends upward from the thruster 105. The lift pin 102 extends thorough through- holes 12 a, 36 f, and 38 f (see FIG. 3A, which will be described later) extending through the stage 12, the electrostatic chuck 36, and the outer focus ring 38 o. The upper end of the lift pin 102 is brought into contact with a bottom surface of the inner focus ring 38 i to support the inner focus ring 38 i. Further, an O-ring 110 is disposed in the through-hole 12 a of the stage 12 to partition a vacuum space and an atmosphere space. In the present embodiment, the upper end of the lift pin 102 is in contact with the bottom surface of the inner focus ring 38 i even when the first shift control and the second shift control are not performed.
  • The material of the lift pin 102 is not particularly limited, but the lift pin 102 is preferably made of a material that is less likely to generate particles when exposed to plasma, a material that is less likely to be consumed when exposed to plasma, or a material having a high stiffness. Therefore, the lift pin 102 is preferably made of sapphire or quartz.
  • <Two Steps of Position Control Using Shift Mechanism 200>
  • The shift mechanism 200 of the present embodiment is capable of vertically shifting the lift pin 102 during the first shift control and the second shift control. The driver 101 of the shift mechanism 200 is configured to realize a precise vertical shift (first shift control) with a driving precision of 0.02 mm at a pitch of, e.g., 1.0 to 2.0 mm as well as a vertical shift having a larger pitch (second shift control) with a driving precision of about 0.1 mm at a pitch of about 20.0 mm, e.g., 18 mm.
  • When the first shift control is performed, the driver 101 of the shift mechanism 200 raises the lift pin 102 in response to the consumption of the inner focus ring 38 i due to the plasma processing. Accordingly, the positional relationship between the position of the upper surface of the inner focus ring 38 i and the position of an upper surface of the wafer W on a wafer support 36 c is adjusted to a predetermined level. In one example, the position of the upper surface of the inner focus ring 38 i can be aligned with the position of the upper surface position of the wafer W on the wafer support 36 c.
  • When the second shift control is performed, the driver 101 of the shift mechanism 200 raises the lift pin 102 to a position where the inner focus ring 38 i is separated from the outer focus ring 38 o. The first shift control requires a small pitch and a high driving precision. On the other hand, the second shift control requires a large pitch and does not require the precision as high as that for the first shift control. Therefore, the driver 101 of the shift mechanism 200 can adjust the moving speed of the lift pin 102 during the second shift control to be higher than that during the first shift control.
  • <Configuration Examples of Inner Focus Ring 38 i and Outer Gocus Ring 38 o>
  • Next, a configuration example of the focus ring FR according to the embodiment will be described with reference to FIGS. 3A to 3D.
  • FIG. 3A is a cross-sectional view of the focus ring FR according to the embodiment. FIG. 3B is a perspective view of the focus ring FR according to the embodiment. In the example shown in FIG. 3A, the electrostatic chuck 36 and the stage 12 constitute a table having an upper surface for mounting thereon the wafer W. The electrostatic chuck 36 has the wafer support 36 c to hold the wafer W thereon and a peripheral segment 36 d surrounding the wafer support 36 c and having through-holes 36 f. The peripheral segment 36 d has an upper surface lower than that of the wafer support 36 c. A stepped portion 36 e having a predetermined height is formed between the wafer support 36 c and the peripheral segment 36 d.
  • The outer focus ring 38 o is disposed while having a clearance of about 0.1 mm to 0.5 mm between the outer focus ring 38 o and the peripheral segment 36 d of the electrostatic chuck 36 and between the outer focus ring 38 o and the stepped portion 36 e of the electrostatic chuck 36. In a state shown in FIG. 3A, a bottom surface of the outer focus ring 38 o is disposed on the peripheral segment 36 d of the electrostatic chuck 36. Further, an inner peripheral surface of the outer focus ring 38 o faces the stepped portion 36 e of the electrostatic chuck 36. Further, it is preferable to promote heat conduction between the outer focus ring 38 o and the electrostatic chuck 36. Therefore, although it is not shown, a heat transfer sheet, e.g., a polymer sheet, may be provided between the outer focus ring 38 o and the peripheral segment 36 d to promote the heat conduction.
  • The outer focus ring 38 o has a recess 38 d formed on an inner side thereof. The recess 38 d is a ring-shaped groove having a width of about 5 mm to 10 mm. The recess 38 d is formed near the inner peripheral surface of the outer focus ring 38 o, e.g., at a position distant from the inner peripheral surface by a distance of about 1 to 2 mm. The recess 38 d has a size that allows the inner focus ring 38 i to be disposed in the recess 38 d. A height of an upper face of the outer focus ring 38 o is lower on the inner side than on the outer side of the recess 38 d. Further, the through-holes 38 f are formed in a bottom surface of the recess 38 d to penetrate through the outer focus ring 38 o in the vertical direction.
  • The inner focus ring 38 i is a ring-shaped member having a width that allows the inner focus ring 38 i to be accommodated in the recess 38 d of the outer focus ring 38 o, e.g., a width slightly smaller than about 5 mm to 10 mm. In one example, a thicknesses of the inner focus ring 38 i and a thicknesses of the outer focus ring 38 o may be set such that the height of the upper surface of the inner focus ring 38 i becomes substantially the same as that of the upper surface of the outer focus ring 38 o when the inner focus ring 38 i is disposed in the recess 38 d. In the state shown in FIG. 3A, the inner focus ring 38 i may be disposed in the recess 38 d, and the bottom surface of the inner focus ring 38 i may be in contact with the upper end(s) of the lift pin(s) 102 extending through the through-hole(s) 38 f.
  • As shown in FIG. 3B, both of the inner focus ring 38 i and the outer focus ring 38 o are substantially ring-shaped members. The substantially ring-shaped recess 38 d formed on the upper surface of the outer focus ring 38 o also serves as a positioning part for the inner focus ring 38 i. Therefore, the inner focus ring 38 i is not provided with a mark or a structure for positioning, such as a notch, an orientation flat, or the like.
  • FIG. 3C is a top view of the outer focus ring 38 o according to the embodiment. FIG. 3D is a top view showing a state in which the inner focus ring 38 i is disposed at the outer focus ring 38 o according to the embodiment. As shown in FIG. 3C, a plurality of through-holes 38 f (three in the example shown in FIG. 3C) are disposed in the recess 38 d of the outer focus ring 38 o at the substantially equal intervals in the circumferential direction. When the inner focus ring 38 i is disposed in the recess 38 d of the outer focus ring 38 o, the through-holes 38 f are not seen from above.
  • Referring back to FIG. 3A, the upper face of the outer focus ring 38 o is lower on the radially inner side of the recess 38 d than on the radially outer side of the recess 38 d. This is because, in the configuration shown in FIG. 3A, when the wafer W is held on the wafer support 36 c, the outer periphery of the wafer W overhangs above the outer focus ring 38 o on the inner peripheral side of the outer focus ring 38 o. Further, the inner focus ring 38 i has an inner diameter greater than an outer diameter of the wafer W to avoid the interference between the inner focus ring 38 i and the wafer W. Further, the upper end of the inner peripheral surface of the inner focus ring 38 i has a chamfered upper inner corner.
  • <Vertical Shift of Focus Ring>
  • Next, the shift control of the focus ring FR will be described. FIGS. 4A and 4B explain the first shift control and the second shift control of the inner focus ring according to the embodiment, respectively.
  • When a new focus ring FR is disposed in the chamber 10, neither the inner focus ring 38 i nor the outer focus ring 38 o have yet to be consumed by the plasma processing. Therefore, as shown in FIG. 3A, the upper surface of the wafer W held on the wafer support 36 c, the upper surface of the inner focus ring 38 i, and the upper surface of the outer focus ring 38 o on the radially outer side of the recess 38 d have a predetermined height relationship. In one example, they have substantially the same height.
  • When the plasma processing is performed in the chamber 10, the focus ring FR is gradually consumed, and the etching uniformity or the like deteriorates. Therefore, as shown in FIG. 4A, the lift pin 102 is raised by the first shift control of the shift mechanism 200.
  • Then, the inner focus ring 38 i is lifted by the lift pin 102, and the upper surface of the wafer W and the upper surface of the inner focus ring 38 i have a predetermined height relationship. In one example, they have substantially the same height. Here, the upper surface of the outer focus ring 38 o may not have the predetermined height relationship with the upper surface of the inner focus ring 38 i and the upper surface of the wafer W. However, the outer focus ring 38 o is far from the wafer W compared to the inner focus ring 38 i, and thus is less likely to affect the etching uniformity.
  • Further, the cleaning using plasma may be performed to remove particles generated in the chamber 10 during the plasma processing. In the case of removing the foreign substances deposited between the inner focus ring 38 i and the outer focus ring 38 o by the plasma, the lift pin 102 can be raised by the first or the second shift control. This is also applied to modifications to be described later.
  • As the inner focus ring 38 i is repeatedly used and consumed, it is difficult to maintain the etching uniformity. Therefore, the inner focus ring 38 i is disassembled and replaced after the plasma processing is performed a predetermined number of times. The number of executions of the plasma processing without replacing the inner focus ring 38 i may be determined depending on the type of plasma processing, the thickness of the focus ring FR, or the like. Since the outer focus ring 38 o is less likely to affect the etching uniformity compared to the inner focus ring 38 i, the frequency of the replacement of the outer focus ring 38 o is set to be less than that of the inner focus ring 38 i. For example, the outer focus ring 38 o may be replaced about once while the inner focus ring 38 i is replaced about three to four times. When the inner focus ring 38 i is replaced, the outer focus ring 38 o remains to cover the peripheral segment 36 d of the electrostatic chuck 36. Therefore, even when the inner focus ring 38 i is lifted to perform the cleaning using the plasma, the electrostatic chuck 36 is covered by the outer focus ring 38 o. Accordingly, the exposure of the electrostatic chuck 36 to the plasma can be suppressed.
  • When the inner focus ring 38 i is replaced, the lift pin 102 is raised by the second shift control of the shift mechanism 200 as shown in FIG. 4B. Then, the inner focus ring 38 i is lifted by the lift pin(s) 102 and separated from the outer focus ring 38 o. The inner focus ring 38 i separated from the outer focus ring 38 o is transferred to the outside of the chamber 10 by a robot arm or the like.
  • In accordance with the plasma processing apparatus according to the embodiment, one shift mechanism 200 can realize both the position control in raising the focus ring FR during the plasma processing and the position control in transferring and replacing the focus ring FR.
  • <First Modification>
  • The plasma processing apparatus according to the embodiment can be used to realize a similar position control even in the case of using a focus ring having another shape. Hereinafter, a focus ring according to a first modification will be described.
  • FIG. 5 is a cross-sectional view of a focus ring FR according to a first modification. The focus ring FR according to the first modification has an inner focus ring 38 i and an outer focus ring 38 o, as in the case of the focus ring FR according to the above-described embodiment. However, in the focus ring FR according to the first modification, the shapes of the inner focus ring 38 i and the outer focus ring 38 o are different from those in the above-described embodiment.
  • As shown in FIG. 5, in the focus ring FR according to the first modification, the outer focus ring 38 o has a cutout 38 e instead of the recess 38 d. The cutout 38 e is formed at the inner portion of the outer focus ring 38 o and has an L-shaped cross section. The inner focus ring 38 i is formed to have a size to be fittable in the cutout 38 e. Unlike the above-described embodiment, in an initial state, the inner focus ring 38 i has an outer portion having the same height level as that of the upper surface of the wafer W and an inner portion having an upper surface lower than that of the outer portion. When the wafer W is held on the wafer support 36 c, the outer periphery of the wafer W overhangs above the inner portion of the inner focus ring 38 i and the outer periphery of the wafer W faces an inner peripheral surface of the outer portion of the inner focus ring 38 i. A thickness of the inner portion of the inner focus ring 38 i is set such that a predetermined gap is ensured between the inner portion of the inner focus ring 38 i and the wafer W to prevent the wafer W from being displaced by the inner portion of the inner focus ring 38 i when the inner focus ring 38 i is moved upward by the first shift control.
  • FIGS. 6A and 6B explain the first shift control and the second shift control of the inner focus ring according to the first modification, respectively. As shown in FIGS. 6A and 6B, even in the case of using the focus ring FR according to the first modification, the first shift control and the second shift control of the inner focus ring 38 i can be realized by using the shift mechanism 200.
  • <Second Modification>
  • In the above-described embodiment and the first modification, the focus ring FR is divided into two parts, i.e., the inner focus ring 38 i and the outer focus ring 38 o. Further, the plasma processing apparatus performs the first shift control and the second shift control of the inner focus ring 38 i. However, the present disclosure is not limited thereto, and the focus ring FR may be formed as one member without being divided into two parts. For example, the inner focus ring 38 i and the outer focus ring 38 o shown in FIG. 3A or FIG. 5 are formed as one member FR. Then, the shift mechanism 200 controls the position of the upper surface of the focus ring FR as one member and the transfer of the focus ring FR.
  • In the plasma processing apparatus according to the second modification, the configurations of the lift pin(s) and the shift mechanism(s) are the same as those of the above-described embodiment and the first modification. However, the performance of the driver (motor or the like) included in the shift mechanism or the stiffness of the lift pin can be appropriately changed depending on the size of the focus ring. In the case of transferring the focus ring through the loading/unloading port 27, the size of the loading/unloading port 27 is changed in response to the size of the focus ring.
  • In the plasma processing apparatus including the focus ring according to the second modification, the positional accuracy of the focus ring can also be improved by using the same shift mechanism as that of the above-described embodiment.
  • In the above-described embodiment and the first and second modifications, the shift mechanism of the plasma processing apparatus performs both of the driving and the transfer of the focus ring. However, the present disclosure is not limited thereto, and the shift mechanism of the plasma processing apparatus may perform only the second shift control without performing the first shift control. On the contrary, the shift mechanism of the plasma processing apparatus may perform only the first shift control without performing the second shift control. For example, when the focus ring is consumed, only the transfer and the replacement of the focus ring may be performed without adjusting the position of the upper surface of the focus ring. Alternatively, when the focus ring is consumed, the position of the upper surface of the focus ring may be adjusted but the transfer of the focus ring may be performed by opening the chamber.
  • Further, in the above-described embodiment and the first and second modifications, it is illustrated that the lift pin(s) is constantly in contact with the bottom surface of the inner focus ring. However, the present disclosure is not limited thereto, and the lift pin(s) may not be in constant contact with the focus ring if the shift mechanism(s) is used only for the second shift control (transfer) and not used for the first shift control (driving). For example, the lift pin(s) may be in contact with the inner focus ring only during the second shift control.
  • When the cleaning for removing particles deposited between the inner focus ring and the outer focus ring is performed, any one of the first shift control and the second shift control may be performed.
  • <Materials of Parts>
  • The respective parts of the focus ring FR are made of Si, SiO2, SiC or the like. The outer focus ring 38 o and the inner focus ring 38 i may be made of the same material or different materials.
  • <Examples of Dimensions of Components>
  • It is assumed that the plasma processing apparatus 5 according to the above-described embodiment is configured to process a wafer W having a diameter of 300 mm. Further, for example, a width of the inner focus ring 38 i can be adjusted within a range from about 3 mm to 15 mm. For example, the width and the diameter of the inner focus ring 38 i may be appropriately set under the condition that an etching rate near the edge portion of the wafer W is changed while the etching rate of the region of the wafer excluding the edge portion of the wafer, which includes the central region of the wafer, is not significantly changed. The outer diameter of the outer focus ring 38 o is, e.g., 360 mm.
  • In the case of processing wafers W having different sizes, the dimensions of the respective components of the plasma processing apparatus 5 including the focus ring FR are adjusted in response to the size of the wafer W.
  • <Effects of the Embodiment>
  • The plasma processing apparatus according to the above-described embodiment includes the table, the outer focus ring, the inner focus ring, the lift pins, and the shift mechanisms. The table has the wafer support to hold the wafer thereon and the peripheral segment surrounding the wafer support and having the through-holes, the peripheral segment having an upper surface lower than that of the wafer support. The outer focus ring is disposed over the peripheral segment, and has a recess or a cutout at the inner portion thereof. The recess or cutout has the through-holes. The inner focus ring is disposed in the recess or cutout of the outer focus ring. The lift pins respectively extend through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring. The shift mechanisms control the shift of the respective lift pins. With this configuration, in the plasma processing apparatus of the embodiment, it is possible to prevent the exposure of the table to the plasma by disposing the outer focus ring over the peripheral segment. Further, the plasma processing apparatus of the embodiment further includes the inner focus ring disposed in the recess or cutout of the outer focus ring. Therefore, it is not necessary to form, at the inner focus ring, the notch or the orientation flat for positioning. Accordingly, the marks for positioning and the like are not required, which makes it possible to improve the uniformity of the plasma processing.
  • Further, in the plasma processing apparatus of the embodiment, the focus ring is divided into two parts. Therefore, the position of the focus ring can be controlled without excessively increasing the number of components. Moreover, in the plasma processing apparatus of the embodiment, the shift, i.e., the elevation, of the inner focus ring is controlled at the position of the recess or the cutout formed at the inner portion of the outer focus ring. Therefore, the position of the inner focus ring can be controlled near the outer periphery of the wafer to be processed, and the positional accuracy of the focus ring can be improved. For example, in accordance with the embodiment, the horizontal position and the height position can be accurately controlled during the first shift control, and the horizontal position can be accurately controlled during the second shift control.
  • In the plasma processing apparatus, the lift pins may be in contact with the inner focus ring during the plasma processing. For example, in the case that the focus ring is raised and, then, the wafer is processed (the first shift control), the lift pins and the inner focus ring are always in contact with each other during the processing of any wafer. For example, a first wafer is subjected to the plasma processing without raising the focus ring, and a third wafer is subjected to the plasma processing in a state where the focus ring is raised. In that case, in the plasma processing apparatus, the contact state between the lift pins and the inner focus ring is maintained during the processing of the first wafer as well as the processing of the third wafer. Therefore, the plasma processing apparatus according to the embodiment can suppress the variation between the plasma processings in the amount of heat conducted through the lift pins during the plasma processing. Accordingly, in accordance with the embodiment, it is possible to suppress the variation in the processing uniformity between the wafers.
  • In the plasma processing apparatus, each of the shift mechanisms may vertically shift the corresponding lift pin with at least two levels of precision. Alternatively, the precision used for the first shift control may be applied to that for the second shift control. In accordance with the embodiment, one shift mechanism can be used to realize the first shift control for a precise position control and the second shift control for a position control at a pitch larger than that for the first shift control.
  • In the plasma processing apparatus, each of the shift mechanisms may vertically shift the corresponding lift pin with a first shift precision of about 0.02 mm and with a second shift precision of about 0.1 mm. The first precision of about 0.02 mm may be used as the second precision. In accordance with the embodiment, one shift mechanism can be used to realize the position control of the inner focus ring and the transfer control of the inner focus ring.
  • Further, in the plasma processing apparatus, each of the shift mechanisms includes the thruster and the transmitter. The thruster coaxially connected to the corresponding lift pin. The transmitter transmits the power of the driver disposed on an axis different from an axis of the corresponding lift pin to the thruster. Therefore, even if it is difficult to coaxially arrange the shift mechanisms with the lift pins, respectively, due to the restriction in the internal configuration of the plasma processing apparatus, it is possible to suppress the positional displacements of the lift pins and improve the positional accuracy of the focus ring.
  • Further, in the plasma processing apparatus, the outer focus ring is disposed such that the inner peripheral surface and the bottom surface of the outer focus ring are insulated from the table. Therefore, in accordance with the embodiment, it is possible to suppress the exposure of the insulating film of the table to the plasma through the gaps between the components near the focus ring during the plasma processing.
  • Further, in the plasma processing apparatus, a plurality of through-holes are disposed at substantially equal intervals in the circumferential direction of the outer focus ring. Therefore, in accordance with the embodiment, the positional displacement caused by the shift of the inner focus ring can be suppressed, and the positional accuracy of the focus ring can be improved.
  • In the plasma processing apparatus, the inner focus ring has the radial width in a range from 3 mm to 15 mm. Therefore, in accordance with the embodiment, it is possible to improve the uniformity of the plasma processing while appropriately adjusting the radial width of the inner focus ring.
  • Further, in the plasma processing apparatus, the upper end of the inner peripheral surface of the inner focus ring has a chamfered upper inner corner. Therefore, in accordance with the embodiment, it is possible to suppress the formation of the gap between the focus ring and the wafer.
  • Further, in the plasma processing apparatus, the height of the upper face of the inner focus ring is lower at the inner side of the inner focus ring than that at the outer side of the inner focus ring. Therefore, in accordance with the embodiment, the uniformity of the plasma processing can be improved by providing the focus near the wafer.
  • The plasma processing apparatus further includes the table, the focus ring, the lift pins, and the shift mechanisms. The table has the wafer support to hold thereon the wafer, and the peripheral segment surrounding the wafer support and having the through-holes, the peripheral segment having the upper surface lower than that of the wafer support. The focus ring is disposed over the upper surface of the peripheral segment of the table, and the inner peripheral surface of the focus ring is disposed to face the outer peripheral surface of the wafer support. The lift pins respectively extend through the table to raise the focus ring. The shift mechanisms control the shift of the respective lift pins, with one of the first shift precision and the second shift precision different from the first shift precision. Further, in the plasma processing apparatus, the first shift precision is higher than the second shift precision. Therefore, the positional accuracy of the focus ring can be improved by allowing the shift mechanisms to control the vertical shift of the respective lift pins with two types of shift precision.
  • In the plasma processing apparatus, the first shift precision is used for raising the focus ring to the plasma processing position, and the second shift precision is used for raising the focus ring to the unloading position. Therefore, it is possible to improve the positional accuracy of the focus ring by controlling the position of the focus ring with the precision suitable for the plasma processing and the precision suitable for the unloading of the focus ring.
  • While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosures. Indeed, the embodiments described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made departing from the spirit of the disclosures. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosures.

Claims (15)

1. A plasma processing apparatus comprising:
a table having a wafer support to hold a wafer and a peripheral segment surrounding the wafer support and having through-holes, the peripheral segment having an upper surface lower than that of the wafer support;
an outer focus ring disposed over the peripheral segment and having a recess or a cutout at an inner portion of the outer focus ring, the recess or cutout having through-holes;
an inner focus ring disposed in the recess or cutout of the outer focus ring;
lift pins respectivley extending through the through-holes of the peripheral segment and the through-holes of the recess or cutout of the outer focus ring; and
shift mechanisms to control shift of the respective lift pins.
2. The apparatus of claim 1, wherein the lift pins are in contact with the inner focus ring during plasma processing.
3. The apparatus of claim 1, wherein each of the shift mechanisms is capable of verically shifting the corresponding lift pin with a first shift precision of about 0.02 mm at a pitch of 1 mm to 2 mm and a second shift precision of about 0.1 mm at a pitch of 20 mm.
4. The apparatus of claim 1, wherein each of the shift mechanisms includes:
a driver;
a thruster coaxially connected to the corresponding lift pin; and
a transmitter configured to transmit a power of the driver to the thruster.
5. The apparatus of claim 1, wherein an inner peripheral surface and a bottom surface of the outer focus ring are insulated from the table.
6. The apparatus of claim 1, wherein the through-holes are disposed at substantially equal intervals in a circumferential direction of the outer focus ring.
7. The apparatus of claim 1, wherein the inner focus ring has a radial width in a range from 3 mm to 15 mm.
8. The apparatus of claim 1, wherein the inner focus ring has an inner diameter greater than an outer diameter of the wafer.
9. The apparatus of claim 1, wherein an upper end of an inner peripheral surface of the inner focus ring has a chamfered upper inner corner.
10. The apparatus of claim 1, wherein a height of an upper face of the inner focus ring is lower at an inner side of the inner focus ring than that at an outer side of the inner focus ring.
11. A plasma processing apparatus comprising:
a table having a wafer support to hold a wafer and a peripheral segment surrounding the wafer support and having through-holes, the peripheral segment having an upper surface lower than that of the wafer support;
a focus ring disposed over the peripheral segment of the table and having an inner periphery facing an outer periphery of the wafer support;
lift pins extending through the table for raising the focus ring; and
shift mechanisms configured to control shift of the respective lift pins with one of a first shift precision and a second shift precision different from the first shift precision.
12. The apparatus of claim 11, wherein the first shift precision is higher than the second shift precision.
13. The apparatus of claim 12, wherein the first shift precision is used for raising the focus ring to a plasma processing position, and the second shift precision is used for raising the focus ring to an unloading position.
14. The apparatus of claim 3, wherein a moving speed in the axial direction of the lift pins during the vertical shift with the second shift precision is higher than a moving speed in the axial direction of the lift pins during the vertical shift with the first shift precision.
15. The apparatus of claim 11, wherein a moving speed in the axial direction of the lift pins during the control with the second shift precision is higher than a moving speed in the axial direction of the lift pins during the control with the first shift precision.
US16/582,115 2018-09-26 2019-09-25 Plasma processing apparatus Abandoned US20200098550A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US18/210,012 US12261028B2 (en) 2018-09-26 2023-06-14 Plasma processing apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018180956A JP7105666B2 (en) 2018-09-26 2018-09-26 Plasma processing equipment
JP2018-180956 2018-09-26

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US18/210,012 Continuation US12261028B2 (en) 2018-09-26 2023-06-14 Plasma processing apparatus

Publications (1)

Publication Number Publication Date
US20200098550A1 true US20200098550A1 (en) 2020-03-26

Family

ID=69883612

Family Applications (2)

Application Number Title Priority Date Filing Date
US16/582,115 Abandoned US20200098550A1 (en) 2018-09-26 2019-09-25 Plasma processing apparatus
US18/210,012 Active US12261028B2 (en) 2018-09-26 2023-06-14 Plasma processing apparatus

Family Applications After (1)

Application Number Title Priority Date Filing Date
US18/210,012 Active US12261028B2 (en) 2018-09-26 2023-06-14 Plasma processing apparatus

Country Status (3)

Country Link
US (2) US20200098550A1 (en)
JP (1) JP7105666B2 (en)
TW (2) TWI852945B (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200219753A1 (en) * 2019-01-09 2020-07-09 Tokyo Electron Limited Plasma processing apparatus and mounting table thereof
CN112397366A (en) * 2020-11-05 2021-02-23 北京北方华创微电子装备有限公司 Bearing device and semiconductor reaction chamber
CN113345830A (en) * 2020-03-03 2021-09-03 东京毅力科创株式会社 Substrate support table, plasma processing system, and method for mounting ring-shaped member
US20210384013A1 (en) * 2020-06-05 2021-12-09 Tokyo Electron Limited Plasma processing apparatus
CN113903645A (en) * 2020-06-22 2022-01-07 东京毅力科创株式会社 Plasma processing system, plasma processing apparatus, and edge ring replacement method
CN113903646A (en) * 2020-07-07 2022-01-07 东京毅力科创株式会社 Plasma processing apparatus and mounting table for plasma processing apparatus
US20220059384A1 (en) * 2020-08-18 2022-02-24 Kabushiki Kaisha Yaskawa Denki Allignment and transport of substrate and focus ring
US20220122878A1 (en) * 2019-05-10 2022-04-21 Lam Research Corporation Automated process module ring positioning and replacement
CN114530361A (en) * 2020-11-23 2022-05-24 中微半导体设备(上海)股份有限公司 Lower electrode assembly, plasma processing apparatus and method of replacing focus ring
US20220165550A1 (en) * 2020-11-26 2022-05-26 Samsung Electronics Co., Ltd. Plasma processing apparatus and methods of manufacturing semiconductor device using the same
US11348767B2 (en) * 2019-05-14 2022-05-31 Beijing E-Town Semiconductor Technology Co., Ltd Plasma processing apparatus having a focus ring adjustment assembly
JP2022148699A (en) * 2021-03-24 2022-10-06 東京エレクトロン株式会社 Plasma processing system and method of mounting annular member
US20230143327A1 (en) * 2021-11-09 2023-05-11 Samsung Electronics Co., Ltd. Focus ring, substrate processing apparatus including the same, and substrate processing method using the same
JP7492928B2 (en) 2021-02-10 2024-05-30 東京エレクトロン株式会社 SUBSTRATE SUPPORT, PLASMA PROCESSING SYSTEM AND PLASMA ETCHING METHOD - Patent application
TWI881222B (en) * 2021-05-25 2025-04-21 美商應用材料股份有限公司 Substrate assembly, substrate holder assembly, and processing apparatus

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3461263B2 (en) 1997-07-08 2003-10-27 松下電器産業株式会社 Delta-sigma modulation amplifier
JP7580328B2 (en) * 2020-06-05 2024-11-11 東京エレクトロン株式会社 Plasma Processing Equipment
KR102194996B1 (en) * 2020-09-07 2020-12-28 (주)엠엑스앤 Cooling sheet attachment apparatus of focusing ring for semiconductor device manufacturing
CN116250072A (en) * 2020-11-19 2023-06-09 应用材料公司 Ring for substrate extreme edge protection
KR102214048B1 (en) * 2020-12-04 2021-02-10 (주)엠엑스앤 Cooling sheet attachment apparatus to focusing ring for semiconductor manufacturing apparatus
JP7544450B2 (en) 2021-03-17 2024-09-03 東京エレクトロン株式会社 Plasma Processing Equipment
KR102760147B1 (en) * 2022-11-09 2025-02-03 세메스 주식회사 Substrate supporting unit, apparatus for processing substrate including the same, and ring transfer method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160307742A1 (en) * 2015-04-17 2016-10-20 Applied Materials, Inc. Edge ring for bevel polymer reduction

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2713276B2 (en) 1995-12-07 1998-02-16 日本電気株式会社 Semiconductor device manufacturing apparatus and semiconductor device manufacturing method using the same
US7004107B1 (en) * 1997-12-01 2006-02-28 Applied Materials Inc. Method and apparatus for monitoring and adjusting chamber impedance
JP2000269197A (en) * 1999-03-19 2000-09-29 Rohm Co Ltd Plasma surface treatment apparatus for semiconductor substrate
US6363882B1 (en) * 1999-12-30 2002-04-02 Lam Research Corporation Lower electrode design for higher uniformity
JP4559595B2 (en) 2000-07-17 2010-10-06 東京エレクトロン株式会社 Apparatus for placing object to be processed and plasma processing apparatus
JP2002110652A (en) * 2000-10-03 2002-04-12 Rohm Co Ltd Plasma treatment method and its device
TW541586B (en) 2001-05-25 2003-07-11 Tokyo Electron Ltd Substrate table, production method therefor and plasma treating device
KR100657054B1 (en) 2003-01-07 2006-12-13 동경 엘렉트론 주식회사 Plasma processing apparatus and focus ring
US7381293B2 (en) 2003-01-09 2008-06-03 Taiwan Semiconductor Manufacturing Co., Ltd. Convex insert ring for etch chamber
US8382942B2 (en) * 2003-03-21 2013-02-26 Tokyo Electron Limited Method and apparatus for reducing substrate backside deposition during processing
US20040261946A1 (en) * 2003-04-24 2004-12-30 Tokyo Electron Limited Plasma processing apparatus, focus ring, and susceptor
US7338578B2 (en) 2004-01-20 2008-03-04 Taiwan Semiconductor Manufacturing Co., Ltd. Step edge insert ring for etch chamber
JP5317424B2 (en) 2007-03-28 2013-10-16 東京エレクトロン株式会社 Plasma processing equipment
US8435379B2 (en) * 2007-05-08 2013-05-07 Applied Materials, Inc. Substrate cleaning chamber and cleaning and conditioning methods
JP4962960B2 (en) * 2007-08-09 2012-06-27 国立大学法人大阪大学 Semiconductor wafer peripheral processing equipment
US8409995B2 (en) * 2009-08-07 2013-04-02 Tokyo Electron Limited Substrate processing apparatus, positioning method and focus ring installation method
JP5650935B2 (en) * 2009-08-07 2015-01-07 東京エレクトロン株式会社 Substrate processing apparatus, positioning method, and focus ring arrangement method
JP5719599B2 (en) * 2011-01-07 2015-05-20 東京エレクトロン株式会社 Substrate processing equipment
JP2013033175A (en) * 2011-08-03 2013-02-14 Sony Corp Display device
TWI571929B (en) 2012-01-17 2017-02-21 東京威力科創股份有限公司 Substrate mounting table and plasma treatment apparatus
JP6080571B2 (en) * 2013-01-31 2017-02-15 東京エレクトロン株式会社 Mounting table and plasma processing apparatus
JP2015065024A (en) * 2013-09-25 2015-04-09 株式会社ニコン Plasma processing apparatus, plasma processing method and ring member
US10658222B2 (en) * 2015-01-16 2020-05-19 Lam Research Corporation Moveable edge coupling ring for edge process control during semiconductor wafer processing
US20170263478A1 (en) * 2015-01-16 2017-09-14 Lam Research Corporation Detection System for Tunable/Replaceable Edge Coupling Ring
WO2017131927A1 (en) * 2016-01-26 2017-08-03 Applied Materials, Inc. Wafer edge ring lifting solution
JP6888007B2 (en) * 2016-01-26 2021-06-16 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Wafer edge ring lifting solution
JP6812224B2 (en) * 2016-12-08 2021-01-13 東京エレクトロン株式会社 Board processing equipment and mounting table
US11404249B2 (en) * 2017-03-22 2022-08-02 Tokyo Electron Limited Substrate processing apparatus
JP6861579B2 (en) * 2017-06-02 2021-04-21 東京エレクトロン株式会社 Plasma processing equipment, electrostatic adsorption method and electrostatic adsorption program
CN110506326B (en) * 2017-07-24 2024-03-19 朗姆研究公司 Removable edge ring design
KR102143290B1 (en) * 2017-11-21 2020-08-11 램 리써치 코포레이션 Bottom ring and middle edge ring
US11043400B2 (en) * 2017-12-21 2021-06-22 Applied Materials, Inc. Movable and removable process kit
CN207834260U (en) * 2018-01-24 2018-09-07 武汉新芯集成电路制造有限公司 A kind of plasma-activated reaction chamber and wafer bonding board
US10790123B2 (en) * 2018-05-28 2020-09-29 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
SG11202006623YA (en) * 2018-08-13 2020-08-28 Lam Res Corp Replaceable and/or collapsible edge ring assemblies for plasma sheath tuning incorporating edge ring positioning and centering features
JP7115942B2 (en) * 2018-09-06 2022-08-09 東京エレクトロン株式会社 PLACE, SUBSTRATE PROCESSING APPARATUS, EDGE RING AND TRANSFER METHOD OF EDGE RING
US11018046B2 (en) * 2019-04-12 2021-05-25 Samsung Electronics Co., Ltd. Substrate processing apparatus including edge ring

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160307742A1 (en) * 2015-04-17 2016-10-20 Applied Materials, Inc. Edge ring for bevel polymer reduction

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200219753A1 (en) * 2019-01-09 2020-07-09 Tokyo Electron Limited Plasma processing apparatus and mounting table thereof
US12293937B2 (en) * 2019-01-09 2025-05-06 Tokyo Electron Limited Plasma processing apparatus and mounting table thereof
US11501995B2 (en) * 2019-01-09 2022-11-15 Tokyo Electron Limited Plasma processing apparatus and mounting table thereof
US20230020793A1 (en) * 2019-01-09 2023-01-19 Tokyo Electron Limited Plasma processing apparatus and mounting table thereof
US20220122878A1 (en) * 2019-05-10 2022-04-21 Lam Research Corporation Automated process module ring positioning and replacement
US11515127B2 (en) 2019-05-14 2022-11-29 Beijing E-Town Semiconductor Technology Co., Ltd End effectors for moving workpieces and replaceable parts within a system for processing workpieces under vacuum
US11348767B2 (en) * 2019-05-14 2022-05-31 Beijing E-Town Semiconductor Technology Co., Ltd Plasma processing apparatus having a focus ring adjustment assembly
US11508560B2 (en) 2019-05-14 2022-11-22 Beijing E-Town Semiconductor Technology Co., Ltd Focus ring adjustment assembly of a system for processing workpieces under vacuum
US20210280396A1 (en) * 2020-03-03 2021-09-09 Tokyo Electron Limited Substrate support, plasma processing system, and method of placing annular member
CN113345830A (en) * 2020-03-03 2021-09-03 东京毅力科创株式会社 Substrate support table, plasma processing system, and method for mounting ring-shaped member
US20210384013A1 (en) * 2020-06-05 2021-12-09 Tokyo Electron Limited Plasma processing apparatus
US12347654B2 (en) * 2020-06-05 2025-07-01 Tokyo Electron Limited Plasma processing apparatus
CN113903645A (en) * 2020-06-22 2022-01-07 东京毅力科创株式会社 Plasma processing system, plasma processing apparatus, and edge ring replacement method
CN113903646A (en) * 2020-07-07 2022-01-07 东京毅力科创株式会社 Plasma processing apparatus and mounting table for plasma processing apparatus
US20220059384A1 (en) * 2020-08-18 2022-02-24 Kabushiki Kaisha Yaskawa Denki Allignment and transport of substrate and focus ring
US12131936B2 (en) * 2020-08-18 2024-10-29 Kabushiki Kaisha Yaskawa Denki Alignment and transport of substrate and focus ring
WO2022095794A1 (en) * 2020-11-05 2022-05-12 北京北方华创微电子装备有限公司 Carrying device and semiconductor reaction chamber
US20230274917A1 (en) * 2020-11-05 2023-08-31 Beijing Naura Microelectronics Equipment Co., Ltd. Carrier device and semiconductor reaction chamber
CN112397366A (en) * 2020-11-05 2021-02-23 北京北方华创微电子装备有限公司 Bearing device and semiconductor reaction chamber
US20220165551A1 (en) * 2020-11-23 2022-05-26 Advanced Micro-Fabrication Equipment Inc. China Bottom electrode assembly, plasma processing apparatus, and method of replacing focus ring
CN114530361A (en) * 2020-11-23 2022-05-24 中微半导体设备(上海)股份有限公司 Lower electrode assembly, plasma processing apparatus and method of replacing focus ring
US12094693B2 (en) * 2020-11-23 2024-09-17 Advanced Micro-Fabrication Equipment Inc. China Bottom electrode assembly, plasma processing apparatus, and method of replacing focus ring
US20220165550A1 (en) * 2020-11-26 2022-05-26 Samsung Electronics Co., Ltd. Plasma processing apparatus and methods of manufacturing semiconductor device using the same
US12315703B2 (en) * 2020-11-26 2025-05-27 Samsung Electronics Co., Ltd. Plasma processing apparatus and methods of manufacturing semiconductor device using the same
JP7492928B2 (en) 2021-02-10 2024-05-30 東京エレクトロン株式会社 SUBSTRATE SUPPORT, PLASMA PROCESSING SYSTEM AND PLASMA ETCHING METHOD - Patent application
JP7534249B2 (en) 2021-03-24 2024-08-14 東京エレクトロン株式会社 Plasma processing system and method for mounting an annular member - Patents.com
JP2022148699A (en) * 2021-03-24 2022-10-06 東京エレクトロン株式会社 Plasma processing system and method of mounting annular member
TWI881222B (en) * 2021-05-25 2025-04-21 美商應用材料股份有限公司 Substrate assembly, substrate holder assembly, and processing apparatus
US20230143327A1 (en) * 2021-11-09 2023-05-11 Samsung Electronics Co., Ltd. Focus ring, substrate processing apparatus including the same, and substrate processing method using the same

Also Published As

Publication number Publication date
US12261028B2 (en) 2025-03-25
JP7105666B2 (en) 2022-07-25
US20230326725A1 (en) 2023-10-12
TWI852945B (en) 2024-08-21
TW202027162A (en) 2020-07-16
JP2020053538A (en) 2020-04-02
TW202445676A (en) 2024-11-16

Similar Documents

Publication Publication Date Title
US12261028B2 (en) Plasma processing apparatus
US10699935B2 (en) Semiconductor manufacturing device and processing method
US20230020793A1 (en) Plasma processing apparatus and mounting table thereof
JP7648700B2 (en) Tray
US11387080B2 (en) Substrate support and plasma processing apparatus
US9343336B2 (en) Plasma processing apparatus and plasma processing method
US7922440B2 (en) Apparatus and method for centering a substrate in a process chamber
JP2019117861A (en) Wafer processing method and wafer processing device
US10679827B2 (en) Method and apparatus for semiconductor processing chamber isolation for reduced particles and improved uniformity
US11978614B2 (en) Substrate processing apparatus
JP2017183700A (en) Plasma processing apparatus and plasma processing method
KR20210119296A (en) Edge ring, substrate support, plasma processing system and method of replacing edge ring
US20220301833A1 (en) Substrate support and plasma processing apparatus
US20140146434A1 (en) Mounting table structure and method of holding focus ring
US10923333B2 (en) Substrate processing apparatus and substrate processing control method
US10264630B2 (en) Plasma processing apparatus and method for processing object
US20230298865A1 (en) Substrate support assembly, plasma processing apparatus, and plasma processing method
US10714318B2 (en) Plasma processing method
US20210118648A1 (en) Substrate processing system and method for replacing edge ring
US11538669B2 (en) Plasma processing apparatus
US11692639B2 (en) Valve device
US11984300B2 (en) Plasma processing apparatus
US20250140595A1 (en) Apparatus for processing substrate
US20250146129A1 (en) Semiconductor manufacturing facility and shower head coating method using the same
US20240297025A1 (en) Plasma processing system and plasma processing apparatus

Legal Events

Date Code Title Description
AS Assignment

Owner name: TOKYO ELECTRON LIMITED, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TAKAHASHI, SHUICHI;MIYADATE, TAKAHARU;KIKUCHI, TAKAAKI;AND OTHERS;SIGNING DATES FROM 20190917 TO 20190918;REEL/FRAME:050485/0353

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION