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TW201233280A - Chemical palladium-gold plating film method - Google Patents

Chemical palladium-gold plating film method Download PDF

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Publication number
TW201233280A
TW201233280A TW100102661A TW100102661A TW201233280A TW 201233280 A TW201233280 A TW 201233280A TW 100102661 A TW100102661 A TW 100102661A TW 100102661 A TW100102661 A TW 100102661A TW 201233280 A TW201233280 A TW 201233280A
Authority
TW
Taiwan
Prior art keywords
layer
replacement
palladium
gold
reduction
Prior art date
Application number
TW100102661A
Other languages
Chinese (zh)
Other versions
TWI409015B (en
Inventor
Ming-Hong Lin
Kun-Zheng Liu
Ying-Jie Li
guo-bin Qiu
Original Assignee
Taiwan Uyemura Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Uyemura Co Ltd filed Critical Taiwan Uyemura Co Ltd
Priority to TW100102661A priority Critical patent/TW201233280A/en
Priority to CN2011101925171A priority patent/CN102605359A/en
Priority to JP2011229483A priority patent/JP2012153974A/en
Priority to US13/326,370 priority patent/US20120186852A1/en
Priority to KR1020120005470A priority patent/KR20120086253A/en
Publication of TW201233280A publication Critical patent/TW201233280A/en
Application granted granted Critical
Publication of TWI409015B publication Critical patent/TWI409015B/zh

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemically Coating (AREA)
  • Wire Bonding (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

The present invention provides a manufacturing method of chemical palladium-gold plating film. It uses the substitution reaction to form a substitution palladium plating layer on a solder pad, then, and the reduction reaction on the substitution palladium plating layer to form a reduced palladium plating on the substitution palladium plating layer. The method eventually uses the substitution palladium plating layer, the reduced palladium plating or a substitution-reduced palladium plating reacts on the reduced palladium plating to form a gold plating layer. The present invention uses a thicker palladium plating to replace the use of a conventional nickel layer, so as to increase the wire binding strength between the copper or palladium-gold wires and the solder pad.

Description

201233280 六、發明說明： 【發明所屬之技術領域】 ’特別是指一種化學鈀 本發明係有關一種焊塾表面保護層的製作方、'去 金锻膜的製作方法。 【先前技術】 鋪金常餘Μ、液晶顯㈣基板、喊基板、絲板、忙載板盘 印刷電路板等電子工業零件用以形成電性連接的焊塾表面上，以提升打線 與焊墊在焊接上的接合性與•性。但在焊塾上形成鎳層後進行無電解錄 金以形成金層時，雜錢取狀應會·層巾崎餘子的粒界部分進 行強烈的響性攻擊，軸金層下挪成殘缺部分而產生飢，相對的錄 層將變的脆弱，在焊接時將無法確保充分的焊接接合強度。 因此’新的化鍊把金製程被提出，以藉由纪層來解決金對錄強烈攻擊 現象’化錄絲餘軸可靖決上❹搞，但騎的存在卻導致硬度增 加’使得後續無法順利打線接合銅線或者銅把線。 有鑑於此，本發明遂針對上述習知技術之缺失，提出一齡新的化學 把金鑛膜㈣作方法，以姐克社述之該等問題。 【發明内容】 本發明之主要目的在提供—種化雜金賴㈣作方法，其能應用於 較為低階但線路密集度高之電子產品封裝製程上。 本發明之另一目的在提供一種化學纪金鑛膜的製作方法，其無使用鎳 層’能提升崎或_線鱗墊的接合可靠度，並可減低成本。 為達上述之目的’本發明提供一種化學叙錢膜的製作方法，其先提 3 201233280 供-焊墊。接續，利用置換反應於焊塾上形成一置換細層,，利 用還原反應於置換型練層上形成__型續層。最後，彻 還原型或者半置财還翻反應_翻_層上軸—金錄層。 本發明尚提供ρ種化轴錢_製作枝，錢輪供一焊塾。 接續’制-兼具觸媒域化秋效用之藥水來同時進行置換與還原反 應，以於焊塾上形成-缝層。最後，利用置換型、還原型或者半置換半 還原型反應於還原型鈀鐘層上形成一金鍍層。 本發明尚提供另-種化學把金鍵臈的製作方法，其係先提供一焊塾。 接續，於焊墊上形成—置換型最後，细置換型、還原型或者半 置換半還原型反應於置換型鈀鍍層上形成一金鍍層。 底下藉由具體實施例詳加說明，當更容易瞭解本發明之目的、技術内 容、特點及其所達成之功效。 【實施方式】 本發明揭示一種化學鈀金鍍膜的製作方法，其係針對欲進行銅線或銅 鈀線封裝製程之銅焊墊表面進行表面處理，以直接在焊墊表面依序形成一 緻密性高的鈀鍍層與一金鍍層，在無使用鎳層的情況下，增進後續銅線或 銅鈀線的打線接合強度。 上述之鈀鍍層是利用電化學反應所形成。鈀鍍層可以是純麵鍍層或者 是鈀磷合金鑛層。本發明之化學鈀金鍍膜之生成方法有下列兩種： 清參閱第1圖’其係第一種方法的步驟流程圖。首先如步驟si所述， 提供一焊墊10。接續，如步驟S2所述，先進行置換反應於焊墊10表面形 成一置換型鈀鍍層12。再如步驟S3所述’以還原反應增厚形成一位於置換 201233280 型練層12上之還原型缝層ί4。最後，如步驟S4所述，以置換型或還 原型或半置換半還反應形成1蓋於還靡㈣層14上之金鐘層16, 形成如第2圖所示之結構。 在此方式下，置換型把鍍層12加上還原魏錢層14之厚度為謂〜 0.2微米，金鍍層16之厚度為〇 〇3〜〇 2微米。 • 請參閱第3圖，其係第二種^ . 方法的步驟程圖。首先，如步驟§11所 述，提供-焊塾HW妾續’如步领S12所述，利用一道藥水來進行作業， φ此藥水兼具觸媒城化學把致用，因此㈣時進行置換及還原反應於焊 m成賴層is。最後，如步驟阳所述，再以置換型或還原型或半 置換半還原型反應餘顯18上形成-金鍵層20,形成如第4 _示之結 構。 在此方式下’織層之厚麵G G3〜練層之厚度為〇 〇3〜 0.2微米。 請參閱第5圖，其係第三種方法的步驟流程圖。此方法相較於上述第 φ 一種方法，其實就是省略還原型鈀鍍層的部分。詳細步驟為，首先如步驟 S21所述，提供一焊墊10。接續，如步驟s22所述，先進行置換反應於焊 墊ίο表面形成一置換型鈀鍍層12。再如步驟s23所述，以置換型或還原型 或半置換半還原蜇反應形成一覆蓋於置換型把魏廣12上之金鑛層16,形成 如第6圖所示之結構。 在此方式下，置換型鈀鍍層12之厚产為〇〇3-^·2微米’金鍍層之厚 度為0.03〜0.2微米。 而上述三種方式的操作溫度大約都在25〇c〜95°C ’酸鹼值都是在Ph4 201233280 〜9之間。 本發明強化纖層的緻密性，來取代錦層的存在，以避免鎳存在時所 產生的各制題再者，本侧之技術時的最健行範例是細於較為低 階但線路密繼之磁品職_上。目綱t德所需軸 次數較低，·_子的移動較少，並不妓幅度的賊至域層内。再 者，當元件碰_料且親密集度騎，焊墊贿也會削、，而本發 明無使用騎的特性上’有利於銅焊墊與銅線她銅線的打線，不僅不會 影響可靠度’更可減低成本。 唯以上所述者，僅為本發明之較佳實施例而已，並非用來限定本發明 實施之細。故即凡依本發8种請細所述之特徵及精神所為之均等變化 或修飾，均應包括於本發明之申請專利範圍内。 【圖式簡單說明】 第1圖係本發明之化學鈀金鍍膜的第一種製作步驟流程圖。 第2圖是第1圖之步驟所製得之化學鈀金鍍膜的結構示意圖。 第3圖係本發明之化學鈀金鐘膜的第二種製作步驟流程圖。 第4圖是第3圖之步驟所製得之化學鈀金鍍膜的結構示意圖。 第5圖係本發明之化學鈀金鍍膜的第三種製作步驟流程圖。 第6圓是第5圖之步驟所製得之化學鈀金鍍膜的結構示意圖。 【主要元件符號說明】 10焊塑· 12置換型鈀鍍層 14還原型鈀鍍層 201233280 16金鑛層 18鈀鍍層 20金鑛層201233280 VI. Description of the invention: [Technical field to which the invention pertains] ‘Specially refers to a chemical palladium. The present invention relates to a method for producing a soldering surface protective layer and a method for producing a gold-free forged film. [Prior Art] Electronic industrial parts such as gold-plated permanent enamel, liquid crystal display (four) substrate, shouting substrate, silk board, and busy carrier printed circuit board are used to form electrically connected soldering surfaces to enhance wire bonding and bonding pads. Bonding and properties on the weld. However, when a nickel layer is formed on the soldering iron and an electroless gold is recorded to form a gold layer, the miscellaneous money should be subjected to a strong resilience attack on the grain boundary portion of the layered shovel, and the underlying gold layer is turned into a defective portion. Part of the hunger, the relative recording layer will become fragile, and will not ensure sufficient weld joint strength during welding. Therefore, 'the new chain of gold puts the gold process to be solved, so as to solve the strong attack phenomenon of the gold on the record by the stratification layer', the remaining axis of the record can be decided, but the presence of the ride leads to an increase in hardness. Smoothly wire the copper wire or copper wire. In view of the above, the present invention has been made in view of the above-mentioned shortcomings of the prior art, and proposes a new age-old chemical method for gold film (4), which is described by the sister company. SUMMARY OF THE INVENTION The main object of the present invention is to provide a method for producing a hybrid (4) method, which can be applied to an electronic product packaging process with a relatively low order but high line density. Another object of the present invention is to provide a method for producing a chemical gold ore film which can improve the bonding reliability of the squash or squama pad without using a nickel layer, and can reduce the cost. In order to achieve the above object, the present invention provides a method for producing a chemical film, which first mentions 3 201233280 for a solder pad. Subsequently, a replacement fine layer is formed on the solder fillet by a displacement reaction, and a __ type continuation layer is formed on the replacement layer by a reduction reaction. Finally, the full reduction or semi-finance also reverses the reaction _ flip _ layer upper axis - gold recording layer. The invention still provides a peg to make a shaft, and a money wheel for a welding bead. The continuation-system--the syrup of the catalyst-mediated autumn effect is used to simultaneously perform the replacement and reduction reaction to form a seam layer on the soldering iron. Finally, a gold plating layer is formed on the reduced palladium clock layer by a substitution type, a reduction type or a semi-replacement half reduction type reaction. The present invention further provides a method for producing a chemically bonded gold bond, which first provides a solder fillet. Continuation, formation on the pad - displacement type Finally, a fine displacement type, a reduction type or a semi-replacement semi-reduction type reaction forms a gold plating layer on the displacement type palladium plating layer. The details, technical contents, features, and effects achieved by the present invention will become more apparent from the detailed description of the embodiments. [Embodiment] The present invention discloses a method for fabricating a chemical palladium gold plating film, which is to surface-treat the surface of a copper pad to be subjected to a copper wire or copper palladium wire packaging process to form a uniform tightness directly on the surface of the pad. The high palladium coating and a gold plating enhance the wire bonding strength of the subsequent copper wire or copper palladium wire without using a nickel layer. The above palladium plating layer is formed by an electrochemical reaction. The palladium plating layer may be a pure surface plating layer or a palladium phosphorus alloy ore layer. There are two methods for producing the chemical palladium gold plating film of the present invention: Refer to Fig. 1 for a flow chart of the steps of the first method. First, as described in step si, a pad 10 is provided. Subsequently, as described in step S2, a displacement reaction is first performed on the surface of the pad 10 to form a replacement palladium plating layer 12. Further, as described in the step S3, the reducing layer ί4 on the layer of the 201233280 type layer 12 is formed by thickening by the reduction reaction. Finally, as described in step S4, the gold hour layer 16 overlaid on the layer (14) of the further layer is formed by a substitutional or reductive or semi-displacement half to form a structure as shown in Fig. 2. In this manner, the displacement type of the plating layer 12 plus the reduced Wei Qian layer 14 is referred to as ~0.2 μm, and the thickness of the gold plating layer 16 is 〇3 to 〇 2 μm. • See Figure 3, which is a step-by-step diagram of the second method. First, as described in step §11, the -weld HW is continued. As described in Step S12, a potion is used for the operation. φ This syrup is also used by Catalyst City Chemicals. Therefore, (4) is replaced. The reduction reaction is performed on the solder m to the layer is. Finally, as described in the step yang, the -gold bond layer 20 is formed on the replacement or reduction or semi-replacement semi-reduction type reaction 18 to form a structure as shown in the fourth embodiment. In this manner, the thickness of the thick surface G G3 to the layer of the woven layer is 〇 3 to 0.2 μm. Please refer to Figure 5, which is a flow chart of the steps of the third method. Compared with the above method φ, the method omits the portion of the reduced palladium plating layer. The detailed steps are as follows: First, as shown in step S21, a pad 10 is provided. Subsequently, as described in step s22, a displacement reaction is first performed on the surface of the pad to form a replacement palladium plating layer 12. Further, as described in step s23, a gold ore layer 16 covering the replacement type of Wei Guang 12 is formed by a substitutional or reduced or semi-substituted semi-reduced ruthenium to form a structure as shown in Fig. 6. In this manner, the thickness of the displacement type palladium plating layer 12 is 〇〇3-^·2 μm, and the thickness of the gold plating layer is 0.03 to 0.2 μm. The operating temperatures of the above three modes are all about 25〇c~95°C. The pH values are between Ph4 201233280 and 9. The invention strengthens the compactness of the fiber layer to replace the existence of the gold layer, so as to avoid the problems arising from the existence of nickel, and the most vigorous example of the technology of the present side is finer than the lower order but the line is closely followed. Magnetic product _ on. The required number of axes for the target t is lower, and the movement of the _ sub is less, and the thief does not smash into the domain layer. Moreover, when the component touches the material and rides intimately, the soldering bribe will also be cut, and the characteristics of the invention without the use of riding are beneficial to the bonding of the copper pad and the copper wire of the copper wire, which will not affect the wire. Reliability' can reduce costs. The above is only the preferred embodiment of the present invention and is not intended to limit the implementation of the present invention. Therefore, any changes or modifications to the characteristics and spirit of the above-mentioned eight types of details should be included in the scope of the patent application of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flow chart showing the first production step of the chemical palladium gold plating film of the present invention. Fig. 2 is a schematic view showing the structure of a chemical palladium gold plating film prepared in the step of Fig. 1. Figure 3 is a flow chart showing the second fabrication step of the chemical palladium iridium film of the present invention. Fig. 4 is a schematic view showing the structure of a chemical palladium gold plating film prepared in the step of Fig. 3. Figure 5 is a flow chart showing a third manufacturing step of the chemical palladium gold plating film of the present invention. The sixth circle is a schematic structural view of the chemical palladium gold plating film prepared in the step of Fig. 5. [Main component symbol description] 10 soldering · 12 displacement type palladium plating layer 14 reduction type palladium plating layer 201233280 16 gold ore layer 18 palladium plating layer 20 gold ore layer

Claims (1)

201233280 七、申請專利範圍： 1. 一種化學鈀金鐘膜的製作方法，其步驟包含有： 提供一焊墊； 利用置換反應於該焊墊上形成一置換型鈀鍍層；以及 利用置換型、還原型或者半置換半還原型反應於該置翻城層上形成 一金鍵層。 2. 如申請專利賴第i項所述之製作方法，其中該焊墊之材f為銅，該置 換型鈀__還原敎賴之㈣是驗或者是_合金。 3. 如申請專利範圍第丨項所述之製作方法，其製作過程之操作溫度為攻 〜95°C，酸鹼值為ph 4〜9。 4. 如申請補範㈣i顿述之製財法，其巾該置換雜顯之厚度為 〇.〇3〜0.2微米，該金鍍層之厚度為_〜〇2微米。 申明專利細第1酬述之製作方法，其絲祕低階但線路密集度 高之電子產品封裝製程。 6.如申請專利麵第丨項所述之製作方法，其中於形成該鍍金層前更包含 有-利用還原反應於該置換独鍍層上形成—還原型練層之步驟。 7·如申請專利細第6項所述之製作方法，其中該置換型域層之厚度加 上該還原她顯之厚度編3〜α_，該麵狀厚麟_〜〇 2 微米。 8.—種化轉金賴的製作綠，其麵包含有： 提供一焊塾； 兼'、觸媒le與化靴賴之藥水來_進行置換與還原反應，以 201233280 於該焊塾上形成一把錄層；以及 形成 利用置換型、還原型或者半置換半還原型反應於該還原型絶錄層上 —金鑛層。 9. 懈—該把 u.如申請專概圍第8項所述之 其中該把鍍層之厚度為0.03〜 微未，該金鍍層之厚度為〇.〇3〜0.2微米。 12.Γ請她_8 _狀_轉，鳩細齡辦集度 巧之電子產品封骏製程。201233280 VII. Patent application scope: 1. A method for preparing a chemical palladium film, the steps comprising: providing a solder pad; forming a replacement palladium plating layer on the solder pad by using a displacement reaction; and using a replacement type and a reduction type Or a semi-replacement semi-reduction type reaction forms a gold bond layer on the layer of the turn-over layer. 2. The method of claim 1, wherein the material f of the pad is copper, and the replacement palladium is a test or an alloy. 3. The manufacturing method described in the scope of the patent application is as follows: the operating temperature is ≥95 ° C, and the pH is ph 4 to 9. 4. If you apply for a supplement (4), the thickness of the replacement is 〇.〇3~0.2 μm, and the thickness of the gold plating is _~〇2 μm. Declaring the production method of the patent fine first reward, the electronic product packaging process with low secret but high line density. 6. The method according to claim 2, wherein the step of forming the gold plating layer further comprises the step of forming a reduction layer on the replacement plating layer by a reduction reaction. 7. The method of claim 6, wherein the thickness of the replacement domain layer is increased by the thickness of the reduction layer 3~α_, and the surface is thick _~〇 2 μm. 8.-The production of green tea, the bread contains: Provide a welding 塾; and 'catalyst le and the medicinal water of the boots _ to carry out the replacement and reduction reaction, to form a weld on the welding raft on 201233280 The recording layer; and the formation of the replacement type, reduction type or semi-replacement semi-reduction type on the reduced type supercritical layer - gold ore layer. 9. Lap--This is as described in item 8 of the application. The thickness of the plating layer is 0.03~micro, and the thickness of the gold plating layer is 〇.〇3~0.2 μm. 12. Please ask her _8 _ _ _ turn, 鸠 fine-aged set degree 巧之电子产品封骏process.
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TW100102661A TW201233280A (en) 2011-01-25 2011-01-25 Chemical palladium-gold plating film method
CN2011101925171A CN102605359A (en) 2011-01-25 2011-06-28 Chemical palladium-gold plated film structure and manufacturing method thereof, copper wire or palladium-gold plated film packaging structure jointed by palladium-copper wire and packaging process thereof
JP2011229483A JP2012153974A (en) 2011-01-25 2011-10-19 Chemical palladium/gold plating film structure, method for production thereof, palladium/gold plating film package structure bonded with copper wire or palladium/copper wire, and packaging process thereof
US13/326,370 US20120186852A1 (en) 2011-01-25 2011-12-15 Structure of electrolessly palladium and gold plated films and process for making the same, assembled structure of palladium and gold plated films bonded with copper or copper-palladium wire and assembling process therefore
KR1020120005470A KR20120086253A (en) 2011-01-25 2012-01-18 Structure of electrolessly palladium and gold plated films and Process for making the same, Assembled structure of palladium and gold plated films bonded with copper or copper-palladium wire and Assembling process therefor

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Publication number Priority date Publication date Assignee Title
TWI560317B (en) * 2015-04-10 2016-12-01
US9591753B2 (en) 2015-07-09 2017-03-07 Subtron Technology Co., Ltd. Circuit board and manufacturing method thereof

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TWI251920B (en) * 2003-10-17 2006-03-21 Phoenix Prec Technology Corp Circuit barrier structure of semiconductor package substrate and method for fabricating the same
JP4379413B2 (en) * 2005-12-06 2009-12-09 セイコーエプソン株式会社 Electronic component, method for manufacturing electronic component, circuit board, and electronic device
JP5297083B2 (en) * 2007-07-17 2013-09-25 新光電気工業株式会社 Solder bump formation method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI560317B (en) * 2015-04-10 2016-12-01
US9591753B2 (en) 2015-07-09 2017-03-07 Subtron Technology Co., Ltd. Circuit board and manufacturing method thereof

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