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TW201214753A - Light-emitting diode, light-emitting diode lamp and lighting device - Google Patents

Light-emitting diode, light-emitting diode lamp and lighting device Download PDF

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Publication number
TW201214753A
TW201214753A TW100102032A TW100102032A TW201214753A TW 201214753 A TW201214753 A TW 201214753A TW 100102032 A TW100102032 A TW 100102032A TW 100102032 A TW100102032 A TW 100102032A TW 201214753 A TW201214753 A TW 201214753A
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Taiwan
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light
layer
emitting diode
composition
substrate
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TW100102032A
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Chinese (zh)
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TWI446580B (en
Inventor
Noriyuki Aihara
Noriyoshi Seo
Noritaka Muraki
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Showa Denko Kk
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
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    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
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    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/48091—Arched
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The present invention provides a light-emitting diode comprising a light-emitting section, provided with an active layer having quantum well structure in which a well layer represented by a composition formula (InX1Ga1-X1)As (0 ≤ X1 ≤ 1) and a barrier layer represented by a composition formula (AlX2Ga1-X2)Y1P (0 ≤ X2 ≤ 1, 0 < Y1 ≤ 1) are interlaminated, a first guide and a second guide represented by a composition formula (AlX3Ga1-X3)Y2In1-Y2P (0 ≤ X3 ≤ 1, 0 < Y2 ≤ 1), which hold the active layer therebetween, and a first clad layer and a second clad layer, which hold the active layer therebetween through the first guide and the second guide respectively; a current diffusion layer formed on the light-emitting section; and a functional substrate bonded to the current diffusion layer; wherein the first clad layer and the second clad layer are represented by a composition formulation (AlX4Ga1-X4)Y3In1-Y3P (0 ≤ X4 ≤ 1, 0 < Y3 ≤ 1), a light-emitting diode lamp and a lighting device provided with the light-emitting diode.

Description

201214753 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種發光二極體、使用它之發光二極體 燈及照明裝置，該發光二極體係具有850 nm以上、尤其 900 nm以上之發光波峰波長。 本發明申請案係基於在2010年1月25日向日本國所 提出申請的特願2010-013530號、在2010年8月18日向 日本國所提出申請的特願2 0 1 0- 1 8 3 20 5號而主張優先權， 於此援用其內容。 【先前技術】 紅外發光二極體已被廣泛利用於紅外線通訊、紅外線 遙控裝置、各種感測器用光源、夜間照明等。 針對如此之波峰波長附近，習知係利用磊晶法而使含 有AlGaAs活性層的化合物半導體層成長於GaAs基板的發 光二極體（例如專利文獻1至3 );去除作爲成長基板所 用之GaAs基板’僅利用對發光波長爲透明的成長層而構成 其化合物半導體層之所謂的基板去除型發光二極體爲現狀 最高輸出的紅外發光二極體（例如專利文獻4 )。 另一方面，於機器間之訊息發送或接收所用之紅外線 通訊之情形下，例如使用8 5 0至9 0 0 n m之紅外線，紅外線 遙控操作通訊之情形下，受光部之感度爲高的波長帶，例 如使用8 8 0至9 4 0 nm之紅外光。作爲能夠使用於兼具紅外 線通訊與紅外線遙控操作通訊之兩機能的行動電話等之終 201214753 端機用的紅外線通訊與紅外線遙控操作通訊兩者之紅外發 光二極體，習知係使用發光波峰波長爲880至890‘nm之實 質不純物中含有Ge之AlGaAs活性層者（專利文獻4 )。 另外’作爲可具有900 nm以上之發光波峰波長的紅外 發光二極體’習知係使用In G a As活性層者（專利文獻5 至7 )。 [先前技術文獻] [專利文獻] 專利文獻1:日本特開平6-21507號公報 專利文獻2:日本特開2001-274454號公報 專利文獻3 :日本特開平7 - 3 8 1 4 8號公報 專利文獻4:日本特開2006-190792號公報 專利文獻5:日本特開2002-26377號公報 專利·文獻6:日本特開2002-111〇48號公報 專利文獻7:日本特開2002-344013號公報 【發明內容】 〔發明所欲解決之問題〕 然而，於專利申請人所知之範圍內，針對8 5 〇 nm以 上、尤其900 nm以上之紅外發光二極體，並無爲了使輸出 提尚’將晶晶晶圓貼附於機能性基板（接合）且去除用於 成長的GaAs基板之所謂的接合型。 另外，使用實際不純物中含有Ge之AlGaAs活性層之 情形，難以將發光波峰波長作成9 0 0 n m以上（專利文獻4 之第3圖）。 201214753 另外，針對可具有900 nm以上之發光波峰波長之使用 InGaAs活性層的紅外發光二極體，從進一步地提高性能、 節能、成本面之觀點，期望發光效率更高者之開發。 本發明係有鑒於上述情形所完成者，目的在於提供一 種高輸出/高效率地發射850 nm以上、尤其900 nm以上之 發光波峰波長的紅外光之紅外發光二極體，及使用它而成 之發光二極體燈及照明裝置。 〔解決問題之手段〕 本發明人係用以解決上述技術問題，不斷鑽硏之結 果，藉由將作成由InGaAs所構成的井層、作成由AlGalnP 所構成的障壁層之多重量子井構造作爲活性層，使由 AlGalnP所構成的導光層介於中間而夾住活性層，將包覆 層作成4元混晶的AlGalnP.，同時也使包含活性層、導光 層及包覆層之化合物半導體層磊晶成長於成長基板後，再 次將化合物半導體層貼附於透明基板（接合），作成去除 其成長基板之構造，而使高輸出/高效率地發射850 urn以 上、尤其900 nrn以上之發光波峰波長的紅外光的紅外發光 二極體得以完成。 首先，本發明人等係具有於紅外線通訊等所用之8 5 0 nm以上、尤其900 nm.以上之發光波峰波長的方式來採用 由InGaAs所構成的井層，作成用以提高單色性及輸出的多 重量子井構造之活性層。 另外，採用一種4元混晶之AlGalnP，其係於夾住此3 元混晶之井層的障壁層、及該井層、夾住包含障壁層之多 ⑤ 201214753 重量子井構造之導光層及包覆層中，能帶間隙大且對發光 波長爲透明，且因爲不含容易產生缺陷之As而結晶性佳。 以及，與作爲成長基板使用之GsAs作一比較，以 In Ga As層作爲井層之多重量子井構造係成爲晶格常數較 大且歪斜量子井構造。於如此之歪斜量子井構造中，對 InG a As之組成及厚度之輸出或單色性的影響也大，適切之 組成、厚度及成對數之選擇變得重要。因此，發現藉由將 與InGaAs井層相反的歪斜追加於障壁層之AlGalnP，而以 量子井構造整體來緩和因InGaAs之成對數增加所造成的 晶格不整，改善在高電流區域之發光輸出特性。 另外，如上所述，習知係於使用InGaAs系活性層之紅 外發光二極體中，並非將含此活性層之化合物半導體層貼 附於透明基板（接合）型，而是原狀態下使用使化合物半 導體層成長的GaAs基板。但是，GaAs基板係爲了提高傳 導性而進f了局慘雜，無法避免因載子（carrier)所造成的光之 吸收。因此’採用能夠迴避因載子所造成的光之吸收且貼 附於能夠期待高輸出/高效率之透明基板（接合）型。 尤其’接合型之情形，也有來自機能性基板之應力的 影響’含有最適化之該歪斜量子井的元件構造設計爲重要。 本發明人係基於如此之見解而進一步進行硏究的結 果’於是完成顯示於下列結構的本發明。 本發明係提供以下之結構： (1) 一種發光二極體，其特徵爲具備：發光部，其係具有： 201214753 交替積層由組成式（InxlGai-xl) As(OSXlSl)所構成的 井層與由組成式（AlX2Gai-x2) YilnmPC 0SX2S1、〇&lt; Y1S1)所構成的障壁層之量子井構造的活性層、夾住該活 性層之由組成式（AlX3Ga丨-X3) Y2In丨-Y2P(0SX3S1、〇&lt; Y2S1 )所構成的第1導光層與第2導光層、與分別使該第 1導光層與第2導光層介於中間而夾住該活性層之第1包 覆層與第2包覆層；電流擴散層，其係形成於該發光部上； 及機能性基板，其係接合於該電流擴散層；而該第1與第 2 包覆層爲由組成式（Alx4Gai-x4) Y3 Ini-Y3P(〇5X4Sl、 〇 &lt; Υ3&lt;1 )所構成。 (2 )在該項（1 )揭示之發光二極體，其中該井層之Ιη組 成（XI )爲 02X150.3。 (3) 在該項（2)揭示之發光二極體，其中該井層之^組 成（XI )爲 0.1 幺XI 幺0.3。 (4) 在該項（1)至（3)中任一項揭示之發光二極體，其 中該障壁層之組成Χ2與Υ1分別爲〇^χ2^〇.2、0.5&lt; Y1S0.7，該第1與第2導光層之組成Χ3與Υ2分別爲 0·2&lt;Χ3&lt;0·5、0.4&lt;Υ2&lt;0·6,該第1與第2包覆層之組成Χ4 與 Y3 分別爲 0.3SX4S0.7、〇.4&lt;Y3S〇.6。 (5) 在該項（1)至（4)中任一項揭示之發光二極體，其 中該機能性基板係對發光波長爲透明。 (ό)在該項（1)至（5)中任一項揭示之發光二極體，其 中該機能性基板係由GaP或SiC所構成。 201214753 (7)在該項（1)至（6)中任一項揭示之發光二極體，其 中該機能性基板之側面係在接近該發光部之側，對於主要 的光取出面具有約略垂直的垂直面；在遠離該發光部之 側’對於該主要的光取出面具有傾斜於內側之傾斜面。 (8 )在該項（7)揭示之發光二極體，其中該傾斜面係含有 粗糙面。 (9) 一種發光二極體，其特徵爲具備：發光部，其係具有 交替積層由組成式（InjuGam) As(OsXKl)所構成的 井層與由組成式（AlnGai-xz) YilnmPCOSXSSl、0&lt; YK1)所構成的障壁層之量子井構造的活性層、夾住該活 性層之由組成式（Alx3Ga 丨- X3) Y2IIM-Y2PC0SX3S1、0&lt; Y2S1 )所構成的第1導光層與第2導光層、與分別使該第 1導光層與第2導光層介於中間而夾住該活性層之第1包 覆層與第2包覆層；電流擴散層，其係形成於該發光部上； 及機能性基板，其係對向於該發光部而配置且含有對於發 光波長具有90%以上之反射率的反射層，並接合於該電流 擴散層；而該第1與第2包覆層爲由組成式（Alx4Gai-X4) Y3 IrM-nP ( 0 幺X4S1、0&lt; Y3 幺 1)所構成。 於此，「接合」更包含使電流擴散層與機能性基板之 間的層介於中間而接合。 (10) 在該項（9)揭示之發光二極體，其中該井層之In 組成（XI )爲 0SXK0.3。 (11) 在該項（1〇)揭示之發光二極體’其中該井層之In 201214753 組成（x 1 )爲 〇. 1 SXl SO. 3。 (12) 在該項（9)至（11)中任一項揭示之發光二極體， 其中該障壁層之組成X2與Y1分別爲0SX2S0.2、〇.5&lt; Y1S0.7’該第1與第2導光層之組成X3與Y2分別爲 0.2&lt;X3&lt;0.5 ^ 0.4 &lt; Y2&lt;0.6 &gt; Μ % 1 與第 2 包覆層之組成 Χ4 與 Υ3 分別爲 0.3SX4S0.7、0.4&lt;Y3S0.6。 (13) 在該項（9)至（12)中任一項揭示之發光二極體， 其中該機能性基板係含有由矽或鍺所構成的層。 (14) 在該項（9)至（12)中任一項揭示之發光二極體， 其中該機能性基板係含有金屬基板。 (15) 在該項（14)揭示之發光二極體，其中該金屬基板 係由複數之金屬層所構成。 (16) 在該項（1)至（IS)中任一項揭示之發光二極體， 其中該電流擴散層係由GaP或GalnP所構成。 (17) 在該項（1)至（16)中任一項揭示之發光二極體， 其中該電流擴散層之厚度爲0.5至20 μηι之範圍。 (18) 在該項（1)至（17)中任一項揭示之發光二極體， 其中第1電極及第2電極係設置於發光二極體之該主要的 光取出面側》 (19) 在該項（18)揭示之發光二極體，其中該第1電極 及該第2電極係歐姆電極。 (20) 在該項（18)或（19)中任一項揭示之發光二極體， 其係在該機能性基板之該主要的光取出面側的相反側之面 -10- ⑤ 201214753 更具備第3電極。 (21) —種發光二極體燈，其特徵爲具備在該項（1)至（20) 中任一項揭示之發光二極體。 (22) —種發光二極體燈，其特徵爲具備在該項（20 )揭 不之發光—極體，該第1電極或該第2電極與該第3電極 予以連接於約略相同之電位。 (23 )—種照明裝置，其係搭載複數個在該項（】）至（20 ) 中任一項揭示之發光二極體，及/或在該項（21)或（22) 中至少任一項揭示之發光二極體燈。 還有’於本發明中，所謂「機能性基板」係指使化合 物半導體層成長於成長基板後，去除其成長基板，使電流 擴散層介於中間而接合於化合物半導體層來支撐化合物半 導體層的基板，但於電流擴散層中形成既定之層後，將既 定之基板接合於其既定之層上的構造之情形，含有其既定 之層而稱爲「機能性基板」。 [發明之效果] 若根據上述之構造，獲得以下之效果。 能夠以高輸出/高效率地發射8 5 0 rim以上、尤其900 nm以上之發光波峰波長的紅外光。 因爲活性層係具有交替積層爲由組成式（InxlGai- X1 ) As( 0SXK1)所構成的井層與由組成式（Alx2Ga〖_x2) γιΙηι-γιΡ (0&lt;X2&lt;1 ' 0&lt;Yld)所構成的障壁層之多重量子井構造 的結構，具優越之單色性。 201214753 藉由將機能性基板作成對發光波長爲透明者的結構， 不吸收來自發光部之發光，能夠顯示高輸出/高效率。 因爲障壁層、導光層及包覆層係由組成式（AlxGai-χ) YIni -YP ( 0&lt;Χ1&lt;1 ' 0 &lt; Y&lt;1 )所構成的結構，所以不含容易形 成缺陷的As而有助於高結晶性且高輸出。 因爲障壁層、導光層及包覆層係爲由組成式（AlxGai-x) γ In丨-YP( 0SX1S1、0&lt; YS1 )所構成的結構，所以與障壁層、 導光層及包覆層爲由3元混晶所構成的紅外發光二極體作 一比較，A 1濃度更低且耐熱性更提高。 因爲活性層係爲具有由組成式（InxiGai-χ!) As (0SX1S1)所構成的井層與由組成式（Alx2Gai-x2) υιΙπι-υ1Ρ (0^Χ2^1、0&lt;Y1S1)所構成的障壁層之積層構造的結構， 所以適合於利用MOCVD法而量產。 使用作爲化合物半導體層之成長基板所具有的Ga As 基板之情形，藉由將由組成式（AlxzGai-xz) YIIni-Y1P (0SX2S1、0&lt;Y1S1)所構成的障壁層之組成Χ2及Υ1分 別作成採取0^乂2&lt;0.2、0.5&lt;丫1€0.7之結構，而緩和對〇3八3 基板之井層的歪斜而能夠抑制結晶性之降低。 藉由將機能性基板作成由GaP、SiC、矽、或鍺所構成 的結構，由於與發光部之熱膨脹係數接近而能夠減低應 力。另外，由於爲難以腐蝕之材質，耐濕性將提高。 藉由將機能性基板與電流擴散層中任一種皆爲由GaP 所構成的結構，能夠使其接合容易且接合強度變大。 201214753 藉由將電流擴散層作成由GalnP所構成的結構，能夠 使其與InG a As井層晶格整合而使結晶性提高。 本發明之發光二極體燈能夠具有850 nm以上、尤其900 nm以上之發光波峰波長，由於具有優異的單色性，同時也 爲高輸出/高效率且具備優異的耐濕性之上述發光二極 體，適合於感測器用途等且廣泛的用途之光源。 【實施方式】 以下，關於採用本發明之一實施形態的發光二極體及 使用它之發光二極體燈，使用圖式而詳細說明。再者，在 以下之說明所用之圖式，係用以容易了解特徵及方便具有 放大成爲特徵的部分之情形，各構造要件之尺寸比率等並 不受限於與實際相同。 &lt;發光二極體燈&gt; 第1圖及第2圖係用以說明使用採用本發明之一實施 形態的發光二極體之發光二極體燈的圖形：第1圖係平面 圖；第2圖係沿著顯示於第1圖中之A-A’線的剖面圖。 如第1圖及第2圖所示，使用本實施形態之發光二極 體1的發光二極體燈41，係在安裝基板42之表面構裝一 個以上之發光二極體1。 更具體而言，在安裝基板42之表面設置η電極端子 43與ρ電極端子44。另外，使用金線45而連接（線接合） 發光二極體1之第1電極的η型歐姆電極4與安裝基板42 之η電極端子43。另一方面，使用金線46而連接發光二 201214753 極體1之第2電極的p型歐姆電極5與安裝基板42之p電 極端子44»再者’如第2圖所示，在與發光二極體1之n 型及Ρ型歐姆電極4, 5所設置之面的相反側之面，設置第 3電極6’藉由此第3電極6，使發光二極體1連接於η電 極端子43上而固定於安裝基板42。於此，η型歐姆電極4 與第3電極6係藉由η電極端子43而成爲等電位或約略等 電位的方式來予以電性連接。藉由第3電極，對於過大之 反向電壓，過電流不流入活性層，電流係流向第3電極與 ρ型電極間，能夠防止活性層之破損。在第3電極與基板 界面側，也能夠進行高輸出。另外，藉由將共晶金屬、焊 錫等附加於第3電極之表面側，使共晶固晶等之更簡便的 裝配技術變得能夠利用。而且，構裝有安裝基板42之發光 二極體1的表面係藉由矽樹脂或環氧樹脂等之一般的密封 樹脂47所密封。 &lt;發光二極體（第1之實施形態）&gt; 第3圖及第4圖係用以說明關於採用本發明之第1實 施形態之發光二極體的圖形：第3圖係平面圖；第4圖係 沿著顯示於第3圖中之Β-Β’線的剖面圖。另外，第5圖係 井層與障壁層之積層構造的剖面圖。 關於第1實施形態之發光二極體，其特徵爲具備：發 光部7，其係具有：交替積層由組成式（InxlGai-xl) As (OSXlSl)所構成的井層17與由組成式（Alx2Gai-x2) YiIni-γιΡ (0SX2S1、0&lt;YK1)所構成的障壁層18之量子井構造的 -14- ⑤ 201214753 活性層U、夾住活性層11之由組成式（AlX3Gai-X3) nin,-Y2P (0SX3S1、0&lt;Y2S1)所構成的第1導光層10與第2導光 層12、與分別使第1導光層10與第2導光層12介於中間 而夾住活性層11之第1包覆層9與第2包覆層13;電流 擴散層8，其係形成於發光部7上；及機能性基板3，其係 接合於電流擴散層8;而第1包覆層9與第2包覆層13爲由組 成式（AlX4Ga卜 X4) Y3 lni- Y3P( 0SX4S1、0&lt;Y3 幺 1)所構成。 另外，發光二極體1係具備在主要的光取出面所設置 的η型歐姆電極（第1電極）4及ρ型歐姆電極（第2電 極）5而所槪略構成。 再者，所謂本實施形態中之主要的光取出面係在化合 物半·導體層2上，貼附機能性基板3之面的相反側之面。 化合物半導體層（也稱爲磊晶成長層）2係如第4圖 所示，具有依序積層ρη接合型之發光部7與電流擴散層8 的構造。於此化合物半導體層2之構造中，能夠適時增加 習知之機能層。例如，能夠設置用以降低歐姆（Ohmic )電 極之接觸電阻的接觸層、且用以使元件驅動電流平面性地 擴散於全般發光部之電流擴散層；相反地用以限制元件驅 動電流所流通的區域之電流阻止層或電流狹窄層等習知之 層構造。 再者，化合物半導體層2較佳爲使其磊晶成長而形成 於GaAs基板之上者。 如第4圖所示，發光部7係在電流擴散層8上至少依 201214753 序積層P型之下部包覆層（第1包覆層）9、下部導光層 10、活性層11、上部導光層12、η型之上部包覆層（第2 包覆層）13所構成。亦即，發光部7係導致放射再結合的 載體（carrier)及用以使發光「關進」於活性層11中，在 獲得高強度之發光上，較佳爲含有對峙於活性層11之下側 及上側所配置的下部包覆層9、下部導光（guide)層10、及 上部導光層12、上部包覆層13之所謂作成雙異質（英語 簡稱爲：DH)的構造。 如第5圖所示，活性層1 1係用以控制發光二極體 (LED )之發光波長而構成量子井構造。亦即，活性層11 係在兩端具有障壁層18之井層17與障壁層18之多層構造 (積層構造）。 活性層11之層厚較佳爲50至1000 nm之範圍。另外， 活性層1 1之傳導型並未予以特別限定，也能夠選擇未摻 雜、P型及η型中任一種。爲了提高發光效率，期望作成 結晶性良好之未摻雜或低於3 X 1 0 17cm - 3之載子濃度。 第6圖係顯示將井層17之In組成（XI)固定於0.1， 顯示其層後與發光波峰波長之相關。表1中顯示於第6圖 之數據値。若井層變厚成3 nm、5 nm、7 nm時，得知波長 單調地變長爲820 nm、870 nm、920 nm。 表1201214753 VI. Description of the Invention: [Technical Field] The present invention relates to a light-emitting diode, a light-emitting diode lamp using the same, and a lighting device having a light-emitting diode system of 850 nm or more, particularly 900 nm or more Luminous peak wavelength. The application of the present invention is based on the Japanese Patent Application No. 2010-013530 filed on January 25, 2010, and the Japanese Patent Application No. 2010-013530, filed on August 18, 2010. Priority is claimed on the 5th, and its content is used here. [Prior Art] Infrared light-emitting diodes have been widely used in infrared communication, infrared remote control devices, various sensor light sources, and night illumination. In the vicinity of such a peak wavelength, a compound semiconductor layer containing an AlGaAs active layer is grown on a light-emitting diode of a GaAs substrate by an epitaxial method (for example, Patent Documents 1 to 3); and a GaAs substrate used as a growth substrate is removed. A so-called substrate-removing type light-emitting diode which constitutes a compound semiconductor layer which is a growth layer which is transparent to the light-emitting wavelength is an infrared light-emitting diode which is the highest output at present (for example, Patent Document 4). On the other hand, in the case of infrared communication used for transmitting or receiving messages between machines, for example, using infrared rays of 850 to 990 nm, in the case of infrared remote control operation, the wavelength band of the light receiving portion is highly sensitive. For example, infrared light of 880 to 94 nm is used. As an infrared light-emitting diode that can be used in both the infrared communication and the infrared remote control operation communication of the 201214753 terminal that can be used for both the infrared communication and the infrared remote control operation communication, it is known to use the illuminating peak wavelength. It is an AlGaAs active layer containing Ge in a substantial impurity of 880 to 890 'nm (Patent Document 4). Further, as an infrared light-emitting diode which can have an emission peak wavelength of 900 nm or more, an In G a As active layer is conventionally used (Patent Documents 5 to 7). [PRIOR ART DOCUMENT] Patent Document 1: Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. 2001-274454. Patent Document 3: Japanese Patent Laid-Open No. Hei 7- 3 8 1 4 8 Japanese Unexamined Patent Publication No. Publication No. JP-A-2002-344013, No. JP-A-2002-344013, No. JP-A-2002-344013 SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] However, within the scope of the patent applicant, infrared light-emitting diodes of 8 5 〇 nm or more, especially 900 nm or more, are not provided for the output. A so-called bonding type in which a crystal wafer is attached to a functional substrate (joined) and a GaAs substrate for growth is removed. Further, in the case where an AlGaAs active layer containing Ge in an actual impurity is used, it is difficult to set the emission peak wavelength to 90 nm or more (Fig. 3 of Fig. 4). In addition, in the case of an infrared light-emitting diode using an InGaAs active layer having an emission peak wavelength of 900 nm or more, development of a higher luminous efficiency is desired from the viewpoint of further improving performance, energy saving, and cost. The present invention has been made in view of the above circumstances, and an object thereof is to provide an infrared light-emitting diode of high-output/high-efficiency emission of infrared light having an emission peak wavelength of 850 nm or more, particularly 900 nm or more, and using the same. Light-emitting diode lamp and lighting device. [Means for Solving the Problem] The present inventors have solved the above-mentioned technical problems as a result of continuous drilling, by making a multiple quantum well structure in which a well layer made of InGaAs is formed and a barrier layer composed of AlGalnP is formed. The layer is such that the light guiding layer composed of AlGalnP is interposed between the active layer, and the cladding layer is made into a 4-ary mixed crystal AlGalnP., and the compound semiconductor including the active layer, the light guiding layer and the cladding layer is also formed. After the layer epitaxial growth is performed on the growth substrate, the compound semiconductor layer is attached to the transparent substrate (joined) again, and the structure in which the growth substrate is removed is removed, and the light emission of 850 urn or more, particularly 900 nrn or more is emitted with high output/high efficiency. The infrared light emitting diode of the peak wavelength of infrared light is completed. First, the present inventors have used a well layer made of InGaAs to form a light-emitting peak wavelength of 850 nm or more, particularly 900 nm. or more, which is used for infrared communication or the like, to improve monochromaticity and output. The active layer of the multiple quantum well structure. In addition, a 4-component mixed crystal AlGalnP is used, which is attached to the barrier layer of the well layer sandwiching the ternary mixed crystal, and the well layer, and the light guiding layer of the 2012-14753 weight sub well structure. In the coating layer, the band gap is large and transparent to the emission wavelength, and the crystallinity is good because it does not contain As which is liable to cause defects. As compared with the GsAs used as a growth substrate, the multiple quantum well structure with the In Ga As layer as the well layer has a large lattice constant and a skewed quantum well structure. In such a skewed quantum well structure, the influence on the composition and thickness of the composition and thickness of InG a As is also large, and the selection of the composition, thickness and number of pairs is important. Therefore, it has been found that by adding the skew opposite to the InGaAs well layer to the AlGalnP of the barrier layer, the quantum well structure is used as a whole to alleviate the lattice irregularity caused by the logarithmic increase of InGaAs, and the light-emitting output characteristics in the high current region are improved. . Further, as described above, in the infrared light-emitting diode using the InGaAs-based active layer, the compound semiconductor layer containing the active layer is not attached to the transparent substrate (bonding) type, but is used in the original state. A GaAs substrate in which a compound semiconductor layer is grown. However, the GaAs substrate is inconvenient in order to improve the conductivity, and absorption of light by a carrier cannot be avoided. Therefore, it is possible to avoid the absorption of light by the carrier and attach it to a transparent substrate (joining) type capable of expecting high output/high efficiency. In particular, in the case of the junction type, the influence of the stress from the functional substrate is also important in that the element structure design of the skewed quantum well is optimized. The present inventors have further studied the results based on such findings. Thus, the present invention shown in the following structures was completed. The present invention provides the following structure: (1) A light-emitting diode characterized by comprising: a light-emitting portion having: 201214753 an alternate layer consisting of a composition layer (InxlGai-xl) As (OSXlSl) An active layer of a quantum well structure composed of a barrier layer composed of a composition formula (AlX2Gai-x2) YilnmPC 0SX2S1, 〇&lt;Y1S1), and a composition formula (AlX3Ga丨-X3) Y2In丨-Y2P (0SX3S1) sandwiching the active layer And the first light guiding layer and the second light guiding layer formed by 〇 &lt; Y2S1 ), and the first cladding sandwiching the active layer by interposing the first light guiding layer and the second light guiding layer therebetween a layer and a second cladding layer; a current diffusion layer formed on the light-emitting portion; and a functional substrate bonded to the current diffusion layer; and the first and second cladding layers are composed of a composition ( Alx4Gai-x4) Y3 Ini-Y3P (〇5X4Sl, 〇&lt;Υ3&lt;1). (2) The light-emitting diode disclosed in the item (1), wherein the Ι composition (XI) of the well layer is 02X150.3. (3) In the light-emitting diode disclosed in the item (2), the composition (XI) of the well layer is 0.1 幺 XI 幺 0.3. (4) The light-emitting diode according to any one of (1) to (3), wherein the composition of the barrier layer Χ2 and Υ1 are respectively 〇^χ2^〇.2, 0.5&lt;Y1S0.7, The composition Χ3 and Υ2 of the first and second light guiding layers are 0·2 &lt; Χ 3 &lt; 0·5, 0.4 &lt; Υ 2 &lt; 0·6, respectively, and the composition of the first and second cladding layers Χ 4 and Y 3 respectively It is 0.3SX4S0.7, 〇.4&lt;Y3S〇.6. (5) The light-emitting diode according to any one of (1) to (4), wherein the functional substrate is transparent to an emission wavelength. (A) The light-emitting diode disclosed in any one of (1) to (5), wherein the functional substrate is composed of GaP or SiC. The light-emitting diode disclosed in any one of the items (1) to (6), wherein the side surface of the functional substrate is on a side close to the light-emitting portion, and is approximately vertical for a main light extraction surface. The vertical plane; on the side away from the light-emitting portion, has an inclined surface inclined to the inner side for the main light extraction surface. (8) The light-emitting diode disclosed in the item (7), wherein the inclined surface contains a rough surface. (9) A light-emitting diode characterized by comprising: a light-emitting portion having a well layer and a composition formula (AlnGai-xz) YilnmPCOSXSS1, 00&lt;1&gt; The active layer of the quantum well structure of the barrier layer formed by YK1), and the first light guiding layer and the second guide composed of the composition formula (Alx3Ga 丨-X3) Y2IIM-Y2PC0SX3S1, 0 &lt; Y2S1) sandwiching the active layer a light layer, and a first cladding layer and a second cladding layer sandwiching the active layer between the first light guiding layer and the second light guiding layer; and a current diffusion layer formed on the light emitting layer And a functional substrate disposed opposite to the light-emitting portion and including a reflective layer having a reflectance of 90% or more for an emission wavelength, and bonded to the current diffusion layer; and the first and second packages The coating is composed of a composition formula (Alx4Gai-X4) Y3 IrM-nP (0 幺X4S1, 0 &lt; Y3 幺1). Here, the "joining" further includes bonding a layer between the current diffusion layer and the functional substrate. (10) The light-emitting diode disclosed in the item (9), wherein the In composition (XI) of the well layer is 0SXK0.3. (11) In the light-emitting diode disclosed in the item (1), wherein the composition of the well layer of In 201214753 (x 1 ) is 〇. 1 SXl SO. 3. (12) The light-emitting diode according to any one of (9) to (11), wherein the composition of the barrier layer X2 and Y1 are 0SX2S0.2, 〇.5&lt;Y1S0.7', respectively. The composition X3 and Y2 of the second light guiding layer are respectively 0.2 &lt; X3 &lt; 0.5 ^ 0.4 &lt; Y2 &lt; 0.6 &gt; Μ % 1 and the composition of the second cladding layer Χ 4 and Υ 3 are 0.3 SX 4 S 0.7, 0.4, respectively. &lt;Y3S0.6. (13) The light-emitting diode according to any one of (9) to (12), wherein the functional substrate contains a layer composed of ruthenium or osmium. (14) The light-emitting diode according to any one of (9) to (12) wherein the functional substrate comprises a metal substrate. (15) The light-emitting diode disclosed in the item (14), wherein the metal substrate is composed of a plurality of metal layers. (16) The light-emitting diode disclosed in any one of (1) to (IS), wherein the current diffusion layer is composed of GaP or GalnP. (17) The light-emitting diode according to any one of (1) to (16), wherein the current diffusion layer has a thickness of 0.5 to 20 μm. (18) The light-emitting diode according to any one of (1) to (17), wherein the first electrode and the second electrode are disposed on the main light extraction surface side of the light-emitting diode (19) The light-emitting diode disclosed in the item (18), wherein the first electrode and the second electrode are ohmic electrodes. (20) The light-emitting diode disclosed in any one of (18) or (19), which is on the opposite side of the main light extraction surface side of the functional substrate -10- 5 201214753 It has a third electrode. (21) A light-emitting diode lamp characterized by comprising the light-emitting diode disclosed in any one of the items (1) to (20). (22) A light-emitting diode lamp characterized by comprising a light-emitting body which is not exposed in the item (20), wherein the first electrode or the second electrode and the third electrode are connected to approximately the same potential . (23) A lighting device comprising a plurality of light-emitting diodes disclosed in any one of (1) to (20), and/or at least one of (21) or (22) A light-emitting diode lamp revealed. In the present invention, the term "functional substrate" refers to a substrate in which a compound semiconductor layer is grown on a growth substrate, the growth substrate is removed, and the current diffusion layer is interposed and bonded to the compound semiconductor layer to support the compound semiconductor layer. However, in the case where a predetermined layer is formed in the current diffusion layer and a predetermined substrate is bonded to a predetermined layer, a predetermined layer is referred to as a "functional substrate". [Effects of the Invention] According to the above configuration, the following effects are obtained. It is possible to emit infrared light having an emission peak wavelength of 85 rpm or more, particularly 900 nm or more, with high output/high efficiency. Because the active layer has an alternating layer of a well layer composed of a composition formula (InxlGai-X1 ) As( 0SXK1) and a composition formula (Alx2Ga _x2) γιΙηι-γιΡ (0&lt;X2&lt;1 ' 0&lt;Yld) The structure of the multiple quantum well structure of the barrier layer has superior monochromaticity. 201214753 By designing the functional substrate to be transparent to the light-emitting wavelength, it is possible to display high output/high efficiency without absorbing light emitted from the light-emitting portion. Since the barrier layer, the light guiding layer, and the cladding layer are composed of a composition formula (AlxGai-χ) YIni -YP ( 0&lt; Χ 1 &lt; 1 ' 0 &lt; Y &lt; 1 ), the As is not easily formed. It contributes to high crystallinity and high output. Since the barrier layer, the light guiding layer, and the cladding layer are composed of a composition formula (AlxGai-x) γ In丨-YP (0SX1S1, 0 &lt; YS1 ), the barrier layer, the light guiding layer, and the cladding layer For comparison of an infrared light-emitting diode composed of a ternary mixed crystal, the A 1 concentration is lower and the heat resistance is further improved. The active layer is composed of a well layer composed of a composition formula (InxiGai-χ!) As (0SX1S1) and a composition formula (Alx2Gai-x2) υιΙπι-υ1Ρ (0^Χ2^1, 00&1; Y1S1). The structure of the laminated structure of the barrier layer is suitable for mass production by the MOCVD method. In the case of using a Ga As substrate which is a growth substrate of a compound semiconductor layer, the composition of the barrier layer composed of the composition formula (AlxzGai-xz) YIIni-Y1P (0SX2S1, 0 &lt; Y1S1) is taken as Χ2 and Υ1, respectively. The structure of 0^乂2&lt;0.2, 0.5&lt;丫1€0.7, and the skew of the well layer of the 〇3-8 substrate is alleviated, and the decrease in crystallinity can be suppressed. By forming the functional substrate into a structure composed of GaP, SiC, tantalum or niobium, the stress can be reduced by the fact that the thermal expansion coefficient of the light-emitting portion is close. In addition, since it is a material that is hard to corrode, moisture resistance will increase. By adopting a structure in which any of the functional substrate and the current diffusion layer is made of GaP, the bonding can be facilitated and the bonding strength can be increased. 201214753 By forming the current diffusion layer into a structure composed of GalnP, it is possible to integrate the crystal lattice with the InG a As well layer to improve crystallinity. The light-emitting diode lamp of the present invention can have an emission peak wavelength of 850 nm or more, particularly 900 nm or more, and has high monochromaticity, high output/high efficiency, and excellent moisture resistance. A polar body, a light source suitable for a wide range of applications such as sensor use. [Embodiment] Hereinafter, a light-emitting diode according to an embodiment of the present invention and a light-emitting diode lamp using the same will be described in detail with reference to the drawings. Incidentally, the drawings used in the following description are for easily understanding the features and facilitating the portions having the features to be enlarged, and the dimensional ratios and the like of the respective constituent elements are not limited to the same as the actual ones. &lt;Light Emitting Diode Lamp&gt; Figs. 1 and 2 are views for explaining a pattern of a light-emitting diode lamp using a light-emitting diode according to an embodiment of the present invention: Fig. 1 is a plan view; The figure is a cross-sectional view taken along line A-A' shown in Fig. 1. As shown in Fig. 1 and Fig. 2, in the light-emitting diode lamp 41 of the light-emitting diode 1 of the present embodiment, one or more light-emitting diodes 1 are mounted on the surface of the mounting substrate 42. More specifically, the n electrode terminal 43 and the p electrode terminal 44 are provided on the surface of the mounting substrate 42. Further, the n-type ohmic electrode 4 of the first electrode of the light-emitting diode 1 and the n-electrode terminal 43 of the mounting substrate 42 are connected (wire-bonded) using the gold wire 45. On the other hand, the p-type ohmic electrode 5 of the second electrode of the light-emitting diodes 201214753 and the p-electrode terminal 44 of the mounting substrate 42 are connected by using the gold wire 46, and as shown in Fig. 2, The third electrode 6' is provided on the surface opposite to the surface on which the n-type and the erbium-type ohmic electrodes 4, 5 of the polar body 1 are disposed, whereby the light-emitting diode 1 is connected to the n-electrode terminal 43 by the third electrode 6 It is fixed to the mounting substrate 42. Here, the n-type ohmic electrode 4 and the third electrode 6 are electrically connected so as to be equipotential or approximately equipotential by the n-electrode terminal 43. With the third electrode, the overcurrent does not flow into the active layer for the excessive reverse voltage, and the current flows between the third electrode and the p-type electrode, thereby preventing damage of the active layer. High output can also be performed on the interface between the third electrode and the substrate. In addition, by adding a eutectic metal, solder, or the like to the surface side of the third electrode, a simpler assembly technique such as eutectic solid crystal can be utilized. Further, the surface of the light-emitting diode 1 on which the mounting substrate 42 is mounted is sealed by a general sealing resin 47 such as silicone resin or epoxy resin. &lt;Light Emitting Diode (Embodiment 1)&gt; Figs. 3 and 4 are views for explaining a pattern of a light-emitting diode according to the first embodiment of the present invention: Fig. 3 is a plan view; 4 is a cross-sectional view taken along the line Β-Β' shown in Fig. 3. In addition, Fig. 5 is a cross-sectional view showing a laminated structure of a well layer and a barrier layer. The light-emitting diode of the first embodiment is characterized in that it includes a light-emitting portion 7 having an alternate layer of a well layer 17 composed of a composition formula (InxlGai-xl) As (OSX1S1) and a composition formula (Alx2Gai). -x2) YiIni-γιΡ (0SX2S1, 0 &lt; YK1) The quantum well structure of the barrier layer 18 is constructed as -14 - 5 201214753 Active layer U, sandwiching the active layer 11 by the composition formula (AlX3Gai-X3) nin,- Y2P (0SX3S1, 0 &lt; Y2S1), the first light guiding layer 10 and the second light guiding layer 12, and the first light guiding layer 10 and the second light guiding layer 12 interposed therebetween to sandwich the active layer 11 The first cladding layer 9 and the second cladding layer 13; the current diffusion layer 8 is formed on the light-emitting portion 7, and the functional substrate 3 is bonded to the current diffusion layer 8; and the first cladding layer 9 and the second cladding layer 13 are composed of a composition formula (AlX4Gab X4) Y3 lni-Y3P (0SX4S1, 0 &lt; Y3 幺1). In addition, the light-emitting diode 1 has a configuration in which an n-type ohmic electrode (first electrode) 4 and a p-type ohmic electrode (second electrode) 5 provided on the main light extraction surface are provided. In addition, the main light extraction surface in the present embodiment is attached to the compound half-conductor layer 2, and the surface opposite to the surface of the functional substrate 3 is attached. As shown in Fig. 4, the compound semiconductor layer (also referred to as an epitaxial growth layer) 2 has a structure in which the light-emitting portion 7 and the current diffusion layer 8 are sequentially laminated. In the structure of the compound semiconductor layer 2, a conventional functional layer can be added as appropriate. For example, a contact layer for reducing the contact resistance of an ohmic electrode and a current diffusion layer for planarly diffusing the element drive current to the general light-emitting portion can be provided; instead, the element drive current is limited. A conventional layer structure such as a current blocking layer or a current constriction layer in a region. Further, the compound semiconductor layer 2 is preferably formed by epitaxial growth and formed on a GaAs substrate. As shown in Fig. 4, the light-emitting portion 7 is formed on the current diffusion layer 8 at least in accordance with the 201214753 P-type lower cladding layer (first cladding layer) 9, the lower light guiding layer 10, the active layer 11, and the upper portion. The optical layer 12 and the n-type upper cladding layer (second cladding layer) 13 are formed. That is, the light-emitting portion 7 is a carrier that causes radiation recombination and is used to "cut" the light into the active layer 11. Preferably, the light-emitting portion 7 is provided under the active layer 11 for obtaining high-intensity light. The lower cladding layer 9, the lower light guiding layer 10, the upper light guiding layer 12, and the upper cladding layer 13 disposed on the side and the upper side are so-called double heterogeneous (English abbreviated as DH). As shown in Fig. 5, the active layer 11 is used to control the emission wavelength of the light-emitting diode (LED) to constitute a quantum well structure. That is, the active layer 11 is a multilayer structure (laminate structure) having the well layer 17 and the barrier layer 18 having the barrier layer 18 at both ends. The layer thickness of the active layer 11 is preferably in the range of 50 to 1000 nm. Further, the conductivity type of the active layer 1 1 is not particularly limited, and any of undoped, P-type, and η-type can also be selected. In order to improve the luminous efficiency, it is desirable to form an undoped or a carrier concentration of less than 3 X 1 17 17 cm -3 which is excellent in crystallinity. Fig. 6 shows that the In composition (XI) of the well layer 17 is fixed at 0.1, and the layer is shown to be related to the wavelength of the luminescence peak. The data shown in Figure 6 is shown in Table 1. If the well layer is thickened to 3 nm, 5 nm, and 7 nm, the wavelength is monotonically variable to 820 nm, 870 nm, and 920 nm. Table 1

In組成0.1 井層厚（nm ) 波長（nm ) 3 220 5 870 7 920 -16- ⑤ 201214753 第7圖係顯示井層1 7之發光波峰波長與其In組成 (XI)及層厚之相關。第7圖係顯示將井層17之發光波峰 波長作成既定波長的井層17之In組成（XI)與層厚的組 成者。具體而言，顯示發光波峰波長分別成爲920 nm、960 nm之構造的井層17之In組成（XI )與層厚的組成。於第 7圖中進一步顯示其他發光波峰波長820 nm、870 nm、985 nm及99 5 nm時之In組成（XI )與層厚的組成。在表2中 顯示於第7圖所示之數據値。 表2 8 2 0 n m 8 7 0 nm 9 2 0 nm 9 6 0 n m 98 5 nm 99 5 nm In組成 層厚 (nm ) 層厚 (nm ) 層厚 (nm ) 層厚 (nm ) 層厚 (nm ) 層厚 (nm ) 0.05 8 0.1 3 5 7 8 0.2 5 6 0.25 4 5 0.3 3 5 0.35 5 發光波峰波長920 urn之情形，若In組成（·Χ1 )從0.3 降至0.05時，由於對應於此之層厚係單調地從3 nm變厚 成8 nm，若爲同業者的話，能夠容易地發現成爲由發光波 峰波長920 nm之組合。 另外，In組成（XI)爲0.1之時，若層厚變厚成3 nm、 5 nm、7 nm、8 nm時，對應於此，發光波峰波長變長爲820 nm、8 7 0 nm、9 2 0 nm ' 9 6 0 nm。另外，In 組成（XI)爲 0.2之時，若層厚變厚成5 nm、6 nm時，對應於此，發光 波峰波長變長爲920 nm、960 nm ; In組成（XI )爲0.25 之時，若層厚變厚成4 nm、5 nm時，對應於此，發光波峰 201214753 波長變長爲920nm、960 nm;再者，In組成（XI)爲〇·3 之時，若層厚變厚成3 nm、5 nm時，對應於此，發光波峰 波長變長爲920 nm、985 nm。 再者另外，層厚爲5 nm之時，若In組成（XI)增加 至0.1、0.2、0.25、0.3時，發光波峰波長變長爲870 nm、 920 nm、960 nm、985 nm;若 In 組成（XI)增加至 0.35 時，發光波峰波長變長爲995 nm。 於第7圖中，連結將發光波峰波長作成920 nm及960 nm之In組成（XI)與層厚之組合時，則顯示成爲約略直 線。另外，推測作爲連結850 nm以上直到1 000 nm左右之 波長帶的作爲既定發光波峰波長之In.組成（XI )與層厚之 組合的線也成爲約略直線狀。再者，推測連結其組合之線 係發光波峰波長越短越位於左下，越長則越位於右上。 若基於以上之規則性，能夠容易地發現具有8 5 0 nm以 上且1000 nm以下之所欲發光波峰波長的In組成（XI)與 層厚。 第8圖係顯示將井層17之層厚固定於5 nm之In組成 (XI)與發光波峰波長及其發光輸出之相關。在表3中顯 示於第8圖所示之數據値。 若 In 組成（XI)增加爲 0.12、0.2、0.25、0.3' 0.35 時，發光波峰波長變長爲870 nm、 920 nm、960 nm、985 nm、99 5 nm。更詳言之，隨著In組成（XI )從0.12增加 至0.3，發光波峰波長約略單調地從870 nm增長至985 ⑤ 201214753 nm。但是，即使將In組成（XI )從0.3增加至0.35，雖然 從9 8 5 n m變長爲9 9 5 nm，但向長波長之變化率則變小。 另外，發光波峰波長係870 nm(Xl=0.12) 、920 nm (Χ1=0·2) 、960 nm(Xl=0.25)之情形，發光輸出係高達 6.5 mW之値；即使9 8 5 nm ( XI =0.3 )之情形，實用上係具 有充分高達5 mW之値；但是995 nm(Xl=0.35)之情形， 則低至2 mW之値。 表3 井層厚5 nm In組成 波長（nm ) 輸出（mW ) 0.12 8 70 6.8 0.2 920 7 0.2 5 960 6.5 0.3 9 8 5 5 0.35 995 2 基於第6圖至第8圖，井層17較佳爲具有（InxiGai-xl) As (O^X BO .3)之組成。上述XI能夠成爲所欲之發光波長 的方式來調整。 將發光波峰波長作成900 nm以上之情形，較佳爲 0SX1S0.3 ;低於900 nm之情形，較佳爲0SXK0.1。 井層17之層厚適宜爲3至20 nm之範圍。更佳爲3至 10 nm之範圍。 障壁層 18 係具有（Alx2Gai - χ2)γιΙηι - γιΡ( 0SX2S1、 〇 &lt; γ 1 ^ 1 )之組成。上述Χ2較佳爲作成能帶間隙較井層i 7 爲大之組成’更佳爲〇至0.2之範圍。另外，γι係用以緩 和起因於井層17之晶格不整合的歪斜，較佳爲〇.5至0.7, 更佳爲0.52至0.60之範圍。 -19- 201214753 障壁層18之層厚較佳爲與井層17之層厚相等或較 厚，藉此而能夠提高井層17之發光效率》 於第9圖中，於將井層17之層厚作成5 nm、In組成 (XI) =0.2且障壁層之組成X2 = 0、Yl=〇.55之時（亦即， (Alo^Gao.9) G.55InQ.45P)，顯示井層及障壁層之成對數與 發光輸出之相關。在表4中顯示於第9圖所示之數據値。 將GaAs基板作爲成長基板使用之情形。 尙且’爲了顯示障壁層之效果，比較例係合倂顯示將 Alo.3Gao.7As用於障壁層之時》 將AlQ.3GaQ.7As用於障壁層的比較例之情形，成對數i 至10對爲止，發光輸出係具有高達6.5 mW以上之値，但 相對於2 0對之情形則降低至5 mW ;本發明之情形係直到 成對數20對爲止而維持約略6.5 mW以上之高値。如此方 式，即使增多成對數也能夠維持高的發光輸出，此係起因 於組成 Χ2 = 0·1、Υ1=0·55(亦即，（Al〇.|Ga〇.9) 〇.55In〇.45P) 之障壁層緩和由組成式（InjuGa, - χ, ) As ( 0SX1S1 )所構 成的井層對GaAs成長基板之歪斜（亦即，障壁層給予與井 層逆向之格子歪斜）而抑制結晶性之降低。針對緩和歪斜 之效果，進一步使用第10圖而加以說明。 表4 井層厚5 nm In組成0.2 成對數 輸出（mW )： (Al〇.iGa〇.9) ci.55Ino.45P 障壁 輸出（mW ):比較例 (Al〇.3Ga〇.7AS 障壁） 1 6.8 6.8 3 7 7 5 6.98 6.9 10 6.88 6.5 20 6.48 5 -20- ⑤ 201214753 第10圖係設定井層17之層厚爲5 nm、In組成（XI) = 0.2(發光波長920 nm)且障壁層之A1組成Χ2 = 0·1爲5 對之時，障壁層的 Υ1 (亦即，（AlnGau ) y】:ni - yP )與 發光輸出之相關。在表5中顯示於第10圖所示之數據値。 將GaAs基板作爲成長基板使用之情形。 爲了顯示障壁層之效果，作爲比較例之障壁層係與本 發明相同，合倂顯示將與成長基板相同材料之Ga As層（亦 即，相對於成長基板無歪斜之情形）用於井層之時。 本發明之情形係發光輸出之最大爲7 mW，障壁層之 Y1在0.52至0.60之範圍顯示約略7mW。針對於此，得知 將GaAs層用於井層的比較例之情形係發光輸出之最大爲 6.5 mW，顯示高輸出之範圍也較本發明之情形爲狹窄。 此結果係於本發明中，由於障壁層之逆向歪斜將緩和 井層之歪斜而抑制結晶性降低，相對於發光輸出高且顯示 高輸出之障壁層的組成範圍也廣，於比較例中，由於成爲 無歪斜之井層與具有歪斜之障壁層的組合，其結果，能夠 理解結晶性將降低而使發光輸出特性降低。 表5 (Ga+ A1 )組成 y 本發明 比較例 輸出（mW) 輸出（mW ) 0.3 0 0.1 0.3 5 2.2 3.2 0.4 4.3 5.5 0.45 5.6 6.3 0.5 6.5 6.5 0.55 6.9 6.5 0.6 7 5.8 0.65 6.8 1 0.7 5.9 0.2 0.75 0.7 0 0.8 0.1 0.85 0 -21- 201214753 於第1 1圖中，相對於順向電流與發光輸出之相關，顯 示井層及障壁層的成對數之依存性。數據係設定井層17之 層厚爲5nm、In組成（Χ1)=0·2且障壁層之組成Χ2 = 0.1' Yl=0.55(亦即，（Al〇.iGa〇.9) o.55ln〇.45P)，顯示成對數 爲3對及5對之情形，在表6中顯示於第11圖所示之數據 値。 順向電流直到3 0 m Α爲止，3對及5對中任一種皆與 電流之增加成約略比例，且發光輸出增大。然而，於50 mA、100 mA之情形’就5對而言維持約略比例，且對於 電流之增加，則發光輸出增大；但是就3對而言，其5 0 m A、 1 00 mA各自與5對之情形作一比較，則發光輸出則分別降 低 2 mW、9 mW。 因而，對於大電流/高輸出之發光二極體而言，得知5 對者較3對者爲適合。成對數越多者，係適合於大電流/高 輸出者，係起因於組成Χ2 = 0·1、Υ1=0·55(亦即，（AU.iGao.s» ) o.55lnQ.45P)之障壁層對成長基板之由組成式（InxiGai-Xl) As ( O^X K 1 )所構成的井層歪斜爲緩和而抑制結晶性之降 低。 表6 成對數 3對 5對 電流（m A ) 輸出（mW ) 輸出（mW) &quot; 0.1 0 0 _ 5 1 . 8 1.8 ' 10 3.6 3.6 ' 20 7 7 30 10 11 — 50 15 17 100 23 3 2 -22- ⑤ 201214753 於井層17與障壁層18之多層構造中，雖然交替積層 井層17與障壁層18的成對數並未予以特別限定，若根據 第9圖’較佳爲1對以上且20對以下。亦即，於活性層 11中較佳爲含有1至20層。於此，若根據第9圖，就作 爲活性層11之發光效率爲適合範圍而言，係井層17以一 層爲充分；但根據第10圖’尤其在高電流條件下之發光效 率提高之觀點’特佳爲複數層。另外，由於在井層17及障 壁層1 8之間存在晶格不整，若作成許多對時，則由於發生 結晶缺陷’發光效率將降低。因此，較佳爲2則0對以下， 更佳爲1 〇對以下。 如第4圖所示，下部導光層10與上部導光層12係分 別設置於活性層1 1之下面及上面。具體而言，在活性層 11之下面設置下部導光層10，在活性層11上面設置上部 導光層1 2。 下部導光層10及上部導光層12係具有（AlX3Gai-x3) YaliM-wPCOSXSSl、0&lt;Y2S1)之組成。上述 X3 較佳爲 作成障壁層1 8與能帶間隙相等或是變得較障壁層1 8爲大 的組成，更佳作成0.2至0.5之範圍。另外，Y2較佳作成 0.4 至 0.6 〇 X3係選自於作爲包覆層之機能且對發光波長爲透明 之範圍，Y2係選自於包覆層爲厚膜且重視與基板之晶格整 合而形成良質結晶成長之範圍。 下部導光層1 0及上部導光層1 2係分別設置用以減低 -23- 201214753 下部包覆層9及上部包覆層13與活性層11之間的不純物 之傳遞。亦即，於本發明中，在下部包覆層9及上部包覆 層1 3內高濃度地摻雜不純物，對此不純物之活性層1 1的 擴散係成爲發光二極體之性能降低的原因。爲了有效減低 此不純物之擴散，下部導光層10及上部導光層12之層厚 較佳爲10nm以上，更佳爲20nm至100nm。 下部導光層10及上部導光層12之傳導型並未予以特 別限定，能夠選擇未摻雜、p型及η型中任一種。爲了提 高發光效率，期望作成結晶性爲良好之未摻雜或低於 3χ1017 cm - 3之載子濃度， 如第4圖所示，下部包覆層9及上部包覆層1 3係分別 設置於下部導光層10之下面及上部導光層12之上面。 就下部包覆層9及上部包覆層13之材質而言，係使用 (AlX4Gai - χ4 ) Y3IIM-Y3P ( 0SX4S1、0&lt; Y3S1)之半導體 材料，較佳爲較緩衝層1 5之能帶間隙爲大的材質，更佳爲 較下部導光層10及上部導光層12之能帶間隙爲大的材 質。上述材質較佳爲具有（Αΐχπα,-^Μ) ^Ιη,-^Ρ (0&lt;Χ4&lt;1 &gt; Ο &lt; Υ3&lt;1 )之 Χ4 爲 0.3 至 0.7 之組成。又，Υ3 較佳爲0.4〜0.6。Χ4係選自於作爲包覆層之機能且對發光 波長爲透明之範圍，從包覆層爲厚膜且從與基板之晶格整 合之觀點，Υ 3係選自形成良質結晶成長之範圍。 下部包覆層9及上部包覆層13係使極性成爲不同的方 式來構成。另外，下部包覆層9及上部包覆層13之載子濃 -24- ⑤ 201214753 度及厚度能夠使用習知之合適範圍，較佳爲使活性層11之 發光效率提高的方式來將條件予以最適化。另外，藉由控 制下部包覆層9及上部包覆層13之組成，能夠使化合物半 導體層2之彎曲減低。 具體而言，期望下部包覆層9係使用例如由摻雜Mg 之 p 型的（AlxuGa! - X4a ) Yalni - YaP ( 0.3SX4aS0.7、 0.4:SY3aS0.6)所構成的半導體材料。另外，載子濃度較佳 爲2χ1017至2xlOl8cm-3之範圍，層厚較佳爲0.1至1 μιη 之範圍。 另一方面，期望上部包覆層13係使用例如由摻雜Si 之 η 型的（A1X4bGa 1 - X4b ) Yblni - YbP ( 0.3&lt;X4b&lt;0.7 ' 0.4SY3bS0.6)所構成的半導體材料。另外，載子濃度較佳 爲lxlO17至lxl018cm— 3之範圍，層厚較佳爲0.1至1 μιη 之範圍。 再者，下部包覆層9及上部包覆層1 3之極性，係能夠 考量化合物半導體層.2之元件構造而選擇。 另外，在發光部7之構造層的上方，能夠設置用以降 低歐姆（Ohmic)電極之接觸電阻的接觸層、用以使元件驅 動電流平面地擴散於發光部全般的電流擴散層、相反地用 以限制元件驅動電流所流通的區域之電流阻止層或電流狹 窄層等習知之層構造。 如第4圖所示，電流擴散層8係設置於發光部7之下 方。此電流擴散層8能夠採用對來自發光部7 (活性層1 1 ) 201214753 之發光波長爲透明之材料，例如GaP或GalnP。 將GaP應用於電流擴散層8之情形，藉由將機能性基 板3作爲GaP基板，具有容易進行接合且能夠獲得高的接 合強度之效果。 另外，將GalnP應用於電流擴散層8之情形，藉由改 變Ga與In之比例’設定晶格常數相同於積層電流擴散層 8的井層17之材料的InGaAs，具有能夠與井層17晶格整 合之效果。因而，較佳爲使晶格常數成爲相同於從所欲之 發光波長所選出的InGaAs之組成比的方式來選擇GalnP 之組成比。 另外，電流擴散層8之厚度較佳爲0.5至20 μιη之範 圍。右爲0.5 μπι以下時’則電流擴散爲不充分；若爲20 μπι 以上時’則因爲了使結晶成長直到其厚度爲止之成本將增 大。 機能性基板3係接合於化合物半導體層2之主要的光 取出面與相反側之面。亦即，如第4圖所示，機能性基板 3係接合於構成化合物半導體層2之電流擴散層8側。此 機能性基板3係對於機械性支撐發光部7具有充分之強 度，且由能帶間隙寬、對來自發光部7之發光波長爲光學 透明之材料所構成。 機能性基板3係與發光部之熱膨脹係數接近而具有優 異的耐濕性之基板，再者，較佳爲由導熱佳的GaP、GalnP、 S i C或機械強度強的藍寶石所構成。另外，機能性基板3 ⑤ 201214753 係爲了以機械性充分強度支撐發光部7，較佳爲作成例如 約50 μιη以上之厚度。另外，爲了於接合至化合物半導體 層2之後容易實施對機能性基板3之機械性加工，較佳爲 作成不超過約3 00 μιη之厚度。從厚度具有約50 μιη以上且 約3 00 μιη以下的透明度、應力、成本面之觀點，機能性基 板3最適爲由η型GaP基板所構成。 另外，如第4圖所示，機能性基板3之側面係在接近 化合物半導體層2之側且相對於主要的光取出面設定約略 垂直的垂直面3a;在遠離化合物半導體層2之側且相對於 主要的光取出面設定傾斜於內側之傾斜面3b。藉此，能夠 效率佳地將從活性層1 1向機能性基板3側所放射的光向外 部取出。另外，從活性層1 1向機能性基板3側所放射的光 之中，一部分係在垂直面3 a被反射且能夠在傾斜面3 b取 出。另一方面，在傾斜面3b所反射的光能夠在垂直面3a 取出。如此方式，藉由垂直面3a與傾斜面3b之相乘效果， 能夠提高光之取出效率。 另外，如第4圖所示，於本實施形態中，較佳爲將傾 斜面3b與平行於發光面之面所成之角度α作成55度至80 度之範圍內。藉由作成如此之範圍，能夠效率佳地將在機 能性基板3之底部所反射的光向外部取出。 另外，較佳爲將垂直面3a之寬度（厚度方向）作成 30 μιη至100 μιη之範圍內。藉由將垂直面3a之寬度作成 上述範圍內，能夠在垂直面3a而將在機能性基板3之底部 -27- 201214753 所反射的光效率佳地回到發光面，進一步能夠從主要的光 取出面使其放射。因此，能夠提高發光二極體1之發光效 率。 另外，機能性基板3之傾斜面3b較佳爲予以粗面化。 藉由粗面化傾斜面3b，可以獲得提高在此傾斜面3b之光 取出效率的效果。亦即，藉由粗面化傾斜面3b而能夠抑制 在傾斜面3b之全反射，提高光取出效率。 另外，機能性基板3能夠對於發光波長具有90%以上 之反射率，且具備對向於該發光部所配置的反射層（未以 圖示）。於此構造中，能夠從主要的光取出面而效率佳地 取出光。 反射層係藉由例如銀（Ag )、鋁（A1 )、金（Au )或 此等之合金等所構成。此等之材料係光反射率高且使從反 射層23之光反射率成爲90%以上。 機能性基板3能夠使用在此反射層上利用 Αιιΐη、 AuGe、AuSn等之共晶金屬而接合於與發光部熱膨脹係數接 近之矽、鍺等之廉價基板的組合。尤其，Auln係接合溫度 低、熱膨脹係數與發光部具有差異，接合最廉價之矽基板 (矽層）係最適的組合。 從品質安定性之觀點，也期望機能性基板3係使電流 擴散層、反射金屬及共晶金屬不相互擴散之例如Ti、W、 Pt等之高熔點金屬或是插入ITO等之透明導電氧化物。 化合物半導體層2與機能性基板3之接合界面係具有 -28- ⑤ 201214753 作爲高電阻層之情形。亦即，於化合物半導體層2與機能 性基板3之間’具有設置省略圖示的高電阻層之情形。此 高電阻層係顯示較機能性基板3爲高的電阻値，設置高電 阻層之情形下’具有減低從化合物半導體層2之電流擴散 層8側向機能性基板3側的逆向電流之機能。另外，對於 從機能性基板3側向電流擴散層8側，不經意地外加逆向 電壓而構成發揮耐電壓性之接合構造，其降服電壓較佳爲 較pn接合型發光部7之逆向電壓爲低値的方式來構成。 η型歐姆電極（第1電極）4及p型歐姆電極（第2電 極）5係在發光二極體1之主要的光取出面所設置的低電 阻膜之歐姆電極。於此，η型歐姆電極4係設置於上部導 光層11之上方，例如，能夠使用由AuGe、Ni合金/Au所 構成的合金。另一方面，如第4圖所示，p型歐姆電極5 係能夠在使其露出的電流擴散層8之表面使用AuB e/Au、 或AuZn/Au所構成的合金。 於此，於本實施形態之發光二極體1中，較佳爲將作 爲第2電極之p型歐姆電極5形成於電流擴散層8上。藉 由作成如此之構造，可以獲得降低動作電壓之效粜。另外， 藉由在由p型GaP所構成的電流擴散層8上形成p型歐姆 電極5，爲了可獲得良好之歐姆接觸，能夠降低動作電壓。 再者，於本實施形態中，較佳爲將第1電極之極性作 成η型且將第2電極之極性作成P型。藉由作成如此之構 造，能夠達成發光二極體1之高亮度化。另一方面’若將 -29- 201214753 第1電極作成P型時，則電流擴散將變差’而導致亮度之 降低。針對於此，藉由將第1電極作成η型，電流擴散將 變得良好，能夠達成發光二極體1之高亮度化。 如第3圖所示，於本實施形態之發光二極體1中，較 佳爲使η型歐姆電極4與ρ型歐姆電極5成爲對角位置的 方式來配置。另外，最好爲作成利用化合物半導體層2而 包圍ρ型歐姆電極5之周圍的構造。藉由作成如此之構造， 可以獲得降低動作電壓之效果。另外，藉由利用η型歐姆 電極4包圍ρ型歐姆電極5之四周而使電流變得容易流向 四周，其結果爲動作電壓將降低。 另外，於本實施形態之發光二極體1中，如第3圖所 示，較佳爲將η型歐姆電極4作成蜂窩、晶格狀等之網目。 藉由作成如此之構造，可以獲得使信賴性提高之效果。另 外，藉由作成晶格狀而能夠將電流均勻地注入活性層11 中1其結果爲可以獲得使信賴性提高之效果。 再者，於本實施形態之發光二極體1中，較佳爲利用 墊狀的電極（墊電極）與寬度10 μιη以下之線狀的電極（線 狀電極）而構成。藉由作成如此之構造，能夠謀求高亮度 化。再者，藉由窄化線狀電極之寬度而能夠提高光取出面 之開□面積，故能夠達成高亮度化。 第3電極係藉由形成於機能性基板之背面且在透明基 板上作成反射至基板側之構造而能夠進一步地高輸出化❶ 反射金屬材料能夠使用Au、Ag、Α1等之材料。 ⑤ 201214753 另外，藉由使電極表面側作成例如AuSn等之共晶金 屬、錫焊材料，於晶粒結合步驟，變得簡化而無使用漿體 之必要。進一步藉由利用金屬進行連接，而使導熱變佳且 提高發光二極體之放熱特性。 &lt;發光二極體之製造方法&gt; 接著，針對本實施形態之發光二極體1之製造方法而 加以說明。第1 2圖係用於本實施形態之發光二極體1之磊 晶晶圓的剖面圖。另外，第1 3圖係用於本實施形態之發光 二極體1之接合晶圓的剖面圖。 (化合物半導體之形成步驟） 首先，製作顯示於第12圖之化合物半導體層2»化合 物半導體層2係在GaAs基板14上，依序積層由GaAs所 構成的緩衝層1 5、用以利用於選擇性蝕刻所設置的蝕刻停 止層（省略圖示）、摻雜Si的η型之接觸層16、η型之上 部包覆層13、上部導光層12、活性層11、下部導光層10、 Ρ型之下部包覆層9、由摻雜Mg的ρ型GaP所構成的電流 擴散層8而製得。In composition 0.1 Well layer thickness (nm) Wavelength (nm) 3 220 5 870 7 920 -16- 5 201214753 Figure 7 shows the relationship between the luminescence peak wavelength of the well layer 17 and its In composition (XI) and layer thickness. Fig. 7 is a diagram showing the composition of the In composition (XI) and the layer thickness of the well layer 17 in which the illuminating peak wavelength of the well layer 17 is set to a predetermined wavelength. Specifically, the composition of the In composition (XI) and the layer thickness of the well layer 17 having the emission peak wavelengths of 920 nm and 960 nm, respectively, is shown. The composition of In composition (XI) and layer thickness at other wavelengths of 820 nm, 870 nm, 985 nm, and 99 5 nm is further shown in Fig. 7. The data shown in Fig. 7 is shown in Table 2. Table 2 8 2 0 nm 8 7 0 nm 9 2 0 nm 9 6 0 nm 98 5 nm 99 5 nm In composition layer thickness (nm) layer thickness (nm) layer thickness (nm) layer thickness (nm) layer thickness (nm Layer thickness (nm) 0.05 8 0.1 3 5 7 8 0.2 5 6 0.25 4 5 0.3 3 5 0.35 5 When the illuminating peak wavelength is 920 urn, if the In composition (·Χ1 ) is decreased from 0.3 to 0.05, it corresponds to this. The layer thickness is monotonously thickened from 3 nm to 8 nm, and if it is a peer, it can be easily found to be a combination of the illuminating peak wavelength of 920 nm. In addition, when the In composition (XI) is 0.1, when the layer thickness is increased to 3 nm, 5 nm, 7 nm, and 8 nm, the wavelength of the luminescence peak becomes 820 nm, 870 nm, and 9 2 0 nm ' 9 6 0 nm. In addition, when the composition of In (XI) is 0.2, when the layer thickness is increased to 5 nm or 6 nm, the wavelength of the luminescence peak becomes 920 nm and 960 nm, and when the composition of In (XI) is 0.25. When the thickness of the layer is increased to 4 nm or 5 nm, the wavelength of the illuminating peak 201214753 becomes 920 nm and 960 nm. In addition, when the composition of In (XI) is 〇·3, the thickness of the layer becomes thicker. When it is 3 nm and 5 nm, the wavelength of the luminescence peak becomes 920 nm and 985 nm. In addition, when the layer thickness is 5 nm, if the In composition (XI) is increased to 0.1, 0.2, 0.25, and 0.3, the wavelength of the luminescence peak becomes 870 nm, 920 nm, 960 nm, and 985 nm; When (XI) is increased to 0.35, the wavelength of the luminescence peak becomes 995 nm. In Fig. 7, when the combination of the In composition (XI) and the layer thickness of the 720 nm and 960 nm wavelengths is obtained, the display is approximately linear. Further, it is presumed that a line which is a combination of the In. composition (XI) and the layer thickness which is a predetermined emission peak wavelength in a wavelength band of about 850 nm or more and up to about 1 000 nm is also approximately linear. Further, it is presumed that the shorter the wavelength of the luminescence peak connected to the combination is located at the lower left, and the longer the longer, the higher the upper right. Based on the above regularity, the In composition (XI) and the layer thickness having a desired luminescence peak wavelength of 850 nm or more and 1000 nm or less can be easily found. Fig. 8 shows the correlation between the In composition (XI) in which the layer thickness of the well layer 17 is fixed at 5 nm and the luminescence peak wavelength and its luminescence output. The data shown in Fig. 8 is shown in Table 3. When the composition of In (XI) is increased to 0.12, 0.2, 0.25, and 0.3' 0.35, the wavelength of the luminescence peak becomes 870 nm, 920 nm, 960 nm, 985 nm, and 99 5 nm. More specifically, as the In composition (XI) increases from 0.12 to 0.3, the luminescence peak wavelength increases approximately monotonically from 870 nm to 985 5 201214753 nm. However, even if the In composition (XI) is increased from 0.3 to 0.35, the length is changed from 9 8 5 n m to 9 9 5 nm, but the rate of change to the long wavelength is small. In addition, when the illuminating peak wavelength is 870 nm (Xl=0.12), 920 nm (Χ1=0·2), and 960 nm (Xl=0.25), the illuminating output is up to 6.5 mW; even 9 8 5 nm (XI In the case of =0.3), it is practically up to 5 mW; but in the case of 995 nm (Xl = 0.35), it is as low as 2 mW. Table 3 Well layer thickness 5 nm In composition wavelength (nm) Output (mW) 0.12 8 70 6.8 0.2 920 7 0.2 5 960 6.5 0.3 9 8 5 5 0.35 995 2 Based on Figures 6 to 8, the well layer 17 is preferably It has the composition of (InxiGai-xl) As (O^X BO .3). The above XI can be adjusted in such a manner as to achieve the desired wavelength of light emission. The case where the luminescence peak wavelength is made to be 900 nm or more is preferably 0SX1S0.3; and when it is lower than 900 nm, it is preferably 0SXK0.1. The layer thickness of the well layer 17 is suitably in the range of 3 to 20 nm. More preferably in the range of 3 to 10 nm. The barrier layer 18 has a composition of (Alx2Gai - χ2) γιΙηι - γιΡ ( 0SX2S1 , 〇 &lt; γ 1 ^ 1 ). The above Χ2 is preferably in a range in which the band gap is made larger than the well layer i 7 and more preferably 〇 to 0.2. Further, γι is used to alleviate the skew due to lattice unconformity of the well layer 17, preferably from 〇5 to 0.7, more preferably from 0.52 to 0.60. -19- 201214753 The layer thickness of the barrier layer 18 is preferably equal to or thicker than the layer thickness of the well layer 17, whereby the luminous efficiency of the well layer 17 can be improved. In Fig. 9, the layer of the well layer 17 is Thick layered to 5 nm, In composition (XI) = 0.2 and the composition of the barrier layer X2 = 0, Yl = 〇.55 (ie, (Alo^Gao.9) G.55InQ.45P), showing the formation and The logarithm of the barrier layer is related to the luminous output. The data shown in Fig. 9 is shown in Table 4. A case where a GaAs substrate is used as a growth substrate. ' and 'In order to show the effect of the barrier layer, the comparative example shows the use of Alo.3Gao.7As for the barrier layer." The case of using the AlQ.3GaQ.7As for the barrier layer, in the logarithm of i to 10 Up to now, the illuminating output has a enthalpy of up to 6.5 mW or more, but is reduced to 5 mW with respect to the case of 20 pairs; the case of the present invention maintains a high enthalpy of about 6.5 mW or more until the pair of 20 pairs. In this way, even if the number of pairs is increased, the high light output can be maintained, which is caused by the composition Χ2 = 0·1, Υ1 = 0.55 (that is, (Al〇.|Ga〇.9) 〇.55In〇. The barrier layer of 45P) mitigates the skew of the GaAs growth substrate by the well layer composed of the composition formula (InjuGa, - χ, ) As (0SX1S1) (that is, the barrier layer is given a lattice skew opposite to the well layer) to suppress the crystallinity. Reduced. The effect of mitigating skew is further explained using Fig. 10. Table 4 Well layer thickness 5 nm In composition 0.2 logarithmic output (mW): (Al〇.iGa〇.9) ci.55Ino.45P Barrier output (mW): Comparative example (Al〇.3Ga〇.7AS barrier) 1 6.8 6.8 3 7 7 5 6.98 6.9 10 6.88 6.5 20 6.48 5 -20- 5 201214753 Figure 10 sets the layer thickness of well layer 17 to 5 nm, In composition (XI) = 0.2 (light emission wavelength 920 nm) and barrier layer When A1 is composed of Χ2 = 0·1 is 5 pairs, Υ1 of the barrier layer (that is, (AlnGau) y]: ni - yP ) is related to the illuminating output. The data shown in Fig. 10 is shown in Table 5. A case where a GaAs substrate is used as a growth substrate. In order to show the effect of the barrier layer, the barrier layer system as a comparative example is the same as the present invention, and the combination shows that the Ga As layer of the same material as the growth substrate (that is, the case where there is no skew with respect to the growth substrate) is used for the well layer. Time. In the case of the present invention, the maximum luminous output is 7 mW, and the Y1 of the barrier layer shows approximately 7 mW in the range of 0.52 to 0.60. In view of this, it is known that the case where the GaAs layer is used for the well layer is a maximum of 6.5 mW of the light-emitting output, and the range indicating the high output is also narrower than the case of the present invention. This result is in the present invention, since the reverse skew of the barrier layer will moderate the skew of the well layer and suppress the decrease in crystallinity, and the composition range of the barrier layer which is high in light emission output and exhibits high output is also wide, in the comparative example, When the combination of the well-free layer and the barrier layer having the skew is obtained, it is understood that the crystallinity is lowered and the light-emitting output characteristics are lowered. Table 5 (Ga + A1 ) Composition y Comparative Example Output (mW) Output (mW) 0.3 0 0.1 0.3 5 2.2 3.2 0.4 4.3 5.5 0.45 5.6 6.3 0.5 6.5 6.5 0.55 6.9 6.5 0.6 7 5.8 0.65 6.8 1 0.7 5.9 0.2 0.75 0.7 0 0.8 0.1 0.85 0 -21- 201214753 In Figure 11, the dependence of the forward current on the luminescence output is shown in terms of the number of pairs of well layers and barrier layers. The data system sets the layer thickness of the well layer 17 to 5 nm, the In composition (Χ1)=0·2, and the composition of the barrier layer Χ2 = 0.1' Yl=0.55 (ie, (Al〇.iGa〇.9) o.55ln〇 .45P), showing the case where the logarithm is 3 pairs and 5 pairs, and the data shown in Fig. 11 is shown in Table 6. The forward current is up to 30 m ,, and any of the 3 pairs and 5 pairs is approximately proportional to the increase in current, and the illuminating output is increased. However, in the case of 50 mA, 100 mA, the approximate ratio is maintained for 5 pairs, and for the increase of current, the illuminating output is increased; but for 3 pairs, the 50 mA and 100 mA are respectively A comparison of the five cases, the luminous output is reduced by 2 mW, 9 mW. Therefore, for a large current/high output light-emitting diode, it is known that five pairs are suitable for three pairs. The greater the number of pairs, the higher the current/high output, due to the composition Χ2 = 0·1, Υ1 = 0.55 (ie, (AU.iGao.s») o.55lnQ.45P) The well layer skew of the growth layer of the growth substrate by the composition formula (InxiGai-Xl) As (O^XK 1 ) is moderated to suppress the decrease in crystallinity. Table 6 Pairwise 3 pairs of 5 pairs of current (m A ) Output (mW ) Output (mW) &quot; 0.1 0 0 _ 5 1 . 8 1.8 ' 10 3.6 3.6 ' 20 7 7 30 10 11 — 50 15 17 100 23 3 2 -22- 5 201214753 In the multilayer structure of the well layer 17 and the barrier layer 18, although the number of pairs of the alternate build-up well layer 17 and the barrier layer 18 is not particularly limited, it is preferably one or more pairs according to FIG. And 20 pairs or less. That is, it is preferable to contain 1 to 20 layers in the active layer 11. Here, according to Fig. 9, the well layer 17 is sufficient as the light-emitting efficiency of the active layer 11 as a suitable range; however, according to Fig. 10, the luminous efficiency is improved particularly under high current conditions. 'Special good for multiple layers. Further, since there is a lattice irregularity between the well layer 17 and the barrier layer 18, if a large number of pairs are formed, the luminous efficiency will decrease due to the occurrence of crystal defects. Therefore, it is preferably 2 to 0 or less, more preferably 1 to the following. As shown in Fig. 4, the lower light guiding layer 10 and the upper light guiding layer 12 are disposed on the lower surface and the upper surface of the active layer 1 1 , respectively. Specifically, a lower light guiding layer 10 is provided under the active layer 11, and an upper light guiding layer 12 is provided on the active layer 11. The lower light guiding layer 10 and the upper light guiding layer 12 have a composition of (AlX3Gai-x3) YaliM-wPCOSXSS1, 0 &lt; Y2S1). Preferably, the above X3 is formed so that the barrier layer 18 is equal to the energy gap or becomes larger than the barrier layer 18, and more preferably in the range of 0.2 to 0.5. Further, Y2 is preferably made to be 0.4 to 0.6 〇X3 is selected from a function as a coating layer and is transparent to an emission wavelength, and Y2 is selected from a thick film of the cladding layer and attaches importance to lattice integration with the substrate. Form a range of good crystal growth. The lower light guiding layer 10 and the upper light guiding layer 12 are respectively provided to reduce the transfer of impurities between the lower cladding layer 9 and the upper cladding layer 13 and the active layer 11 of -23-201214753. That is, in the present invention, impurities are doped at a high concentration in the lower cladding layer 9 and the upper cladding layer 13, and the diffusion of the active layer 1 1 of the impurity becomes a cause of deterioration in performance of the light-emitting diode. . In order to effectively reduce the diffusion of the impurities, the layer thickness of the lower light guiding layer 10 and the upper light guiding layer 12 is preferably 10 nm or more, more preferably 20 nm to 100 nm. The conductivity type of the lower light guiding layer 10 and the upper light guiding layer 12 is not particularly limited, and any of undoped, p-type, and n-type can be selected. In order to improve the luminous efficiency, it is desirable to form a carrier having a good crystallinity of undoped or less than 3χ1017 cm -3 . As shown in Fig. 4, the lower cladding layer 9 and the upper cladding layer 13 are respectively disposed on The lower surface of the lower light guiding layer 10 and the upper surface of the upper light guiding layer 12. For the materials of the lower cladding layer 9 and the upper cladding layer 13, a semiconductor material of (AlX4Gai - χ4 ) Y3IIM-Y3P (0SX4S1, 0 &lt; Y3S1) is used, preferably a buffer gap of the buffer layer 15. For a large material, it is more preferable that the gap between the lower light guiding layer 10 and the upper light guiding layer 12 is larger. Preferably, the material has a composition of (Αΐχπα, -^Μ)^Ιη, -^Ρ (0&lt;Χ4&lt;1 &gt; Ο &lt;Υ3&lt;1), Χ4 is 0.3 to 0.7. Further, Υ3 is preferably 0.4 to 0.6. Χ4 is selected from the range of function as a coating layer and transparent to the luminescent wavelength, and is selected from the viewpoint of forming a thick film and integrating it from the crystal lattice of the substrate, and Υ3 is selected from the range in which the crystal growth is formed. The lower cladding layer 9 and the upper cladding layer 13 are configured to have different polarities. Further, the carrier thickness of the lower cladding layer 9 and the upper cladding layer 13 can be adjusted to a suitable range, and it is preferable to optimize the conditions in such a manner that the luminous efficiency of the active layer 11 is improved. Chemical. Further, by controlling the composition of the lower cladding layer 9 and the upper cladding layer 13, the bending of the compound semiconductor layer 2 can be reduced. Specifically, it is desirable that the lower cladding layer 9 be a semiconductor material composed of, for example, Mg-doped p-type (AlxuGa! - X4a) Yalni - YaP (0.3SX4aS0.7, 0.4: SY3aS0.6). Further, the carrier concentration is preferably in the range of 2 χ 1017 to 2 x 10 8 cm -3 , and the layer thickness is preferably in the range of 0.1 to 1 μηη. On the other hand, it is desirable that the upper cladding layer 13 be a semiconductor material composed of, for example, an n-type (A1X4bGa 1 - X4b ) Yblni - YbP (0.3 &lt; X4b &lt; 0.7 '0.4SY3bS0.6) doped with Si. Further, the carrier concentration is preferably in the range of lxlO17 to lxl018cm-3, and the layer thickness is preferably in the range of 0.1 to 1 μm. Further, the polarities of the lower cladding layer 9 and the upper cladding layer 13 can be selected in consideration of the element structure of the compound semiconductor layer 2. Further, above the structural layer of the light-emitting portion 7, a contact layer for reducing the contact resistance of the Ohmic electrode, a current diffusion layer for diffusing the element drive current planarly to the entire light-emitting portion, and the like may be provided. A conventional layer structure such as a current blocking layer or a current confinement layer in a region where the element drive current is limited. As shown in Fig. 4, the current diffusion layer 8 is provided below the light-emitting portion 7. The current diffusion layer 8 can be made of a material transparent to the light-emitting wavelength from the light-emitting portion 7 (active layer 1 1 ) 201214753, such as GaP or GalnP. In the case where GaP is applied to the current diffusion layer 8, by using the functional substrate 3 as a GaP substrate, there is an effect that bonding is easy and high bonding strength can be obtained. Further, in the case where GalnP is applied to the current diffusion layer 8, by changing the ratio of Ga to In', the InGaAs having the same lattice constant as that of the well layer 17 of the laminated current diffusion layer 8 has the ability to crystallize with the well layer 17. The effect of integration. Therefore, it is preferable to select the composition ratio of GalnP so that the lattice constant becomes the same as the composition ratio of InGaAs selected from the desired light-emitting wavelength. Further, the thickness of the current diffusion layer 8 is preferably in the range of 0.5 to 20 μm. When the right is 0.5 μπι or less, the current diffusion is insufficient; if it is 20 μπι or more, the cost is increased because the crystal grows until the thickness thereof. The functional substrate 3 is bonded to the main light extraction surface of the compound semiconductor layer 2 and the surface on the opposite side. That is, as shown in Fig. 4, the functional substrate 3 is bonded to the side of the current diffusion layer 8 constituting the compound semiconductor layer 2. This functional substrate 3 is sufficiently strong for the mechanically supported light-emitting portion 7, and is made of a material having a wide band gap and optically transparent to the light-emitting wavelength from the light-emitting portion 7. The functional substrate 3 is a substrate having a thermal expansion coefficient close to that of the light-emitting portion and having excellent moisture resistance. Further, it is preferably composed of GaP, GalnP, S i C or sapphire having high mechanical strength. Further, the functional substrate 3 5 201214753 is preferably formed to have a thickness of, for example, about 50 μm or more in order to support the light-emitting portion 7 with sufficient mechanical strength. Further, in order to facilitate the mechanical processing of the functional substrate 3 after bonding to the compound semiconductor layer 2, it is preferable to form a thickness of not more than about 300 μm. The functional substrate 3 is preferably composed of an n-type GaP substrate from the viewpoints of transparency, stress, and cost of a thickness of about 50 μm or more and about 300 μm or less. Further, as shown in Fig. 4, the side surface of the functional substrate 3 is on the side close to the compound semiconductor layer 2 and is set to be approximately perpendicular to the vertical plane 3a with respect to the main light extraction surface; on the side away from the compound semiconductor layer 2 and opposite The inclined surface 3b inclined to the inner side is set on the main light extraction surface. Thereby, the light emitted from the active layer 1 1 toward the functional substrate 3 side can be efficiently taken out to the outside. Further, part of the light emitted from the active layer 1 1 toward the functional substrate 3 side is reflected on the vertical surface 3 a and can be taken out on the inclined surface 3 b . On the other hand, the light reflected by the inclined surface 3b can be taken out on the vertical surface 3a. In this manner, by the effect of multiplying the vertical surface 3a and the inclined surface 3b, the light extraction efficiency can be improved. Further, as shown in Fig. 4, in the present embodiment, it is preferable that the angle ? formed by the inclined surface 3b and the surface parallel to the light-emitting surface is in the range of 55 to 80 degrees. By making such a range, it is possible to efficiently take out the light reflected at the bottom of the functional substrate 3 to the outside. Further, it is preferable that the width (thickness direction) of the vertical surface 3a is in the range of 30 μm to 100 μm. By making the width of the vertical surface 3a within the above range, the light reflected at the bottom -27 - 201214753 of the functional substrate 3 can be efficiently returned to the light-emitting surface on the vertical surface 3a, and can be further taken out from the main light. Face it to emit. Therefore, the luminous efficiency of the light-emitting diode 1 can be improved. Further, it is preferable that the inclined surface 3b of the functional substrate 3 is roughened. By roughening the inclined surface 3b, the effect of improving the light extraction efficiency of the inclined surface 3b can be obtained. In other words, by roughening the inclined surface 3b, total reflection on the inclined surface 3b can be suppressed, and the light extraction efficiency can be improved. Further, the functional substrate 3 has a reflectance of 90% or more with respect to the light-emitting wavelength, and has a reflective layer (not shown) disposed opposite to the light-emitting portion. In this configuration, it is possible to extract light efficiently from the main light extraction surface. The reflective layer is composed of, for example, silver (Ag), aluminum (A1), gold (Au) or the like. These materials have a high light reflectance and a light reflectance from the reflective layer 23 of 90% or more. The functional substrate 3 can be a combination of an inexpensive substrate such as ruthenium or iridium which is bonded to the light-emitting portion by a eutectic metal such as Αι ΐ 、, AuGe or AuSn. In particular, the Auln-based bonding temperature is low, the thermal expansion coefficient is different from that of the light-emitting portion, and the most inexpensive bonding of the germanium substrate (germanium layer) is the optimum combination. From the viewpoint of quality stability, it is also desired that the functional substrate 3 is a high-melting-point metal such as Ti, W, or Pt in which the current diffusion layer, the reflective metal, and the eutectic metal are not mutually diffused, or a transparent conductive oxide in which ITO or the like is inserted. . The bonding interface between the compound semiconductor layer 2 and the functional substrate 3 has a case of -28-5 201214753 as a high resistance layer. In other words, there is a case where a high-resistance layer (not shown) is provided between the compound semiconductor layer 2 and the functional substrate 3. This high-resistance layer exhibits a high resistance 较 compared with the functional substrate 3, and has a function of reducing the reverse current from the side of the current diffusion layer 8 of the compound semiconductor layer 2 toward the functional substrate 3 in the case where the high-resistance layer is provided. In addition, the junction structure exhibiting withstand voltage is inadvertently applied to the current diffusion layer 8 side from the side of the functional substrate 3, and the dropout voltage is preferably lower than the reverse voltage of the pn junction type light-emitting portion 7. The way to make it up. The n-type ohmic electrode (first electrode) 4 and the p-type ohmic electrode (second electrode) 5 are ohmic electrodes of a low-resistance film provided on the main light extraction surface of the light-emitting diode 1. Here, the n-type ohmic electrode 4 is provided above the upper light guiding layer 11, and for example, an alloy composed of AuGe or Ni alloy/Au can be used. On the other hand, as shown in Fig. 4, the p-type ohmic electrode 5 can be made of an alloy of AuB e/Au or AuZn/Au on the surface of the current diffusion layer 8 which is exposed. Here, in the light-emitting diode 1 of the present embodiment, it is preferable that the p-type ohmic electrode 5 as the second electrode is formed on the current diffusion layer 8. By constructing such a structure, it is possible to obtain an effect of lowering the operating voltage. Further, by forming the p-type ohmic electrode 5 on the current diffusion layer 8 composed of p-type GaP, in order to obtain a good ohmic contact, the operating voltage can be lowered. Further, in the present embodiment, it is preferable that the polarity of the first electrode is made n-type and the polarity of the second electrode is made of P type. With such a configuration, it is possible to achieve high luminance of the light-emitting diode 1. On the other hand, when the first electrode of -29-201214753 is formed into a P-type, current spreading will be deteriorated, and the luminance is lowered. On the other hand, by forming the first electrode into an n-type, current spreading is improved, and the luminance of the light-emitting diode 1 can be increased. As shown in Fig. 3, in the light-emitting diode 1 of the present embodiment, it is preferable to arrange the n-type ohmic electrode 4 and the p-type ohmic electrode 5 in a diagonal position. Further, it is preferable to form a structure in which the periphery of the p-type ohmic electrode 5 is surrounded by the compound semiconductor layer 2. By constructing such a structure, the effect of lowering the operating voltage can be obtained. Further, by surrounding the p-type ohmic electrode 5 by the n-type ohmic electrode 4, the current easily flows to the periphery, and as a result, the operating voltage is lowered. Further, in the light-emitting diode 1 of the present embodiment, as shown in Fig. 3, it is preferable that the n-type ohmic electrode 4 is formed into a honeycomb or a lattice shape. By constructing such a structure, an effect of improving reliability can be obtained. Further, by forming a lattice shape, a current can be uniformly injected into the active layer 11 as a result of obtaining an effect of improving reliability. Further, in the light-emitting diode 1 of the present embodiment, it is preferable to use a pad-shaped electrode (pad electrode) and a linear electrode (linear electrode) having a width of 10 μm or less. By having such a structure, it is possible to achieve high luminance. Further, by narrowing the width of the linear electrode, the opening area of the light extraction surface can be increased, so that high luminance can be achieved. The third electrode can be further increased in output by being formed on the back surface of the functional substrate and reflected on the transparent substrate to the substrate side. The reflective metal material can be made of a material such as Au, Ag or tantalum. 5 201214753 In addition, by forming the electrode surface side with a eutectic metal or a solder material such as AuSn, the grain bonding step is simplified and it is not necessary to use a slurry. Further, by using a metal to be connected, heat conduction is improved and the heat radiation characteristics of the light-emitting diode are improved. &lt;Manufacturing Method of Light Emitting Diode&gt; Next, a method of manufacturing the light emitting diode 1 of the present embodiment will be described. Fig. 1 is a cross-sectional view showing an epitaxial wafer used in the light-emitting diode 1 of the present embodiment. Further, Fig. 13 is a cross-sectional view showing a bonded wafer of the light-emitting diode 1 of the present embodiment. (Step of Forming Compound Semiconductor) First, the compound semiconductor layer 2 shown in Fig. 12 is formed on the GaAs substrate 14, and a buffer layer 15 made of GaAs is sequentially laminated for use in selection. An etching stop layer (not shown) provided by the etching, an n-type contact layer 16 doped with Si, an n-type upper cladding layer 13, an upper light guiding layer 12, an active layer 11, and a lower light guiding layer 10, The Ρ-type lower cladding layer 9 is made of a current diffusion layer 8 composed of Mg-doped p-type GaP.

GaAs基板1 4能夠使用利用習知之製法所製得的單晶 基板市售品。期望GaAs基板14之使其磊晶成長的表面係 平滑。從品質安定性之觀點，期望爲GaAs基板14之表面 的面方位係容易地進行磊晶成長，所量產的（1 〇〇 )面及 偏移（100) ±20°以內之基板。再者，GaAs基板14的面 方位之範圍，更佳爲從（100)方向朝（0-1-1)方向15° -31- 201214753 偏移±5。》 尙且，於本發明專利說明書中，於米勒（Miller )指數 之標示中，係意指附加於其隨後的指數之橫線。 期望GaAs基板1 4之重排密度，係用以使化合物半導 體層2之結晶性變佳而越低越好。具體而言，例如適合爲 10，000個cm _2以下，期望更佳爲1，000個cm _2以下。As the GaAs substrate 14, a commercially available single crystal substrate obtained by a conventional production method can be used. It is desirable that the surface of the GaAs substrate 14 which is epitaxially grown is smooth. From the viewpoint of quality stability, it is desirable that the surface orientation of the surface of the GaAs substrate 14 is easily epitaxially grown, and the substrate (1 Å) and the substrate (100) within ±20° are mass-produced. Further, the range of the plane orientation of the GaAs substrate 14 is more preferably ±5 from the (100) direction toward the (0-1-1) direction by 15° - 31 - 201214753. Furthermore, in the specification of the present invention, in the indication of the Miller index, it means a horizontal line attached to its subsequent index. It is desirable that the rearrangement density of the GaAs substrate 14 is such that the crystallinity of the compound semiconductor layer 2 is improved as low as possible. Specifically, for example, it is suitably 10,000 cm _2 or less, and more desirably 1,000 cm _2 or less.

GaAs基板14可以爲η型也可以爲p型。GaAs基板14 之載子濃度能夠從所欲之導電性與元件構造而適當選擇。 例如，GaAs基板1 4爲摻雜矽的η型之情形下，載子濃度 較佳爲1 X 1〇17至5χ 1 018 cm— 3之範圍。針對於此，將鋅摻 雜於GaAs基板14的p型之情形下，載子濃度較佳爲2χ1018 至5χ1019 cm—3之範圍。The GaAs substrate 14 may be of an n-type or a p-type. The carrier concentration of the GaAs substrate 14 can be appropriately selected from the desired conductivity and device structure. For example, in the case where the GaAs substrate 14 is an n-type doped with ytterbium, the carrier concentration is preferably in the range of 1 X 1 〇 17 to 5 χ 1 018 cm -3 . In view of this, in the case where zinc is doped in the p-type of the GaAs substrate 14, the carrier concentration is preferably in the range of 2 χ 1018 to 5 χ 1019 cm -3 .

GaAs基板14之厚度係按照基板之尺寸而具有適當之 範圍。若GaAs基板14之厚度較適當之範圍爲薄時，將有 於化合物半導體層2之製程中裂開的憂慮。另一方面，GaAs 基板14之厚度較適當之範園爲厚時，材料成本將變得增 加》因此，GaAs基板1 4之基板尺寸爲大之情形，例如， 直徑75 mm之情形下，爲了防止操作時之裂開，期望爲250 至5 00 μπι之厚度。同樣地，直徑50 mm之情形，期望爲 200至400 μιη之厚度；直徑100 mm之情形，期望爲350 至600 μιη之厚度。 如此方式，藉由按照GaAs基板14之基板尺寸而增厚 基板之厚度，能夠減低起因於發光部7之化合物半導體層 ⑤ 201214753 2的彎曲。藉此’爲了使磊晶成長中之溫度分布成爲均勻 而能夠減小活性層11之面內的波長分布。再者，GaAs基 板1 4之形狀並未特別限定爲圓形，即使爲矩形等也無問 題。 緩衝層（buffer) 15係用以減低GaAs基板14與發光 部7之構造層缺陷的傳遞。因此，若選擇基板之品質或磊 晶成長條件，緩衝層1 5則不一定爲必要。另外，緩衝層 15之材質較佳爲作成與使其磊晶成長之基板相同的材質。 因而，於本實施形態中，緩衝層15較佳爲與GaAs基板14 同樣地使用G a As。另外，於緩衝層1 5中，用以減低缺陷 的傳遞，也能夠使用與GaAs基板14不同材質所構成的多 層膜。緩衝層15之厚度較佳爲作成0.1 μιη以上，更佳爲 作成0.2 μπι以上。 接觸層16(於第4圖中省略）係爲了使其與電極之接 觸電阻降低所設置。接觸層1 6之材質較佳爲能帶間隙較活 性層11爲大的材質，能夠適合使用AIxGai-xAs、（ AlxGa, -x) yIi^-yPCOSXSI、0&lt;Y1S1)。另外，接觸層 16 之載 子濃度的下限値係用以使得與電極之接觸電阻降低，較佳 爲5xl017 cm_ 3以上，更佳爲lxlO18 cm - 3以上。載子濃度 的上限値期望爲容易引起結晶性降低之2 X 1 0 19 cm _ 3以 下。接觸層16之厚度較佳爲0.5 μιη以上，最適爲1 μιη以 上。雖然接觸層16之厚度的上限値並未特別限定，但爲了 使關於磊晶成長之成本成爲適當範圍，期望爲作成5 μιη以 201214753 下。 於本實施形態中，能夠採用分子線磊晶法（MBE法） 或減壓有機金屬化學氣相沉積法（MOCVD法）等習知之成 長方法。其中，最爲期望採用具有優異的量產性之MOCVD 法。具體而言，使用於化合物半導體層2之磊晶成長的Ga As 基板14係期望於成長前實施洗淨步驟或熱處理等之前處 理而去除表面之污染或自然氧化膜。構成上述化合物半導 體層2之各層能夠將直徑50至150 mm之GaAs基板14安 裝於MOCVD裝置內，同時使其磊晶成長而積層。另外， MOCVD裝置能夠採用自公轉型、高速旋轉型等之市售的大 型裝置。 於磊晶成長上述化合物半導體層2的各層之際，III族 構成元素之原料能夠使用例如三甲基鋁（（CH3 ) 3A1 )、 三甲基鎵（（CH3) 3Ga)及三甲基銦（（CH3) 3In) »另 外，Mg之摻雜原料能夠使用例如雙環戊二烯基鎂（bis-(C5H5 ) 2Mg)等。另外，Si之摻雜原料能夠使用例如二 矽烷（Si2H6 )等。 另外，V族構造元素之原料能夠使用膦（P Η 3 )、胂 (AsH3)等。 另外，將P型G aP作爲電流擴散層8使用之情形，各 層之成長溫度能夠採用7 2 0至7 7 0 °C，其他各層之情形， 能夠採用600至7 00°C。 另外，將P型GalnP作爲電流擴散層8使用之情形， -34- ⑤ 201214753 能夠採用600至700°C。 再者，各層之載子濃度及層厚、溫度條件能夠適當選 擇。 進行如此方式所製得的化合物半導體層2，儘管具有 發光部7也可以獲得結晶缺陷少的良好之表面狀態。另 外，化合物半導體層2也可以對應於元件構造而實施硏磨 等之表面加工。 (機能性基板之接合步驟） 接著，接合化合物半導體層2與機能性基板3。 化合物半導體層2與機能性基板3之接合係首先硏磨 構成化合物半導體層2之電流擴散層8的表面而進行鏡面 加工。接著，準備貼附於此電流擴散層8之鏡面硏磨的表 面之機能性基板3。再者，此機能性基板3之表面係在接 合於電流擴散層8之前，對鏡面進行硏磨。接著，將化合 物半導體層2與機能性基板3搬入一般之半導體材料貼附 裝置內，於真空中使電子衝撞已進行鏡面硏磨的兩者之表 面後照射中性化之Ar束。然後，藉由在維持真空之貼附裝 置內重疊兩者之表面而施加載重，能夠在室溫下進行接合 (參閱第13圖）。關於接合，從接合條件安定性之觀點， 更期望接合面爲相同材質。 接合（貼附）係於如此之真空下的常溫接合爲最適， 也能夠使用共晶金屬、接著劑而接合。 (第1及第2電極的形成步驟） -35- 201214753 接著，形成第1電極之η型歐姆電極4及第2電極之 ρ型歐姆電極5。 η型歐姆電極4及ρ型歐姆電極5之形成係首先從與 機能性基板3接合的化合物半導體層2，藉由氨系蝕刻劑 而選擇性地去除· Ga As基板14及緩衝層15。接著，在露出 的接觸層16之表面形成η型歐姆電極4。具體而言，成爲 任意厚度的方式來利用真空蒸鍍法而積層AuGe、Ni合金 /Pt/Au後，利用一般之光刻手段而進行圖案化後形成η型 歐姆電極4之形狀。 接著’針對接觸層16、上部包覆層13、上部導光層 12、下部導光層1〇、ρ型之下部包覆層9之既定範圍選擇 性地去除而使電流擴散層8露出，在此露出的電流擴散層 8之表面形成ρ型歐姆電極5。具體而言，例如成爲任意之 厚度的方式來利用真空蒸鍍法而積層AuBe/Au後，利用一 般之光刻手段而進行圖案化後形成ρ型歐姆電極5之形 狀。其後，藉由以例如400至500 °C、5至20分鐘之條件 進行熱處理而合金化，能夠形成低電阻之η型歐姆電極4 及Ρ型歐姆電極5。 (第3電極的形成步驟） 第3電極係在機能性基板之背面所形成。依照元件之 構造，能夠組合附加歐姆電極、肖特基（Schottky )電極、 反射機能、共晶晶粒結合構造等之機能。於透明基板中， 形成Au、Ag、A1等之材料而作成進行反射之構造。於基 -36- ⑤ 201214753 板與上述材料之間，例如能夠插入氧化矽、ITO等之透明 膜。形成方法能夠利用濺鍍法、蒸鍍法等之習知技術。 另外’藉由使電極表面側成爲例如AuSn等之共晶金 屬、無錯錫焊材料等，在晶粒結合步驟，簡化而變得無使 用糊之必要。形成方法能夠利用濺鍍法、蒸鍍法、電鍍、 印刷等之習知技術。 藉由利用金屬連接，使導熱變佳而提高發光二極體之 放熱特性。 組合上述二種機能之情形係使金屬不進行擴散的方式 來插入障壁金屬、氧化物也爲適合之方法。此等係藉由元 件構造、基板材料而能夠選擇最適者。 (機能性基板之加工步驟） 接著’加工機能性基板3之形狀。 機能性基板3之加工係首先在未形成第3電極6之表 面進行V字形之挖溝。此時，成爲具有v字形溝之第3電 極6側之內側面與平行於發光面之面所夾之角度α的傾斜 面3b。接著’從化合物半導體層2側起，以既定之間隔進 行切割而晶片化。再者，藉由晶片化之際的切割而形成機 能性基板3之垂直面3 a。 傾斜面3 b之形成方法，並未予以特別限定，能夠組合 濕式蝕刻法、乾式蝕刻法.、劃線法、雷射加工等之習知方 法而使用’但最好爲採用形狀之控制性及生產性高的切割 法。藉由採用切割法而能夠提高製造良率。 201214753 另外，垂直面3a之形成方法並未予以特別限定，較佳 爲雷射加工、劃線/裂開法或切割法而形成。 藉由採用雷射加工、劃線/裂開法而能夠使製造成本降 低。亦即，於晶片分離之際，無設置切份之必要，由於能 夠製造數量多的發光二極體，故能夠降低製造成本。 另一方面，切割法係具有優異的切斷安定性。 最後，必要時利用硫酸/過氧化氫混合液等而蝕刻去除 破碎層及污垢。進行如此方式而製造發光二極體1。 如以上所說明，若根據本實施形態之發光二極體1， 具備包含具有由組成式（InjMGam) As(OSXlSl)所構 成的井層17之發光部7的化合物半導體層2。 另外，於本實施形態之發光二極體1中，在發光部7 上設置電流擴散層8 »由於此電流擴散層8係對發光波長 爲透明，並不吸收來自發光部7之發光而能夠作成高輸出/ 高效率之發光二極體1。機能性基板係材質安定、無腐蝕 之憂慮而具有優異的耐濕性。 因而，若根據本實施形態之發光二極體1，能夠提供 具有850 nm以上之發光波長，具有優異的單色性，同時爲 高輸出/高效率且耐濕性之發光二極體1。另外，若根據本 實施形態之發光二極體1與利用習知之液相磊晶法所製得 的透明基板型AlGaAs系之發光二極體作一比較，係能夠提 供具有約2倍以上之發光效率的高輸出發光二極體1。另 外，也提高了高溫高濕信賴性。 -38- ⑤ 201214753 &lt;發光二極體（第2實施形態）&gt; 第MA及MB圖係用以說明有關採用本發明之第2實 施形態之發光二極體的圖形：第〗4 A圖係平面圖；第i 4B 圖係沿著顯示於第14A圖中之C-C:線的剖面圖（導光層1〇 及1 2係省略圖示）。 有關第2實施形態之發光二極體之特徵爲具備：發光 部 7，其係具有交替積層由組成式（InxlGai-xl) As (0SXK1)所構成的井層17與由組成式（Alj^Gai-xd^In, -Y1P(0SX2&lt;1、0&lt;Y1S1)所構成的障壁層18之量子井構 造的活性層1 1、夾住活性層1 1之由組成式（AlX3Gai - X3 ) uim—wPCOsxssi'iXYSsi)所構成的第 1導光層 ι〇 與第2導光層12、與分別使第1導光層1〇與第2導光層 12介於中間而夾住活性層11之第1包覆層9與第2包覆 層13;電流擴散層8，其係形成於發光部7上；及機能性 基板31，其係對向於發光部7而配置且含有對於發光波長 具有90%以上之反射率的反射層23，並接合於電流擴散層 8;而第1包覆層9與第2包覆層13爲由組成式（AlX4Ga, -X4) vs In, - Y3P ( 0&lt;X4&lt;1 ^ Ο &lt; Υ3&lt;1 )所構成。 在關於第2實施形態之發光二極體中，因爲對於發光 波長具有90%以上之反射率，且具有包含對向於發光部7 所配置的反射層2 3之撵能性基板3 1，能夠有效地從主要 的光取出面取出光。 在顯示於第1 4Α及1 4Β圖之例子中，機能性基板3 1 201214753 係在電流擴散層8的下側之面8b上具備第2電極21，進 —步具備由覆蓋其第2電極21的方式來積層透明導電膜 22與反射層23所構成的反射構造物、及由矽或鍺所構成 的層（基板）3 0。 在關於第2實施形之發光二極體中，機能性基板31較 佳爲含有由矽或鍺所構成的層。由於係爲難以腐蝕的材 質，因而耐濕性將提高。 反射層23係藉由銀（Ag )、鋁（A1 )、金（Au )或 此等之合金等所構成。此等之材料係高反射率，能夠使來 自反射層23之光反射率成爲90%以上。 機能性基板3 1能夠使用在此反射層23上，利用Auln、 AuGe &gt; AuSn等之共晶金屬而接合於矽、鍺等之廉價基板 (層）的組合。尤其，Au In係接合溫度低，其熱膨脹係數 與發光部具有差異’針對接合最爲廉價之矽基板（矽層） 係最適之組合。 從品質安定性之觀點，也期望機能性基板3 1係使電流 擴散層、反射金屬及共晶金屬不相互擴散之例如作成插入 由鈦（Ti )、鎢（W )、鉑（Pt )等之高熔點金屬所構成的 層之構造。 &lt;發光二極體（第3實施形態）〉 第1 5圖係用以說明關於採用本發明之第3實施形態之 發光二極體的圖形。 有關第3實施形態之發光二極體之特徵爲具備：發光 -40- 201214753 部 7，其係具有交替積層由組成式（InxiGai-χι) As (0SX1S1)所構成的井層17與由組成式（ -Y1P ( 0SX2S1、0&lt;Υ1^1)所構成的障壁層18之量子井構 造的活性層1 1、夾住活性層1 1之由組成式（A1 X 3 G a i - X 3 ) nliM-nPCOSXSSl'CXYSSl)所構成的第 1 導光層 10 與第2導光層12、與分別使第1導光層10與第2導光層 12介於中間而夾住活性層11之第1包覆層9與第2包覆 層13;電流擴散層8，其係形成於發光部7上；及機能性 基板51，其係對向於發光部7而配置且含有對於發光波長 具有90%以上之反射率的反射層的反射層53與金屬基板 50，並接合於電流擴散層8;而第1包覆層9及第2包覆 層 13 爲由組成式（AlX4Gai-X4) Υ3 Ιη|-Υ3Ρ(0幺X4S1' 0 &lt; Y3S1 )所構成。 在關於第3實施形態之發光二極體中，機能性基板含 有金屬基板之點爲對關於第2實施形態之發光二極體爲特 徵之構造。 金屬基板50係高放熱性，有助於使發光二極體以高亮 度地發光，同時能夠使發光二極體之壽命成爲長壽命。 從放熱性之觀點，金屬基板50特佳爲導熱係數爲130 W/m· Κ以上之金屬所構成。導熱係數爲130W/m. Κ以上 之金屬，例如，有鉬（138 W/m . K)或鎢（174 W/m · K); 銀（導熱係數=420 W/m · K )、銅（導熱係數=398 W/m · K )、金（導熱係數= 320W/m.K)、鋁（導熱係數 41 - 201214753 = 23 6 W/m · K )。 如第1 5圖所示’化合物半導體層2係具有活性層η、 使導光層（未以圖示）介於中間而夾住第1包覆層（下部 包覆層）9及第2包覆層（上部包覆層）13、在第1包覆 層（下部包覆層）9之下側的電流擴散層8、在第2包覆層 (上部包覆層）1 3之上側的第1電極5 5、及俯視幾乎相同 尺寸之接觸層56。 機能性基板51係在電流擴散層8的下側之面8b具備 第2電極57’進一步由覆蓋其第2電極57的方式來積層 透明導電膜52與反射層53而成之反射構造物、及金屬基 板50所構成，金屬基板50之接合面50a接合於與構成反 射構造物之反射層5 3的化合物半導體層2相反側之面5 3 b。 反射層5 3係由例如銅、銀、金、鋁等之金屬或此等之 合金等所構成。此等之材料係高光反射率，能夠使來自反 射構造物之光反射率成爲90%以上。藉由形成反射層53， 而在反射層53使來自活性層11之光反射至正面方向f，能 夠使在正面方向f之光取出效率提高。藉此，能夠使發光 二極體更高亮度化。 反射層53較佳爲從透明導電膜52側，由Ag、Ni/Ti 障壁層、Au系之共晶金屬（連接用金屬）所構成的積層構 造。 上述連接用金屬係電阻低、在低溫進行熔融之金屬。 藉由使用上述連接用金屬，不會將熱應力賦予化合物半導 -42- ⑤ 201214753 體層2，能夠連接金屬基板。 連接用金屬係化學上安定且使用熔點低的Au系之共 晶金屬等。上述Αυ系之共晶金屬，例如，可舉例：AuSn、 AuGe'AuSi等之合金的共晶金屬（Au系之共晶金屬）。 另外’較佳爲將鈦 '鉻、鎢等之金屬添加於連接用金 屬中。藉此，鈦、鉻、鎢等之金屬發揮作爲障壁金屬之機 能，金屬基板中所含之不純物等擴散至反射層5 3側而能夠 抑制進行反應。 透明導電膜52係藉由ITO膜、IZO膜等所構成。尙且， 反射構造物也可以僅由反射層5 3所構成。 另外，也可以使用利用透明材料之折射率差的所謂冷 光鏡，例如氧化鈦膜、氧化矽膜之多層膜或白色之氧化鋁、 A1N以取代透明導電膜52,或是透明導電膜52 一倂與反射 層5 3組合。 金屬基板50能夠使用由複數之金屬層所構成者。 複數之金屬層的構造係如第15圖所示之例，較佳爲由 交替積層二種金屬層，亦即第1金屬層50A與第2金屬層 5〇B所構成者。 尤其，第1金屬層50A與第2金屬層50B之層數更佳 爲合計作成奇數。 此情形下，從金屬基板之彎曲或裂開之觀點，於第2 金屬層5 0B使用較化合物半導體層2之熱膨脹係數爲小的 材料時，第1金屬層50A較佳爲使用較化合物半導體層3 -43- 201214753 之熱膨脹係數爲大的材料所構成者。由於作爲金屬基板整 體之熱膨脹係數係成爲接近化合物半導體層之熱膨脹係數 者，能夠抑制接合化合物半導體層與金屬基板之際的金屬 基板之彎曲或裂開，因而能夠使發光二極體之製造良率提 高。同樣地，於第2金屬層50B使用較化合物半導體層2 之熱膨脹係數爲大的材料之時，第1金屬層50A較佳爲使 用由較化合物半導體層2之熱膨脹係數爲小的材料所構成 者。由於作爲金屬基板整體之熱膨脹係數係成爲接近化合 物半導體層之熱膨脹係數者，能夠抑制接合化合物半導體 層與金屬基板之際的金屬基板之彎曲或裂開，因而能夠使 發光二極體之製造良率提高。 從以上之觀點，二種金屬層中任一種不論第1金屬層 或第2金屬層皆可。 二種金屬層能夠使用例如由銀（熱膨脹係數=1 8.9 ppm/K)、銅（熱膨脹係數=16.5 ppm/K)、金（熱膨脹係 數=14·2 ppm/Κ)、鋁（熱膨脹係數=23.1 PPm/K)、鎳（熱 膨脹係數=13.4 ppm/K)及此等之合金中任一種所構成的金 屬層’係與由鉬（熱膨脹係數=5.1 ppm/K)、錫（熱膨脹 係數=4.3 ppm/K)、鉻（熱膨脹係數=4.9 ppm/K)及此等 之合金中任一種所構成的金屬層之組合。 適宜之例子可舉例：由Cu/Mo/Cu之3層所構成的金屬 基板。於上述之觀點中，即使由Mo/Cu/Mo之3層所構成 的金屬基板也可以獲得同樣之效果，因爲由Cu/M〇/Cu之3 ⑤ 201214753 層所構成的金屬基板係利用容易加工的Cu而夾住機械強 度高的Mo之構造，具有也較由Mo/Cu/Mo之3層所構成的 金屬基板更容易切斷等之加工的優點。 例如由 Cu(30 μιη ) /Μο(25 μηι) /Cu(30 μηι)之 3 層所構成的金屬基板之情形，金屬基板整體之熱膨脹係數 爲 6.1 ppm/K，由 Mo ( 25 μηι) /Cu ( 70 μιη) /Mo ( 25 μηι) 之3層所構成的金屬基板之情形成爲5.7 ppm/K。 另外，從放熱之觀點，構成金屬基板之金屬層較佳爲 由導熱係數爲高的材料所構成。藉此，提高金屬基板之放 熱性，因而能夠以高亮度而使發光二極體發光，同時也能 夠使發光二極體之壽命得以長壽命化。 例如，較佳爲使用銀（導熱係數=420 W/m . K )、銅 (導熱係數= 3 9 8 W/m · K)、金（導熱係數=320 W/m . K )、 鋁（導熱係數= 236 W/m· K)、鉬（138 W/m· K)、鎢（174 W/m · K)及此等之合金等。 更佳爲由此等金屬層之熱膨脹係數與化合物半導體層 之熱膨脹係數約略相等之材料所構成。尤其金屬層之材料 較佳爲具有化合物半導體層之熱膨脹係數±1.5 ppm/K以內 的熱膨脹係數之材料。藉此，能夠減小對金屬基板與化合 物半導體層之接合時的發光部之熱所造成的應力，故能夠 抑制因使金屬基板與化合物半導體層連接時之熱所造成的 金屬基板之裂開，故能夠使發光二極體之製造良率提高。 金屬基板整體之導熱係數，例如由Cu ( 30 μιη ) /Mo -45- 201214753 (25 μηι) /Cu ( 30 μιη)之3層所構成的金屬基板之情形成 爲 250 W/m· Κ;由 Mo( 25 pm)/Cu( 70 μπι)/Μο( 25 μιη) 之3層所構成的金屬基板之情形成爲220 W/m · Κ。 〔實施例〕 以下，使用實施例而具體說明本發明之效果。尙且， 本發明並不受此等實施例所限定。 於本實施例中，具體說明製作關於本發明之發光二極 -體的例子。另外，在本實施例所製得的發光二極體係由 InGaAs所構成的井層與由AlGalnP所構成的障壁層之具有 由量子井構造所構成的活性層之紅外發光二極體。於本實 施例中，使成長於GaAs基板上之化合物半導體層與機能性 基板結合而製作發光二極體。而且，爲了特性評估而製作 將發光二極體晶片構裝於基板上之發光二極體燈。 (實施例1 ) 實施例1係顯示於第4圖之實施形態的實施例。 實施例1之發光二極體係首先在由摻雜Si之η型Ga As 單晶所構成的GaAs基板上，依序積層化合物半導體層而製 作晶晶晶圓。The thickness of the GaAs substrate 14 has an appropriate range in accordance with the size of the substrate. If the thickness of the GaAs substrate 14 is thinner than the appropriate range, there is a concern that the compound semiconductor layer 2 is cleaved in the process. On the other hand, when the thickness of the GaAs substrate 14 is thicker than the appropriate radius, the material cost will increase. Therefore, the substrate size of the GaAs substrate 14 is large, for example, in the case of a diameter of 75 mm, in order to prevent The crack is opened during operation and is expected to be a thickness of 250 to 500 μπι. Similarly, in the case of a diameter of 50 mm, a thickness of 200 to 400 μm is desired; in the case of a diameter of 100 mm, a thickness of 350 to 600 μm is desired. In this manner, by thickening the thickness of the substrate in accordance with the substrate size of the GaAs substrate 14, the bending of the compound semiconductor layer 5 201214753 2 due to the light-emitting portion 7 can be reduced. Thereby, the wavelength distribution in the plane of the active layer 11 can be made small in order to make the temperature distribution during epitaxial growth uniform. Further, the shape of the GaAs substrate 14 is not particularly limited to a circular shape, and there is no problem even if it is a rectangle or the like. A buffer 15 is used to reduce the transmission of structural layer defects of the GaAs substrate 14 and the light-emitting portion 7. Therefore, if the quality of the substrate or the conditions for the epitaxial growth are selected, the buffer layer 15 is not necessarily required. Further, the material of the buffer layer 15 is preferably made of the same material as the substrate on which the epitaxial growth is performed. Therefore, in the present embodiment, it is preferable to use Ga a As in the buffer layer 15 in the same manner as the GaAs substrate 14. Further, in the buffer layer 15, in order to reduce the transmission of defects, a multilayer film composed of a material different from the GaAs substrate 14 can be used. The thickness of the buffer layer 15 is preferably 0.1 μm or more, more preferably 0.2 μm or more. The contact layer 16 (omitted in Fig. 4) is provided in order to reduce the contact resistance with the electrodes. The material of the contact layer 16 is preferably a material having a larger band gap than the active layer 11, and can be suitably used for AIxGai-xAs, (AlxGa, -x) yIi^-yPCOSXSI, 0 &lt; Y1S1). Further, the lower limit of the carrier concentration of the contact layer 16 is used to lower the contact resistance with the electrode, preferably 5 x 10 17 cm 3 or more, more preferably 1 x 10 18 cm -3 or more. The upper limit of the carrier concentration is desirably 2 X 1 0 19 cm _ 3 which is liable to cause a decrease in crystallinity. The thickness of the contact layer 16 is preferably 0.5 μm or more, and most preferably 1 μm or more. Although the upper limit 厚度 of the thickness of the contact layer 16 is not particularly limited, in order to make the cost of epitaxial growth into an appropriate range, it is desirable to make 5 μm to 201214753. In the present embodiment, a conventional growth method such as a molecular line epitaxy method (MBE method) or a reduced pressure metalorganic chemical vapor deposition method (MOCVD method) can be employed. Among them, the MOCVD method having excellent mass productivity is most desirable. Specifically, the Ga As substrate 14 used for epitaxial growth of the compound semiconductor layer 2 is desirably treated to remove surface contamination or a natural oxide film before the growth step or heat treatment. Each of the layers constituting the above-described compound semiconductor layer 2 can mount a GaAs substrate 14 having a diameter of 50 to 150 mm in an MOCVD apparatus while being epitaxially grown to be laminated. Further, the MOCVD apparatus can be a commercially available large-sized device such as a self-propelled or high-speed rotary type. When epitaxial growth of each layer of the compound semiconductor layer 2 is carried out, a raw material of the group III constituent element can use, for example, trimethylaluminum ((CH3)3A1), trimethylgallium ((CH3)3Ga), and trimethylindium ( (CH3) 3In) » In addition, as the doping raw material of Mg, for example, biscyclopentadienyl magnesium (bis-(C5H5) 2Mg) or the like can be used. Further, as the doping material for Si, for example, dioxane (Si2H6) or the like can be used. Further, as a raw material of the group V structural element, phosphine (P Η 3 ), hydrazine (AsH 3 ) or the like can be used. Further, in the case where P-type GaP is used as the current diffusion layer 8, the growth temperature of each layer can be from 720 to 770 °C, and in the case of other layers, it can be from 600 to 700 °C. Further, in the case where P-type GalnP is used as the current diffusion layer 8, -34- 5 201214753 can be used at 600 to 700 °C. Further, the carrier concentration, layer thickness, and temperature conditions of each layer can be appropriately selected. The compound semiconductor layer 2 obtained in this manner can obtain a good surface state with few crystal defects even though it has the light-emitting portion 7. Further, the compound semiconductor layer 2 may be subjected to surface processing such as honing in accordance with the element structure. (Joining Step of Functional Substrate) Next, the compound semiconductor layer 2 and the functional substrate 3 are bonded. The bonding of the compound semiconductor layer 2 and the functional substrate 3 is performed by first honing the surface of the current diffusion layer 8 constituting the compound semiconductor layer 2 to perform mirror processing. Next, the functional substrate 3 attached to the mirror-honed surface of the current diffusion layer 8 is prepared. Further, the surface of the functional substrate 3 is honed to the mirror surface before being bonded to the current diffusion layer 8. Next, the compound semiconductor layer 2 and the functional substrate 3 are carried into a general semiconductor material attaching device, and electrons are collided with the surface of both surfaces which have been mirror-honed in a vacuum, and then the neutralized Ar beam is irradiated. Then, the load can be applied at room temperature by superimposing the surfaces of both of them in the adhesion maintaining device (see Fig. 13). Regarding the joining, it is more desirable that the joint surface be the same material from the viewpoint of the stability of the joining condition. Bonding (attaching) is optimum for room temperature bonding under such a vacuum, and bonding can also be performed using a eutectic metal or an adhesive. (Step of Forming First and Second Electrodes) -35 - 201214753 Next, the n-type ohmic electrode 4 of the first electrode and the p-type ohmic electrode 5 of the second electrode are formed. The n-type ohmic electrode 4 and the p-type ohmic electrode 5 are formed by first selectively removing the Ga As substrate 14 and the buffer layer 15 from the compound semiconductor layer 2 bonded to the functional substrate 3 by an ammonia-based etchant. Next, an n-type ohmic electrode 4 is formed on the surface of the exposed contact layer 16. Specifically, AuGe and Ni alloy/Pt/Au are laminated by a vacuum deposition method in an arbitrary thickness, and then patterned by a general photolithography method to form an n-type ohmic electrode 4. Then, the current diffusion layer 8 is exposed by selectively removing the predetermined range of the contact layer 16, the upper cladding layer 13, the upper light guiding layer 12, the lower light guiding layer 1 and the p-type lower cladding layer 9. The surface of the exposed current diffusion layer 8 forms a p-type ohmic electrode 5. Specifically, for example, AuBe/Au is laminated by a vacuum deposition method to have an arbitrary thickness, and then patterned by a general photolithography method to form a p-type ohmic electrode 5. Thereafter, the alloying is performed by heat treatment at, for example, 400 to 500 ° C for 5 to 20 minutes, whereby the low-resistance n-type ohmic electrode 4 and the ytterbium-type ohmic electrode 5 can be formed. (Step of Forming Third Electrode) The third electrode is formed on the back surface of the functional substrate. Depending on the configuration of the components, it is possible to combine functions of an ohmic electrode, a Schottky electrode, a reflection function, a eutectic grain bonding structure, and the like. In the transparent substrate, a material such as Au, Ag, or A1 is formed to form a structure for reflection. Between the substrate and the above materials, for example, a transparent film of ruthenium oxide, ITO or the like can be inserted. The formation method can be a conventional technique such as a sputtering method or a vapor deposition method. Further, by making the electrode surface side a eutectic metal such as AuSn or the like, an error-free solder material or the like, it is simplified in the crystal grain bonding step, and it is necessary to use no paste. The formation method can be a conventional technique such as a sputtering method, a vapor deposition method, plating, or printing. By using a metal connection, heat conduction is improved and the heat release characteristics of the light-emitting diode are improved. In the case where the above two functions are combined, it is also suitable to insert the barrier metal or oxide so that the metal does not diffuse. These can be selected by the component structure and the substrate material. (Processing Step of Functional Substrate) Next, the shape of the functional substrate 3 is processed. The processing of the functional substrate 3 is first performed in a V-shaped trench on the surface where the third electrode 6 is not formed. At this time, the inclined surface 3b having the inner side surface on the side of the third electrode 6 having the v-shaped groove and the angle α which is parallel to the surface of the light-emitting surface is formed. Then, from the side of the compound semiconductor layer 2, dicing is performed at predetermined intervals to be wafer-formed. Further, the vertical surface 3 a of the functional substrate 3 is formed by dicing at the time of wafer formation. The method of forming the inclined surface 3 b is not particularly limited, and can be combined with a conventional method such as a wet etching method, a dry etching method, a scribing method, or a laser processing, but it is preferable to use shape controllability. And a highly productive cutting method. The manufacturing yield can be improved by using a cutting method. Further, the method of forming the vertical surface 3a is not particularly limited, and is preferably formed by laser processing, scribing/cracking, or cutting. Manufacturing costs can be reduced by using laser processing, scribing/cracking. That is, at the time of wafer separation, it is not necessary to provide a dicing portion, and since a large number of light-emitting diodes can be manufactured, the manufacturing cost can be reduced. On the other hand, the cutting method has excellent cutting stability. Finally, if necessary, the crushed layer and the dirt are removed by etching using a sulfuric acid/hydrogen peroxide mixed solution or the like. The light-emitting diode 1 is manufactured in this manner. As described above, the light-emitting diode 1 according to the present embodiment includes the compound semiconductor layer 2 including the light-emitting portion 7 having the well layer 17 composed of the composition formula (InjMGam) As (OSX1S1). Further, in the light-emitting diode 1 of the present embodiment, the current diffusion layer 8 is provided on the light-emitting portion 7. Since the current diffusion layer 8 is transparent to the light-emitting wavelength, it can be formed without absorbing the light emitted from the light-emitting portion 7. High output / high efficiency LED II. The functional substrate is excellent in moisture resistance due to stability and corrosion-free material. Therefore, according to the light-emitting diode 1 of the present embodiment, it is possible to provide the light-emitting diode 1 having an emission wavelength of 850 nm or more and having excellent monochromaticity and high output/high efficiency and moisture resistance. Further, when the light-emitting diode 1 of the present embodiment is compared with a transparent substrate-type AlGaAs-based light-emitting diode obtained by a conventional liquid phase epitaxy method, it is possible to provide light emission of about 2 times or more. High efficiency output LED 1 for efficiency. In addition, it also improves the reliability of high temperature and high humidity. -38- 5 201214753 &lt;Light Emitting Diode (Second Embodiment)&gt; The MA and MB drawings are for explaining the pattern of the light-emitting diode according to the second embodiment of the present invention: Fig. 4A The plan view is taken; the i-th BB is a cross-sectional view along the CC: line shown in Fig. 14A (the light guiding layers 1 and 12 are omitted from illustration). The light-emitting diode according to the second embodiment is characterized in that it includes a light-emitting portion 7 having a well layer 17 composed of a compositional formula (InxlGai-xl) As (0SXK1) and a composition formula (Alj^Gai). -xd^In, -Y1P (0SX2 &lt;1, 0 &lt; Y1S1) The active layer 1 of the quantum well structure of the barrier layer 18, and the composition of the active layer 1 1 (AlX3Gai - X3 ) uim-wPCOsxssi The first light guiding layer ι 〇 and the second light guiding layer 12 formed by 'iXYSsi' and the first one of the first light guiding layer 1 〇 and the second light guiding layer 12 interposed therebetween and sandwiching the active layer 11 The cladding layer 9 and the second cladding layer 13; the current diffusion layer 8 is formed on the light-emitting portion 7, and the functional substrate 31 is disposed opposite to the light-emitting portion 7 and contains 90% of the emission wavelength The reflection layer 23 of the above reflectance is bonded to the current diffusion layer 8; and the first cladding layer 9 and the second cladding layer 13 are composed of a composition formula (AlX4Ga, -X4) vs In, - Y3P (0&0&lt;X4&lt;lt;;1 ^ Ο &lt;Υ3&lt;1). In the light-emitting diode of the second embodiment, it is possible to have a reflectance of 90% or more with respect to the light-emitting wavelength, and to have the insulating substrate 3 1 including the reflective layer 23 disposed on the light-emitting portion 7 The light is efficiently taken out from the main light extraction surface. In the example shown in the first and fourth figures, the functional substrate 3 1 201214753 includes the second electrode 21 on the lower surface 8b of the current diffusion layer 8, and the second electrode 21 is covered by the second electrode 21 In this manner, a reflective structure composed of the transparent conductive film 22 and the reflective layer 23 and a layer (substrate) 30 made of tantalum or niobium are laminated. In the light-emitting diode of the second embodiment, the functional substrate 31 preferably contains a layer composed of tantalum or niobium. Since it is a material that is difficult to corrode, moisture resistance will increase. The reflective layer 23 is made of silver (Ag), aluminum (A1), gold (Au) or the like. These materials are high in reflectance, and the light reflectance from the reflective layer 23 can be made 90% or more. The functional substrate 31 can be bonded to the reflective layer 23 by a eutectic metal such as Auln, AuGe &gt; AuSn, or a combination of inexpensive substrates (layers) such as tantalum or niobium. In particular, the Au In bonding temperature is low, and the thermal expansion coefficient is different from that of the light-emitting portion. The most suitable combination of the germanium substrate (tantalum layer) for bonding is the most suitable. From the viewpoint of quality stability, it is also desirable that the functional substrate 31 be such that the current diffusion layer, the reflective metal, and the eutectic metal do not diffuse into each other, for example, by inserting titanium (Ti), tungsten (W), platinum (Pt), or the like. The structure of a layer composed of a high melting point metal. &lt;Light Emitting Diode (Embodiment 3)> Fig. 15 is a view for explaining a pattern of a light-emitting diode according to a third embodiment of the present invention. The light-emitting diode of the third embodiment is characterized in that it includes an illuminating-40-201214753 portion 7, which has a well layer 17 composed of an alternating layer of composition formula (InxiGai-χι) As (0SX1S1) and a composition thereof. (-Y1P (0SX2S1, 0 &lt; Υ1^1) The active layer 1 of the quantum well structure of the barrier layer 18, and the composition of the active layer 1 1 (A1 X 3 G ai - X 3 ) nliM- The first light guiding layer 10 and the second light guiding layer 12 composed of nPCOSXSS1 'CXYSS1) and the first package sandwiching the active layer 11 with the first light guiding layer 10 and the second light guiding layer 12 interposed therebetween The cladding layer 9 and the second cladding layer 13; the current diffusion layer 8 is formed on the light-emitting portion 7, and the functional substrate 51 is disposed opposite to the light-emitting portion 7 and contains 90% or more of the emission wavelength The reflective layer 53 of the reflective layer of the reflectance and the metal substrate 50 are bonded to the current diffusion layer 8; and the first cladding layer 9 and the second cladding layer 13 are composed of a composition formula (AlX4Gai-X4) Υ3 Ιη|- Υ3Ρ(0幺X4S1' 0 &lt; Y3S1 ). In the light-emitting diode of the third embodiment, the point that the functional substrate contains the metal substrate is a structure characteristic of the light-emitting diode of the second embodiment. The metal substrate 50 is highly exothermic, contributes to high-luminance of the light-emitting diode, and can make the life of the light-emitting diode long. From the viewpoint of heat dissipation, the metal substrate 50 is preferably composed of a metal having a thermal conductivity of 130 W/m·? or more. A thermal conductivity of 130 W/m. A metal above Κ, for example, molybdenum (138 W/m . K) or tungsten (174 W/m · K); silver (thermal conductivity = 420 W/m · K ), copper ( Thermal conductivity = 398 W/m · K ), gold (thermal conductivity = 320 W/mK), aluminum (thermal conductivity 41 - 201214753 = 23 6 W/m · K ). As shown in Fig. 15, the compound semiconductor layer 2 has an active layer η, and the light guide layer (not shown) is interposed therebetween to sandwich the first cladding layer (lower cladding layer) 9 and the second package. The coating (upper cladding layer) 13, the current diffusion layer 8 on the lower side of the first cladding layer (lower cladding layer) 9, and the second layer on the upper side of the second cladding layer (upper cladding layer) 1 electrode 5 5 and a contact layer 56 of substantially the same size. The functional substrate 51 is provided on the lower surface 8b of the current diffusion layer 8 with a second electrode 57' and a reflective structure in which the transparent conductive film 52 and the reflective layer 53 are laminated so as to cover the second electrode 57, and The metal substrate 50 is configured such that the bonding surface 50a of the metal substrate 50 is bonded to the surface 5 3 b opposite to the compound semiconductor layer 2 constituting the reflective layer 53 of the reflective structure. The reflective layer 53 is made of a metal such as copper, silver, gold, aluminum, or the like, or the like. These materials are high light reflectance, and the light reflectance from the reflective structure can be made 90% or more. By forming the reflective layer 53, the light from the active layer 11 is reflected by the reflective layer 53 to the front direction f, and the light extraction efficiency in the front direction f can be improved. Thereby, the luminance of the light-emitting diode can be made higher. The reflective layer 53 is preferably a laminated structure composed of Ag, a Ni/Ti barrier layer, and an Au-based eutectic metal (metal for connection) from the side of the transparent conductive film 52. The metal for connection described above has a low electrical resistance and is molten at a low temperature. By using the above-mentioned connecting metal, the thermal stress is not imparted to the compound semiconductor layer 2, and the metal substrate can be connected. The metal for connection is chemically stable and uses an Au-based eutectic metal having a low melting point. The eutectic metal of the above lanthanoid system may, for example, be a eutectic metal (Au-based eutectic metal) of an alloy such as AuSn or AuGe'AuSi. Further, it is preferable to add a metal such as titanium 'chromium or tungsten to the metal for connection. Thereby, a metal such as titanium, chromium or tungsten exhibits a function as a barrier metal, and impurities such as impurities contained in the metal substrate are diffused to the side of the reflective layer 53 to suppress the reaction. The transparent conductive film 52 is formed of an ITO film, an IZO film, or the like. Further, the reflective structure may be composed only of the reflective layer 53. Further, a so-called cold mirror using a refractive index difference of a transparent material such as a titanium oxide film, a multilayer film of a hafnium oxide film or white aluminum oxide, A1N instead of the transparent conductive film 52, or a transparent conductive film 52 may be used. Combined with the reflective layer 53. The metal substrate 50 can be formed of a plurality of metal layers. The structure of the plurality of metal layers is preferably formed by alternately laminating two metal layers, that is, the first metal layer 50A and the second metal layer 5B, as shown in Fig. 15. In particular, the number of layers of the first metal layer 50A and the second metal layer 50B is preferably an odd number in total. In this case, when the second metal layer 50B uses a material having a smaller thermal expansion coefficient than the compound semiconductor layer 2 from the viewpoint of bending or cracking of the metal substrate, the first metal layer 50A preferably uses a compound semiconductor layer. 3 -43- 201214753 The material whose thermal expansion coefficient is large is composed. Since the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, bending or cracking of the metal substrate when the compound semiconductor layer and the metal substrate are bonded can be suppressed, so that the manufacturing yield of the light-emitting diode can be improved. improve. Similarly, when the second metal layer 50B is made of a material having a larger thermal expansion coefficient than the compound semiconductor layer 2, the first metal layer 50A is preferably made of a material having a smaller thermal expansion coefficient than the compound semiconductor layer 2. . Since the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, bending or cracking of the metal substrate when the compound semiconductor layer and the metal substrate are bonded can be suppressed, so that the manufacturing yield of the light-emitting diode can be improved. improve. From the above viewpoints, either of the two metal layers may be used regardless of the first metal layer or the second metal layer. The two metal layers can be used, for example, of silver (coefficient of thermal expansion = 1 8.9 ppm/K), copper (coefficient of thermal expansion = 16.5 ppm/K), gold (coefficient of thermal expansion = 14.2 ppm/Κ), aluminum (coefficient of thermal expansion = 23.1) PPm/K), nickel (coefficient of thermal expansion = 13.4 ppm/K) and the metal layer of any of these alloys are composed of molybdenum (coefficient of thermal expansion = 5.1 ppm/K) and tin (coefficient of thermal expansion = 4.3 ppm) /K), a combination of chromium (coefficient of thermal expansion = 4.9 ppm/K) and a metal layer of any of these alloys. A suitable example is a metal substrate composed of three layers of Cu/Mo/Cu. From the above viewpoints, the same effect can be obtained even with a metal substrate composed of three layers of Mo/Cu/Mo, since the metal substrate composed of Cu/M〇/Cu 3 5 201214753 layer is easily processed. The structure in which the Cu is sandwiched by the high mechanical strength of the Cu is advantageous in that it is easier to cut than the metal substrate composed of the three layers of Mo/Cu/Mo. For example, in the case of a metal substrate composed of three layers of Cu (30 μmη ) / Μ ο (25 μηι) / Cu (30 μηι), the thermal expansion coefficient of the entire metal substrate is 6.1 ppm/K, from Mo ( 25 μηι) / Cu The case of a metal substrate composed of three layers of (70 μm) /Mo (25 μηι) was 5.7 ppm/K. Further, from the viewpoint of heat release, the metal layer constituting the metal substrate is preferably made of a material having a high thermal conductivity. Thereby, the heat dissipation property of the metal substrate is improved, so that the light-emitting diode can be made to emit light with high luminance, and the life of the light-emitting diode can be extended. For example, it is preferable to use silver (thermal conductivity = 420 W/m. K), copper (thermal conductivity = 3 9 8 W/m · K), gold (thermal conductivity = 320 W/m. K ), aluminum (thermal conduction). Coefficient = 236 W/m·K), molybdenum (138 W/m·K), tungsten (174 W/m·K) and alloys of these. More preferably, the metal layer has a coefficient of thermal expansion which is approximately equal to the coefficient of thermal expansion of the compound semiconductor layer. Particularly, the material of the metal layer is preferably a material having a thermal expansion coefficient of a compound semiconductor layer of ±1.5 ppm/K or less. Thereby, the stress caused by the heat of the light-emitting portion when the metal substrate and the compound semiconductor layer are bonded can be reduced, so that cracking of the metal substrate due to heat when the metal substrate and the compound semiconductor layer are connected can be suppressed. Therefore, the manufacturing yield of the light-emitting diode can be improved. The thermal conductivity of the entire metal substrate, for example, a metal substrate composed of three layers of Cu (30 μm) / Mo - 45 - 201214753 (25 μηι) / Cu (30 μηη) becomes 250 W/m·Κ; The case of a metal substrate composed of three layers of (25 pm)/Cu (70 μπι)/Μο (25 μιη) is 220 W/m·Κ. [Examples] Hereinafter, the effects of the present invention will be specifically described using examples. Moreover, the invention is not limited by the embodiments. In the present embodiment, an example of producing a light-emitting diode of the present invention will be specifically described. Further, in the light-emitting diode system obtained in the present embodiment, an infrared light-emitting diode having an active layer composed of a quantum well structure, which is composed of a well layer composed of InGaAs and a barrier layer composed of AlGalnP. In the present embodiment, a compound semiconductor layer grown on a GaAs substrate is bonded to a functional substrate to fabricate a light-emitting diode. Further, for the characteristic evaluation, a light-emitting diode lamp in which a light-emitting diode wafer was mounted on a substrate was produced. (Example 1) Example 1 is an example shown in the embodiment of Fig. 4. In the light-emitting diode system of the first embodiment, a compound semiconductor layer was sequentially laminated on a GaAs substrate made of a Si-doped n-type Ga As single crystal to form a crystal wafer.

GaAs基板係將從（100)面朝（0-1-1 )方向傾斜15° 之面作爲成長面，將載子濃度作成2M 018cm — 3。化合物半 導體層係使用由摻雜Si之GaAs所構成的ti型緩衝層、由 摻雜Si之（Al〇.7GaQ.3) 〇.5In〇.5P所構成的η型接觸層、由 摻雜3丨之（八1〇.70&amp;().3)().5111().5?所構成的11型上部包覆層、 -46- ⑤ 201214753 由（AlG.3Ga〇.7 ) 〇.5In〇.5P所構成的上部導光層、由 In〇.2Ga〇.8As/(Al〇.iGa().9) D.5ln〇.5P 之 3 對所構成的井層 / 障壁層、由（Al〇.3Ga〇.7) ο.5ΐη〇.5Ρ所構成的下部導光層、 由摻雜Mg之（Alo^Gao」）Q.5In().5P所構成的p型下部包 覆層、由（AlQ.5Ga〇.5) Q.5In〇.5P所構成的薄膜之中間層、 及由摻雜Mg之p型GaP所構成的電流擴散層。 於本實施例中，使用減壓有機金屬化學氣相沉積裝置 (MOCVD裝置）’而使化合物半導體層磊晶成長於直徑76 mm、厚度350 μηι之GaAs基板上，形成晶晶晶圓。於使嘉 晶成長層成長之際，ΠΙ族構成元素之原料係使用三甲基鋁 ((CH3)3A1)、三甲基鎵（（CH3)3Ga)及三甲基銦（（CH3) sin)。另外，Mg之摻雜原料能夠使用例如雙環戊二烯基 鎂（bis-(C5H5) 2Mg)。另外，Si之摻雜原料能夠使用例 如二矽烷（Si2H6)。另外，V族構造元素之原料能夠使用 膦（PH3 )、胂（AsH3 )。另外，各層之成長溫度，由P 型GaP所構成的電流擴散層係於7 5 0 °C使其成長。其他之 各層則於7 0 0 °C使其成長。 由GaAs所構成的緩衝層係將載子濃度作成約2xl018 cm—3、 層厚作成約0.5 μιη。接觸層係將載子濃度作成約2x1 018 cm _ 3、層厚作成約4 μηι。上部包覆層係將載子濃度作成約 1 X 1018 cm — 3、層厚作成約0.5 μπι。上部導光層係作成未摻 雜且層厚約50 nm。井層係作成未摻雜且層厚約5 nm之 In〇.2Ga〇.gAs &gt;障壁層係作成未慘雜且層厚約10 nm之 -47- 201214753 (Alt^Gao.9 ) o.Mlno.sP。另外，交替積層3對之井層與障 壁層。下部導光層係作成未摻雜且層厚約50 nm。下部包 覆層係將載子濃度作成約8 X 1 0 17 cm — 3、層厚作成約0.5 μπι。中間層係將載子濃度作成約8 X 1 0 17 cm — 3、層厚作成 約 5 0 nm 〇 由 GaP所構成的電流擴散層係將載子濃度作成約 3xl018cm_3、層厚作成約 ΙΟμιη。 接著，從表面起直到約1 μηι之深度爲’止的區域而硏磨 電流擴散層，進行鏡面加工。 藉由此鏡面加工而將電流擴散層之表面粗糙度（rms ) 作成 0 . 1 8 n m。 另一方面，準備由貼附於上述電流擴散層之已進行鏡 面硏磨之表面的η型GaP所構成的機能性基板。在此貼附 用之機能性基板中，使用使載子濃度成爲約2 X 1 0 17 cm _ 3 的方式來添加S i且面方位作成（1 1 1 )之單晶。另外，機 能性基板之直徑爲76 mm且厚度爲2 5 0 μιτι。此機能性基板 之表面係於使其接合於電流擴散層之前硏磨成鏡面，將表 面之粗糖度（rpm)經加工成0.12nm。 接著，將上述之機能性基板及磊晶晶圓搬入一般之半 導體材料貼附裝置內，將裝置內真空排氣直到3xl(K5Pa 爲止。 接著，在機能性基板及電流擴散層之兩者表面，歷經 3分鐘照射而使電子衝撞中性化之Ar束。其後，於維持真 -48- ⑤ 201214753 空之貼附裝置內，使機能性基板及電流擴散層之表面重 疊’使在各自表面之壓力成爲50 g/cm2的方式來施加載 重’在室溫下接合兩者。進行如此方式而形成接合晶圓。 接著’從上述接合晶圓，藉由氨系蝕刻劑而選擇性地 去除GaAs基板及GaAs緩衝層。接著，利用真空蒸鍍法而 在接觸層之表面，第1電極係使AuGe、Ni合金成爲厚度 0.5 μηι、使Pt成爲厚度0.2 μιη、使Au成爲厚度1 μιη的方 式來成膜。之後，利用一般之光刻手段而實施圖案形成， 第1·電極係形成η型歐姆電極。接著，在去除GaAs基板之 面的光取出面之表面實施粗面化處理。 接著’第2電極係選擇性地去除形成p型歐姆電極之 區域的磊晶層’使電流擴散層露出。在此露出的電流擴散 層之表面上’使AuBe成爲0.2 μπι、使Au成爲1 μηι的方 式來利用真空蒸鍍法而形成ρ型歐姆電極。其後，在450 °C 實施10分鐘熱處理而合金化，形成低電阻之p型及η型歐 姆電極。進一步在機能性基板之背面形成厚度〇2 μιη之 Au，且在22 0 μπι之正方形形成圖案。 接著’使用切割機（dicing cutter)，從機能性基板之背 面’在未形成第3電極之區域，使傾斜面之角度α成爲70。 的同時，使垂直面之厚度成爲80 μπι的方式來進行V字形 之挖溝。接著’使用晶粒切割機，從化合物半導體層側， 以3 5 0 μπι間隔切斷而晶片化。利用硫酸/過氧化氫混合液 以蝕刻去除因晶粒切割所造成的破碎層及污垢，製作實施 201214753 例1之發光二極體。 裝配1 〇〇個發光二極體燈，其係將進行如上述之方式 而製得的實施例1之發光二極體晶片構裝於安裝基板上。 此發光二極體燈，係架設利用晶粒結合劑而支撐（架設）， 利用金線而線結合發光二極體之η型歐姆電極與設置於架 設基板表面之η電極終端，利用金線而線結合ρ型歐姆電 極與ρ電極終端後，利用一般之環氧樹脂進行密封而製得。 將評估此發光二極體（發光二極體燈）之特性的結果 顯示於表7。 如表7所示，將電流流入η型及ρ型歐姆電極間後， 發射出形成波峰波長920 nm之紅外光。於流通順向20微 安培（mA)的電流之際的順向電壓（Vf)，係反映在構成 化合物半導體層之電流擴散層與機能性基板之接合界面的 低電阻及各歐姆電極之良好歐姆特性，而成爲約1.22伏 特。將順向電流作成20 mA之際的發光輸出爲7 mW。再 者，於溫度60 °C、濕度90%之高溫高濕環境下，實施1000 小時之通電試驗（20 mA通電），將測定發光輸出之殘存 率的結果顯示於表7。 將此燈100個，以60°C、90RH%、20 mA，實施高溫 高濕通電試驗。1000小時後之輸出殘存率的平均係100%。 -50- ⑤ 201214753 表7 基板材質 成對數 發光波長 (nm) 發光輸出 (mW) 順向電壓 (V) 信賴性 PO ： % 實施例1 GaP 3 920 7 1.22 100% 實施例2 Si 3 920 6 1.2 99% 實施例3 Cu/Mo/Cu 3 920~ 5.9 1.2 100% 實施例4 GaP 3 870 6.8 1.3 100% 實施例5 Si 3 870 6.1 1.3 100% 實施例6 GaP 3 960 6.5 1.18 99% 實施例7 Si 3 960~ 5.3 1.18 99% 實施例8 GaP 3 985 5 1.16 99% 實施例9 Si 3 985~~~ 3.8 1.15 99% 實施例10 GaP 5 920 7 1.24 99% 比較例 AlGaAs 920 2 1.2 86%The GaAs substrate was a growth surface which was inclined by 15° from the (100) plane toward the (0-1-1) direction, and the carrier concentration was made 2M 018 cm-3. The compound semiconductor layer is a ti-type buffer layer composed of GaAs doped with GaAs, an n-type contact layer composed of Si-doped (Al〇.7GaQ.3) 〇.5In〇.5P, and doped with 3丨之(八1〇.70&amp;().3)().5111().5? The 11-type upper cladding layer, -46- 5 201214753 by (AlG.3Ga〇.7) 〇.5In上部.5P consists of the upper light guiding layer, the well layer/barrier layer composed of 3 pairs of In〇.2Ga〇.8As/(Al〇.iGa().9) D.5ln〇.5P, Al〇.3Ga〇.7) ο.5ΐη〇.5Ρ consists of a lower light guiding layer, a p-type lower cladding layer composed of Mg-doped (Alo^Gao)) Q.5In().5P, An intermediate layer of a film composed of (AlQ.5Ga〇.5) Q.5In〇.5P and a current diffusion layer composed of Mg-doped p-type GaP. In the present embodiment, a compound semiconductor layer was epitaxially grown on a GaAs substrate having a diameter of 76 mm and a thickness of 350 μm using a reduced pressure organometallic chemical vapor deposition apparatus (MOCVD apparatus) to form a crystal wafer. At the time of the growth of Jiajing's growth layer, the raw materials of the Dai people use trimethylaluminum ((CH3)3A1), trimethylgallium ((CH3)3Ga) and trimethylindium ((CH3) sin). . Further, as the doping raw material of Mg, for example, biscyclopentadienyl magnesium (bis-(C5H5) 2Mg) can be used. Further, as the doping material for Si, for example, dioxane (Si2H6) can be used. Further, as a raw material of the group V structural element, phosphine (PH3) or hydrazine (AsH3) can be used. Further, the growth temperature of each layer was grown by a current diffusion layer composed of P-type GaP at 750 °C. The other layers are grown at 700 °C. The buffer layer composed of GaAs has a carrier concentration of about 2 x 1018 cm-3 and a layer thickness of about 0.5 μm. The contact layer has a carrier concentration of about 2 x 1 018 cm _ 3 and a layer thickness of about 4 μm. The upper cladding layer has a carrier concentration of about 1 X 1018 cm -3 and a layer thickness of about 0.5 μm. The upper light guiding layer is made undoped and has a layer thickness of about 50 nm. The well layer is made of In〇.2Ga〇.gAs &gt; unbonded and layer thickness about 5 nm. The barrier layer is made into a non-difficult layer with a layer thickness of about 10 nm-47-201214753 (Alt^Gao.9) o. Mlno.sP. In addition, three layers of the well layer and the barrier layer are alternately laminated. The lower light guiding layer is made undoped and has a layer thickness of about 50 nm. The lower cladding layer has a carrier concentration of about 8 X 1 0 17 cm -3 and a layer thickness of about 0.5 μm. The intermediate layer has a carrier concentration of about 8 X 1 0 17 cm -3 and a layer thickness of about 50 nm. The current diffusion layer composed of GaP has a carrier concentration of about 3 x 1018 cm 3 and a layer thickness of about x μηη. Next, the current diffusion layer was honed from the surface up to a region where the depth was about 1 μm, and mirror-finished. The surface roughness (rms) of the current diffusion layer was made to be 0.18 n m by mirror processing. On the other hand, a functional substrate composed of n-type GaP attached to the surface of the current diffusion layer which has been subjected to mirror honing is prepared. In the functional substrate to which this is attached, a single crystal in which S i is added and the plane orientation is (1 1 1 ) is used so that the carrier concentration becomes about 2 × 10 17 cm _ 3 . In addition, the functional substrate has a diameter of 76 mm and a thickness of 2 5 0 μm. The surface of the functional substrate was honed to a mirror surface before being bonded to the current diffusion layer, and the surface roughness (rpm) of the surface was processed to 0.12 nm. Then, the above-mentioned functional substrate and epitaxial wafer are carried into a general semiconductor material attaching device, and the inside of the device is evacuated to 3xl (K5Pa. Next, on both the functional substrate and the current diffusion layer, The electron beam collides with the neutralized Ar beam after 3 minutes of irradiation. Thereafter, the surface of the functional substrate and the current diffusion layer are overlapped in the mounting device of the true-48-5 201214753 empty space. The pressure is 50 g/cm 2 to apply the load to 'bond both at room temperature. The bonding wafer is formed in this manner. Then 'selectively remove the GaAs substrate from the bonded wafer by the ammonia-based etchant And a GaAs buffer layer. Then, on the surface of the contact layer by vacuum deposition, the first electrode is formed such that AuGe and Ni alloy have a thickness of 0.5 μm, Pt has a thickness of 0.2 μm, and Au has a thickness of 1 μm. After that, pattern formation is performed by a general photolithography method, and an n-type ohmic electrode is formed on the first electrode. Then, a rough surface is formed on the surface of the light extraction surface on the surface on which the GaAs substrate is removed. Then, the 'second electrode system selectively removes the epitaxial layer in the region where the p-type ohmic electrode is formed' to expose the current diffusion layer. On the surface of the exposed current diffusion layer, 'AuBe becomes 0.2 μm, and Au is made. A p-type ohmic electrode was formed by a vacuum deposition method in a manner of 1 μm, and then alloyed at 450 ° C for 10 minutes to form a low-resistance p-type and n-type ohmic electrode. Further on the functional substrate On the back surface, Au having a thickness of μ2 μηη is formed, and a pattern is formed in a square of 22 0 μm. Then 'using a dicing cutter, the angle of the inclined surface is made from the back surface of the functional substrate in the region where the third electrode is not formed. When α is 70, the V-shaped groove is formed so that the thickness of the vertical surface is 80 μm. Then, using a die cutter, the compound semiconductor layer is cut at intervals of 305 μm and wafer-formed. The sulphuric acid/hydrogen peroxide mixture was used to etch away the fracture layer and the dirt caused by the grain cutting, and the light-emitting diode of the example of 201214753 was fabricated. The photodiode lamp is mounted on the mounting substrate by the light-emitting diode wafer of the first embodiment obtained as described above. The light-emitting diode lamp is supported by a grain bonding agent ( Erecting, using a gold wire and a line combining the n-type ohmic electrode of the light-emitting diode and the n-electrode terminal disposed on the surface of the erected substrate, and bonding the p-type ohmic electrode and the ρ-electrode terminal by a gold wire, using a general epoxy The resin was sealed and produced. The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are shown in Table 7. As shown in Table 7, after a current was flown between the n-type and p-type ohmic electrodes, the emission was performed. Infrared light with a peak wavelength of 920 nm is formed. The forward voltage (Vf) at the time of the current flowing in the forward direction of 20 microamperes (mA) is reflected in the low resistance of the junction interface between the current diffusion layer constituting the compound semiconductor layer and the functional substrate, and the good ohmic of each ohmic electrode. Characteristic, and become about 1.22 volts. The luminous output when the forward current was made to 20 mA was 7 mW. Further, in a high-temperature and high-humidity environment at a temperature of 60 ° C and a humidity of 90%, a 1000-hour electrification test (20 mA energization) was carried out, and the results of measuring the residual ratio of the luminescence output are shown in Table 7. One hundred of these lamps were subjected to a high-temperature and high-humidity electric current test at 60 ° C, 90 RH%, and 20 mA. The average output residual rate after 1000 hours was 100%. -50- 5 201214753 Table 7 Substrate material Logarithmic emission wavelength (nm) Luminous output (mW) Forward voltage (V) Reliability PO: % Example 1 GaP 3 920 7 1.22 100% Example 2 Si 3 920 6 1.2 99% Example 3 Cu/Mo/Cu 3 920~ 5.9 1.2 100% Example 4 GaP 3 870 6.8 1.3 100% Example 5 Si 3 870 6.1 1.3 100% Example 6 GaP 3 960 6.5 1.18 99% Example 7 Si 3 960~ 5.3 1.18 99% Example 8 GaP 3 985 5 1.16 99% Example 9 Si 3 985~~~ 3.8 1.15 99% Example 10 GaP 5 920 7 1.24 99% Comparative Example AlGaAs 920 2 1.2 86%

測定電流=20 mA 信賴性（％ ) : 60°C ·90ΙΙΗ%/20 mA通電、1000小時後之 輸出殘存率 (實施例2 ) 實施例2係顯示於第1 4A及1 4B圖之第2實施形態的 實施例。 實施例2之發光二極體係組合反射層與機能性基板之 情形。其他之發光部的形成係與實施例1相同。尙且，下 部導光層10與上部導光層12係省略圖示。 在電流擴散層8之表面，從光取出面邊緣起成爲50 μιη 的方式來以等間隔配置8個電極（第2電極）21，其係以 厚度0.2 μιη且20 μηιφ之點而形成由AuBe/Au合金所構成。 接著，利用濺鍍法，以0.4 μιη之厚度而形成透明導電 膜的ΙΤΟ膜’22。進一步以0.2 μιη/Ο.Ι μηα/1 μιη之厚度而 形成由銀合金/Ti/Au而成之層23，作成反射面23。 另一方面，在矽基板（機能性基板）31之表面，以0.1 μιη /0·5 μηι /0.3 μηι之厚度而形成由Ti/Au/In而成之層 -51- 201214753 32。在矽基板31之背面，以0.1 μιη /0.5 μπι之厚度而形成 由Ti/Au而成之層33。重疊該發光二極體晶圓側之Au與 矽基板側之I η表面，於3 2 0 °C加熱且5 0 0 g / c m2加壓’將機 能性基板接合於發光二極體晶圓。 去除GaAs基板，在接觸曆16之表面形成由AuGe/Au 而成之直徑1〇〇 μπι且厚度3 μπι的歐姆電極（第1電極） 25，於420 °C，進行5分鐘熱處理而合金化處理ρ、η歐姆 電極。 接著，粗面化處理接觸層16之表面。 去除用以分離成晶片之預定切斷部分之半導體層與反 射層、共晶金屬，在矽基板之背面電極上，形成0.3 μπι/1 μιη/0.1 μπι之Ti/AuSn/Au。利用切割機，以350 μπι間距而 切斷成正方形。 將評估此發光二極體（發光二極體燈）之特性的結果 顯示於表7。 如表7所示，將電流流入上面及下面之電極間後，發 射出形成波峰波長920 rim之紅外光》於流通順向20微安 培（m A )的電流之際的順向電壓（Vf)，係反映在構成化 合物半導體層之電流擴散層與機能性基板之接合界面的低 電阻及各歐姆電極之良好歐姆特性，而成爲約1.20伏特 (V )。將順向電流作成20 mA之際的發光輸出爲約6 mW。 再者，於溫度60°C、濕度90%之高溫高濕環境下，實施1〇〇〇 小時之通電試驗（20 mA通電），將測定發光輸出之殘存 ⑧ 201214753 率的結果顯示於表7。 與實施例1同樣地，將此燈1 0 0個，以6 0 °C、9 0 R Η %、 20 mA ’實施高溫高濕通電試驗。1 000小時後之輸出殘存 率的平均係9 9 %。 (實施例3 ) 實施例3之發光二極體係第3實施形態之實施例，其 係將含有反射層與金屬基.板之機能性基板接合於電流擴散 層之構造。參閱第15圖而說明實施例3之發光二極體。 首先，製作金屬基板。準備2片約略平板狀且厚度1〇 μιτι之Cu板、與1片約略平板狀且厚度75 μιη之Mo板， 將Mo板插入2片Cu板之間而重疊配置此等金屬板，將該 基板配置於加壓裝置內，在高溫下，對於此等金屬板，將 載重施加於夾住此等金屬板之方向。藉此而製作由Cu ( 1 0 μπ〇/Μο(75 pm)/Cu( 10 μιη)之3層所構成的金屬基板。 化合物半導體層係於緩衝層與接觸層之間，由摻雜Si 之（Al〇.5Ga〇.5) 〇.5ΐη〇.5Ρ所構成，除了形成層厚爲〇·5 μπι 之蝕刻停止層之點以外，以與實施例1之條件相同的條件 而形成。 在電流擴散層8之面8b上，由在厚度〇.4 μm之AuBe 上積層厚度0.2 μιη的Au而成，於俯視時爲20 μπαφ之圓 形，以60 μηι之間隔而形成第2電極57。 接著，將透明導電膜之IT Ο膜52覆蓋第2電極57的 方式來利用濺鍍法而以0.8 μηι之厚度形成。 -53- 201214753 接著，在ITO膜52上，利用蒸鍍法而成膜0.7 μπι之 由銀（Ag)合金所構成的膜之後，成膜0.5 μιη之由鎳（Ni) /鈦（Ti )所構成的膜及1 μηι之由金（Au )所構成的膜， 而形成反射層53。 接著，使在化合物半導體層之電流擴散層8上形成ITO 膜52及反射膜53之構造物、與金屬基板對向而重疊的方 式來配置且搬入減壓裝置內，於400°C加熱之狀態下，以 500 kg重之載重接合此等而形成接合構造物。 接著，從接合構造物，藉由氨系蝕刻劑而選擇性地去 除爲化合物半導體層之成長基板的Ga As基板與緩衝層，進 一步利用鹽酸系蝕刻劑而選擇性地去除蝕刻停止層。 接著，利用真空蒸鍍法而在接觸層上成膜厚度0.15 μϊη 之AuGe後，成膜厚度0.05 μιη之Ni，進一步成膜厚度1 μηι 之Au而形成第1電極用導電膜。接著，利用光刻’將電極 用導電膜圖案化成俯視圓形而製得直徑1 00 pm且厚度3 μιη之第1電極55。 接著，將第1電極作爲遮罩，藉由氨系蝕刻劑於接觸 層中，以蝕刻去除第1電極之下以外的部分而形成接觸層 56 » 去除用以分離成晶片之預定切斷部分之半導體層與反 射層、共晶金屬，利用雷射切割金屬基板’以3 5 0 間距 而切斷成正方形。 將評估此發光二極體（發光二極體燈）之特性的結果 -54- ⑤ 201214753 顯示於表7。 如表7所示，將電流流入η型及p型歐姆電極間後， 發射出形成波峰波長920 nm之紅外光。於流通順向20微 安培（m A )的電流之際的順向電壓（V F )，係反映在構成 化合物半導體層之電流擴散層與機能性基板之接合界面的 低電阻及各歐姆電極之良好歐姆特性，而成爲1.2伏特。 將順向電流作成2 0 m A之際的發光輸出爲5.9 mW。 將此燈60個，以60°C、90RH%、20mA，實施高溫高 濕通電試驗。 1 000小時後之輸出殘存率的平均係100%。 (實施例4 ) 實施例4之發光二極體係第1實施形態之實施例，爲 了使發光波峰波長成爲870 nm，除了使井層之In組成 X 1 =0.1 2以外，以與實施例1相同條件而製得。 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長8 7 0 nm之紅外光，發光 輸出（)、順向電壓（VF )、輸出殘存率之平均分別爲 6.8 mW、1 .3 1 V、1 00% 〇 (實施例5 ) 實施例5之發光二極體係第2實施形態之實施例，爲 了使發光波峰波長成爲870 nm，除了使井層之In組成 X 1 =0 · 1 2以外’以與實施例2相同條件而製得。 評估此發光二極體（發光二極輝燈）之特性的結果係 -55- 201214753 如表7所示，發射出形成波峰波長8 7 0 nm之紅外光，發光 輸出（P〇)、順向電壓（VF)、輸出殘存率之平均分別爲 6 · 1 mW、1 · 3 V、1 00 %。 (實施例6 ) 實施例6之發光二極體係第1實施形態之實施例，爲 了使發光波峰波長成爲 960 ηιη，除了使井層之In組成 Xl=0_25以外，以與實施例1相同條件而製得。 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長960 nm之紅外光，發光 輸出（P〇)、順向電壓（VF)、輸出殘存率之平均分別爲 6.5 mW、1 .2 V、99%。 (實施例7 ) 實施例7之發光二極體係第2實施形態之實施例，爲 了使發光波峰波長成爲960 nm，除了使井層之In組成 XI =0.25以外’以與實施例2相同條件而製得》 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長96〇nm之紅外光，發光 輸出（Pq)、順向電壓（Vf)、輸出殘存率之平均分別爲 5 · 3 mW、1 . 2 V、99 % 〇 (實施例8 ) 實施例8之發光二極體係第1實施形態之實施例，爲 了使發光波峰波長成爲98 5 nm，除了使井層之In組成 XI =0.3以外，以與實施例1相同條件而製得。 •56- ⑤ 201214753 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長9 8 5 nm之紅外光，發光 輸出（P〇 )、順向電壓（VF )、輸出殘存率之平均分別爲 5.0 mW、1 ·2 V、99%。 (實施例9) 實施例9之發光二極體係第2實施形態之實施例，爲 了使發光波峰波長成爲9 8 5 nm，除了使井層之In組成 X 1 =0.3以外，以與實施例2相同條件而製得。 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長9 8 5 nm之紅外光，發光 輸出（P〇 )、順向電壓（VF )、輸出殘存率之平均分別爲 3.8 mW、1 ·2 V、99%。 (實施例1 〇 ) 實施例10之發光二極體係第1實施形態之實施例，除 了將障壁層未摻雜下之層厚作成約lOnm之（Al〇. o.55InQ.45P，另外，交替積層5對井層與障壁層以外，以與 實施例1相同條件而製得。 評估此發光二極體（發光二極體燈）之特性的結果係 如表7所示，發射出形成波峰波長92 0 nm之紅.外光，發光 輸出（P〇)、順向電壓（VF)、輸出殘存率之平均分別爲 7.0 mW、1.24 V、99%。 (比較例1 ) 比較例1之發光二極體係利用習知技術之磊晶法而形 -57- 201214753 成。變更成在GaAs基板上具有將AU.cnGao.99As作爲發光 層之雙異質構造發光部的發光二極體者。 具體而言，比較例1之發光二極體的製作係在η型之 (100)面的GaAs單晶基板上，使界面組成成爲50 μηι之 Al〇.2Ga〇.8As 之 η 型上部包覆層、20 μπι 之由 Al〇.〇3Ga〇.97As 所構成的摻雜Si之發光層、2〇 μηι之由AlnGao.gAs所構 成的P型下部包覆層、60 μηι之對發光波長爲透明之由 A1 〇. 2 5 G a 〇. 7 5 A s所構成的ρ型厚膜層的方式來利用液相磊晶 方法所製得。於此磊晶成長後，去除GaAs基板。接著，在 η型AlGaAs上部包覆層之表面形成直徑1 〇〇 μηι之η型歐 姆電極。 接著，在Ρ型AlGa As厚膜層之背面，以80 μιη間隔 形成直徑20 μηι之ρ型歐姆電極，於420 °C，進行5分鐘熱 處理’合金化處理ρ、η歐姆電極。接著，藉由切割機而以 3 5 0 nm間隔切斷後，蝕刻去除破碎層，及爲了高輸出化而 粗面化處理表面以製得比較例1之發光二極體晶片。 將評估構裝比較例1之發光二極體的發光二極體燈之 特性的結果顯示於表7。 如表7所示，將電流流入n型及ρ型歐姆電極間後， 發射出形成波峰波長920 urn之紅外光。另外，於流通順向 20微安培（mA)的電流之際的順向電壓（Vf)係成爲約 1 · 2伏特（V )。另外，將順向電流作成2 0 m A之際的發光 輸出爲2 mW。再者，與本發明之實施例作一比較，針對比 ⑧ 201214753 較例1中任一種試樣的輸出皆低。再者，於溫度6(TC、濕 度90%之高溫高濕環境下，實施500小時之通電試驗（20 mA通電），將測定發光輸出之殘存率的結果顯不於表1。 而認爲輸出降低之原因係由於AlGaAs表面之腐蝕而使光 之吸收增加所致。 另外，與實施例同樣地，將此燈1〇〇個，以60°C、90RH %、20 mA，實施高溫高濕通電試驗。與實驗開始時作一比 較，500小時後之輸出殘存率的平均也降低14% ;與只不 過降低1 %以內之實施例作一比較，則大幅降低。 〔產業上利用之可能性〕 本發明之發光二極體能夠作爲高輸出/高效率且發射 850 nm以上、尤其900 nm以上之發光波峰波長的紅外光 的發光二極體製品而利用。 【圖式簡單說明】 第1圖係使用本發明之一實施形態的發光二極體之發 光二極體燈的平面圖。 第2圖係使用本發明之一實施形態的發光二極體之發 光二極體燈之沿著顯示於第1圖中之 A-A’線的剖面示意 圖。 第3圖係使用本發明之一實施形態的發光二極體之平 面圖。 第4圖係本發明之一實施形態的發光二極體之沿著顯 示於第3圖中之B-B’線的剖面示意圖。 第5圖係用以說明構成本發明之一實施形態的發光二 201214753 極體之活性層的圖形。 第6圖係顯示本發明之一實施形態的發光二極體之井 層的層厚與發光波峰波長之相關的圖形。 第7圖係顯示本發明之一實施形態的發光二極體之井 層的In組成（XI)及井層厚與發光波峰波長之對應的圖形。 第8圖係顯示本發明之一實施形態的發光二極體之井 層的In組成（XI)與發光波峰波長及其發光輸出之相關的 圖形。 第9圖係顯示本發明之一實施形態的發光二極體之井 層及障壁層之成對數與發光輸出之相關的圖形。 第10圖係顯示本發明之一實施形態的發光二極體之 障壁層的In組成（Y1)與發光輸出之相關的圖形。 第11圖係顯示相對於本發明之一實施形態的發光二 極體之順向電流與發光輸出相關之井層及障壁層的成對數 之依存性的圖形。 第1 2圖係用於本發明之一實施形態的發光二極體之 磊晶晶圆的剖面示意圖。 第1 3圖係用於本發明之一實施形態的發光二極體之 接合晶圆的剖面示意圖。 第1 4 A圖係本發明之一實施形態的發光二極體之平面 圖。 第14B圖係沿著顯示於第14A圖中之C-C’線的剖面示 意圖。 -60- ⑧ 201214753 第1 5圖係本發明之其他實施形態的發光二極體之剖 面示意圖。 【主要元件符號說明】 1 發光二極體 2 化合物半導體層 3 機能性基板 3a 垂直面 3b 傾斜面 4 η型歐姆電極 ( 第 1電極） 5 Ρ型歐姆電極 ( 第 2電極） 6 第3電極 7 發光部 8 電流擴散層 9 下部包覆層（ 第 1 包覆層） 10 下部導光層 11 活性層 12 上部導光層 13 上部包覆層（ 第 2 包覆層） 14 G a A s基板 15 緩衝層 16 接觸層 17 井層. 18 障壁層 20 發光二極體 -61 - 電極 透明導電膜 反射面 接合電極 矽基板 機能性基板 發光二極體燈 安裝基板 η電極端子 Ρ電極端子 金線 密封樹脂 金屬基板 機能性基板 透明導電膜 反射層 第1電極 接觸層 第2電極 傾斜面與平行於發光面之面的夾角 ⑤Measurement current = 20 mA Reliability (%): 60 ° C · 90ΙΙΗ% / 20 mA energization, output residual rate after 1000 hours (Example 2) Example 2 is shown in the first picture of 1 4A and 1 4B An embodiment of the embodiment. The case where the light-emitting diode system of Embodiment 2 is combined with a reflective layer and a functional substrate. The formation of the other light-emitting portions is the same as in the first embodiment. Further, the lower light guiding layer 10 and the upper light guiding layer 12 are omitted from illustration. On the surface of the current diffusion layer 8, eight electrodes (second electrode) 21 are arranged at equal intervals from the edge of the light extraction surface, and are formed at a thickness of 0.2 μm and 20 μηιφ by AuBe/. Made of Au alloy. Next, a tantalum film '22 of a transparent conductive film was formed by a sputtering method at a thickness of 0.4 μm. Further, a layer 23 made of a silver alloy/Ti/Au was formed to a thickness of 0.2 μm / Ο. Ι μηα / 1 μηη to form a reflecting surface 23. On the other hand, on the surface of the tantalum substrate (functional substrate) 31, a layer made of Ti/Au/In is formed to a thickness of 0.1 μm / 0 · 5 μη / 0.3 μηι -51 - 201214753 32. On the back surface of the ruthenium substrate 31, a layer 33 made of Ti/Au is formed to a thickness of 0.1 μm / 0.5 μm. Overlay the surface of the anode and the substrate of the light-emitting diode on the surface of the I η substrate, heat at 320 ° C and pressurize at 5000 g / c m 2 'bond the functional substrate to the light-emitting diode wafer . The GaAs substrate is removed, and an ohmic electrode (first electrode) 25 having a diameter of 1 μm and a thickness of 3 μm is formed on the surface of the contact layer 16 and heat-treated at 420 ° C for 5 minutes to be alloyed. ρ, η ohmic electrodes. Next, the surface of the contact layer 16 is roughened. The semiconductor layer and the reflective layer and the eutectic metal for separating into a predetermined cut portion of the wafer are removed, and Ti/AuSn/Au of 0.3 μm / 1 μm / 0.1 μm is formed on the back electrode of the tantalum substrate. Using a cutter, cut into squares at a pitch of 350 μπι. The results of evaluating the characteristics of this light-emitting diode (light-emitting diode lamp) are shown in Table 7. As shown in Table 7, the forward voltage (Vf) of the infrared light that forms the peak wavelength of 920 rim is transmitted at a current of 20 microamperes (m A ) in the forward direction after the current flows between the upper and lower electrodes. It is reflected in the low resistance of the joint interface between the current diffusion layer constituting the compound semiconductor layer and the functional substrate and the good ohmic characteristics of each ohmic electrode, and is about 1.20 volts (V). The luminous output when the forward current was made to 20 mA was about 6 mW. Further, in a high-temperature and high-humidity environment at a temperature of 60 ° C and a humidity of 90%, an energization test for 1 hour (20 mA energization) was carried out, and the results of measuring the residual value of the light-emitting output 8 201214753 are shown in Table 7. In the same manner as in the first embodiment, 1000 lamps were used, and a high-temperature and high-humidity electric current test was performed at 60 °C, 90 R Η %, and 20 mA '. The average output residual rate after 1 000 hours is 99%. (Example 3) An embodiment of the third embodiment of the light-emitting diode system of the third embodiment is a structure in which a functional substrate including a reflective layer and a metal substrate is bonded to a current diffusion layer. The light-emitting diode of Example 3 will be described with reference to Fig. 15. First, a metal substrate is produced. Two Cu plates having a thickness of about 1 〇μιτι and two Mo plates having a thickness of about 75 μm were prepared, and a Mo plate was inserted between two Cu plates to overlap the metal plates. Disposed in the pressurizing device, at a high temperature, for these metal plates, a load is applied to the direction in which the metal plates are sandwiched. Thereby, a metal substrate composed of three layers of Cu (10 μπ〇/Μο(75 pm)/Cu(10 μιη) was produced. The compound semiconductor layer was between the buffer layer and the contact layer, and was doped with Si. (Al〇.5Ga〇.5) 〇.5ΐη〇.5Ρ is formed by the same conditions as those of the first embodiment except that the etching stop layer having a layer thickness of 〇·5 μm is formed. The surface 8b of the diffusion layer 8 is made of Au having a thickness of 0.2 μm on AuBe having a thickness of 〇4 μm, and has a circular shape of 20 μπαφ in plan view, and the second electrode 57 is formed at intervals of 60 μm. The IT film 52 of the transparent conductive film covers the second electrode 57 and is formed by a sputtering method to a thickness of 0.8 μm. -53 - 201214753 Next, a film is formed on the ITO film 52 by vapor deposition. After a film made of a silver (Ag) alloy of μπι, a film of 0.5 μm of nickel (Ni)/titanium (Ti) and a film of gold (Au) of 1 μm are formed to form a reflection. Layer 53. Next, a structure in which the ITO film 52 and the reflection film 53 are formed on the current diffusion layer 8 of the compound semiconductor layer, and The substrate is placed in a manner to overlap and overlap, and is carried into a decompression device, and is joined by a load of 500 kg in a state of being heated at 400 ° C to form a joined structure. Next, the bonded structure is used. An ammonia-based etchant selectively removes the Ga As substrate and the buffer layer which are the growth substrate of the compound semiconductor layer, and further selectively removes the etch stop layer by a hydrochloric acid-based etchant. Next, the contact layer is formed by vacuum evaporation. After forming AuGe having a thickness of 0.15 μϊη, a film thickness of 0.05 μm is formed, and a thickness of 1 μm of Au is further formed to form a conductive film for the first electrode. Next, the conductive film for the electrode is patterned into a plan view by photolithography. The first electrode 55 having a diameter of 1 00 pm and a thickness of 3 μm is formed in a shape. Next, the first electrode is used as a mask, and an ammonia-based etchant is used in the contact layer to remove portions other than the first electrode. Forming the contact layer 56 » removing the semiconductor layer and the reflective layer and the eutectic metal for separating into a predetermined cut portion of the wafer, and cutting the metal substrate by laser cutting to a square at a pitch of 350° The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) -54- 5 201214753 are shown in Table 7. As shown in Table 7, after the current flows between the n-type and p-type ohmic electrodes, the emission is performed. Infrared light having a peak wavelength of 920 nm is formed. The forward voltage (VF) at a current of 20 microamperes (m A ) in the forward direction is reflected in the junction of the current diffusion layer constituting the compound semiconductor layer and the functional substrate. The low resistance of the interface and the good ohmic characteristics of each ohmic electrode become 1.2 volts. The luminous output when the forward current was made to 20 m A was 5.9 mW. 60 lamps were used, and a high-temperature and high-humidity electric current test was carried out at 60 ° C, 90 RH %, and 20 mA. The average output residual rate after 1 000 hours is 100%. (Example 4) Example of the first embodiment of the light-emitting diode system of the fourth embodiment, in order to make the emission peak wavelength 870 nm, the same as in the first embodiment except that the In composition of the well layer is X 1 = 0.1 2 Made by conditions. The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are as shown in Table 7, and the infrared light having a peak wavelength of 870 nm is emitted, and the light-emitting output (), forward voltage (VF), and output are output. The average of the residual ratios is 6.8 mW, 1.31 V, and 100% 〇 (Example 5) The embodiment of the second embodiment of the light-emitting diode system of Example 5, in order to make the luminescence peak wavelength 870 nm, The In composition of the well layer was made to have the same conditions as in Example 2 except that X 1 = 0 · 1 2 . The result of evaluating the characteristics of the light-emitting diode (light-emitting diode) is -55-201214753. As shown in Table 7, the infrared light having a peak wavelength of 870 nm is emitted, and the light output (P〇) and the forward direction are emitted. The average voltage (VF) and output residual ratio are 6 · 1 mW, 1 · 3 V, and 100 %, respectively. (Example 6) In the embodiment of the first embodiment of the light-emitting diode system of the sixth embodiment, in order to make the emission peak wavelength 960 ηιη, the same conditions as in the first embodiment were carried out except that the In composition of the well layer was X1 = 0_25. be made of. The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are as shown in Table 7, and the infrared light having a peak wavelength of 960 nm is emitted, and the light-emitting output (P〇), the forward voltage (VF), and the output are output. The average residual rate is 6.5 mW, 1.2 V, and 99%, respectively. (Example 7) Example of the second embodiment of the light-emitting diode system of the seventh embodiment, in order to make the emission peak wavelength 960 nm, except that the In composition of the well layer is XI = 0.25, the same conditions as in the second embodiment are employed. The results obtained by evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are as shown in Table 7, and the infrared light having a peak wavelength of 96 〇 nm is emitted, and the light-emitting output (Pq) and the forward voltage (Vf) are emitted. The average of the output residual ratios is 5 · 3 mW, 1.2 V, and 99 %. (Example 8) The embodiment of the first embodiment of the light-emitting diode system of Example 8 is such that the emission peak wavelength is 98. 5 nm was obtained under the same conditions as in Example 1 except that the In composition of the well layer was XI = 0.3. • 56- 5 201214753 The results of evaluating the characteristics of this light-emitting diode (light-emitting diode lamp) are shown in Table 7. The infrared light with a peak wavelength of 985 nm is emitted, and the light output (P〇) and The average of the voltage (VF) and the output residual ratio are 5.0 mW, 1 · 2 V, and 99%, respectively. (Example 9) Example of the second embodiment of the light-emitting diode system of the ninth embodiment, in order to make the luminescence peak wavelength of 985 nm, except that the In composition of the well layer is X 1 = 0.3, Made under the same conditions. The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are as shown in Table 7, and the infrared light having a peak wavelength of 985 nm is emitted, and the light-emitting output (P〇) and the forward voltage (VF) are emitted. The average output residual rate is 3.8 mW, 1 · 2 V, and 99%, respectively. (Example 1) Example of the first embodiment of the light-emitting diode system of Example 10, except that the layer thickness of the barrier layer undoped was made to be about 1 nm (Al〇.o.55InQ.45P, and alternately The laminate 5 was prepared in the same manner as in Example 1 except for the well layer and the barrier layer. The results of evaluating the characteristics of the light-emitting diode (light-emitting diode lamp) are shown in Table 7, and the peak wavelength was emitted. 92 0 nm red. External light, luminous output (P〇), forward voltage (VF), and output residual ratio were 7.0 mW, 1.24 V, and 99%, respectively. (Comparative Example 1) Comparative Example 1 The polar system is changed to a light-emitting diode having a double heterostructure light-emitting portion having AU.cnGao.99As as a light-emitting layer on a GaAs substrate by an epitaxial method of a conventional technique. The light-emitting diode of Comparative Example 1 was fabricated on an η-type (100)-faced GaAs single crystal substrate, and the interface composition was changed to an n-type upper cladding layer of 50 μm of Al〇.2Ga〇.8As, 20 The γ-doped luminescent layer composed of Al〇.〇3Ga〇.97As and 2〇μηι consist of AlnGao.gAs The P-type lower cladding layer and the 60 μm layer are transparent to the p-type thick film layer composed of A1 〇. 2 5 G a 〇. 7 5 A s by a liquid phase epitaxy method. After the epitaxial growth, the GaAs substrate is removed. Then, an n-type ohmic electrode having a diameter of 1 μm is formed on the surface of the upper cladding layer of the n-type AlGaAs. Next, on the back side of the thick AlGa As thick film layer, A p-type ohmic electrode having a diameter of 20 μm was formed at intervals of 80 μm, and heat-treated at 420 ° C for 5 minutes to alloy the ρ and η ohm electrodes. Then, after cutting at a spacing of 350 nm by a cutter, etching was performed. The fracture layer was removed, and the surface was roughened to increase the output to obtain a light-emitting diode wafer of Comparative Example 1. The results of evaluating the characteristics of the light-emitting diode lamp of the light-emitting diode of Comparative Example 1 were evaluated. It is shown in Table 7. As shown in Table 7, after flowing a current between the n-type and p-type ohmic electrodes, infrared light having a peak wavelength of 920 urn is emitted, and a current of 20 microamperes (mA) in the forward direction is emitted. The forward voltage (Vf) is about 1.25 volts (V). Further, the luminous output when the forward current was made to 20 m A was 2 mW. Further, compared with the embodiment of the present invention, the output of any of the samples of Example 1 was lower than that of 8 201214753. Further, in a high-temperature and high-humidity environment of temperature 6 (TC, humidity: 90%), a 500-hour electrification test (20 mA energization) was carried out, and the results of measuring the residual ratio of the light-emitting output were not shown in Table 1. The reason for the decrease in output is considered to be due to the increase in absorption of light due to corrosion of the AlGaAs surface. Further, in the same manner as in the examples, one lamp was placed one by one, and a high-temperature and high-humidity electric current test was performed at 60 ° C, 90 RH %, and 20 mA. In comparison with the beginning of the experiment, the average output residual rate after 500 hours was also reduced by 14%; compared with the example in which the reduction was less than 1%, it was greatly reduced. [Effect of Industrial Use] The light-emitting diode of the present invention can be utilized as a light-emitting diode product having high output/high efficiency and emitting infrared light of an emission peak wavelength of 850 nm or more, particularly 900 nm or more. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view showing a light-emitting diode lamp using a light-emitting diode according to an embodiment of the present invention. Fig. 2 is a schematic cross-sectional view showing the light-emitting diode of the light-emitting diode according to the embodiment of the present invention taken along the line A-A' in Fig. 1. Fig. 3 is a plan view showing a light-emitting diode using an embodiment of the present invention. Fig. 4 is a schematic cross-sectional view showing a light-emitting diode according to an embodiment of the present invention taken along line B-B' in Fig. 3. Fig. 5 is a view for explaining a pattern of an active layer of a light-emitting diode 201214753 which constitutes an embodiment of the present invention. Fig. 6 is a graph showing the relationship between the layer thickness of the well layer of the light-emitting diode of one embodiment of the present invention and the wavelength of the luminescence peak. Fig. 7 is a view showing the In composition (XI) of the well layer of the light-emitting diode according to the embodiment of the present invention and the correspondence between the well layer thickness and the emission peak wavelength. Fig. 8 is a view showing the relationship between the In composition (XI) of the well layer of the light-emitting diode of one embodiment of the present invention and the emission peak wavelength and its light-emitting output. Fig. 9 is a view showing the correlation between the number of pairs of the well layer and the barrier layer of the light-emitting diode of one embodiment of the present invention and the light-emission output. Fig. 10 is a view showing the relationship between the In composition (Y1) of the barrier layer of the light-emitting diode of one embodiment of the present invention and the light-emission output. Fig. 11 is a graph showing the dependence of the forward current of the light-emitting diode and the number of pairs of the barrier layer and the barrier layer in relation to the light-emission output with respect to the embodiment of the present invention. Fig. 1 is a schematic cross-sectional view showing an epitaxial wafer for use in a light-emitting diode according to an embodiment of the present invention. Fig. 1 is a schematic cross-sectional view showing a bonded wafer for use in a light-emitting diode according to an embodiment of the present invention. Fig. 14A is a plan view of a light-emitting diode according to an embodiment of the present invention. Fig. 14B is a cross-sectional view taken along the line C-C' shown in Fig. 14A. -60- 8 201214753 Fig. 15 is a schematic cross-sectional view showing a light-emitting diode according to another embodiment of the present invention. [Description of main component symbols] 1 Light-emitting diode 2 Compound semiconductor layer 3 Functional substrate 3a Vertical surface 3b Inclined surface 4 η-type ohmic electrode (first electrode) 5 Ρ-type ohmic electrode (second electrode) 6 Third electrode 7 Light-emitting portion 8 Current diffusion layer 9 Lower cladding layer (first cladding layer) 10 Lower light guiding layer 11 Active layer 12 Upper light guiding layer 13 Upper cladding layer (Second cladding layer) 14 G a A s Substrate 15 Buffer layer 16 contact layer 17 well layer. 18 barrier layer 20 light-emitting diode-61 - electrode transparent conductive film reflective surface bonding electrode 矽 substrate functional substrate light-emitting diode lamp mounting substrate η electrode terminal Ρ electrode terminal gold wire sealing resin Metal substrate functional substrate transparent conductive film reflective layer first electrode contact layer second electrode inclined surface and angle parallel to the surface of the light emitting surface 5

Claims (1)

201214753 七、申請專利範圍： 1. 一種發光二極體，其特徵爲具備： 發光部’其係具有：交替積層由組成式（InxiGai—X1) As ( OSXISI )所構成的井層與由組成式（Alx2Gai_ χ2 ) YilnmPCO^^Sl、〇&lt;γι$ι)所構成的障壁層之量子 井構造的活性層、夾住該活性層之由組成式（八1)(3〇&amp;1-χ3) 0&lt;Y2S1)所構成的第 1 導光 層與第2導光層、與分別使該第1導光層與第2導光層 介於中間而夾住該活性層之第1包覆層與第2包覆層； 電流擴散層，其係形成於該發光部上；及 機能性基板，其係接合於該電流擴散層； 而該第1與桌2包覆層爲由組成式（Alx4Gai-x4)Y3 Inl_Y3P (0&lt;Χ4&lt;1 ' 0&lt;Y3S1)所構成。 2. 如申請專利範圍第1項之發光二極體，其中該井層之In 組成（XI )爲 0SXK0.3。 3. 如申請專利範圍第2項之發光二極體，其中該井層之In 組成（XI ).爲 0.1SXK0.3。 4. 如申請專利範圍第1項之發光二極體’其中該障壁層之 組成 X2 與 Y1 分別爲 02X2S0.2、0.5&lt;Υ1&lt;0·7’ 該第 1 與第2導光層之組成Χ3與Υ2分別爲0.2SX3S0.5、0.4 &lt; Y2S0.6，該第1與第2包覆層之組成Χ4與Υ3分別爲 0.3SX4S0.7、0.4 &lt; Υ3 &lt;0.6 ° 5. 如申請專利範圍第1項之發光二極體’其中該機能性基 板係對發光波長爲透明。 -63- 201214753 6.如申請專利範圍第1項之發光二極體，其中該機能性基 板係由GaP或SiC所構成。 7 .如申請專利範圍第1項之發光二極體，其中該機能性基 板之側面係在接近該發光部之側，對於主要的光取出面 具有約略垂直的垂直面；在遠離該發光部之側，對於該 主要的光取出面具有傾斜於內側之傾斜面。 8 .如申請專利範圍第7項之發光二極體，其中該傾斜面係 含有粗糙面。 9. 一種發光二極體，其特徵爲具備： 發光部，其係具有交替積層由組成式（InxlGai- X1 ) As (0SX1幺1)戶斤構成的井層與由糸且成式（Alx2Gai-x2) γιΐηι -υ,Ρ ( 0&lt;Χ2&lt;1 ' 0 &lt; Y1 &lt;1 )所構成的障壁層之量子井構 造的活性層、夾住該活性層之由組成式（Alx3Ga|— X3 ) YzInnzPCOSXSSl、0&lt;Y2S1)所構成的第1導光層與 第2導光層、與分別使該第1導光層與第2導光層介於 中間而夾住該活性層之第1包覆層與第2包覆層； 電流擴散層，其係形成於該發光部上；及 機能性基板，其係對向於該發光部而配置且含有對於 發光波長具有90%以上之反射率的反射層’並接合於該 電流擴散層； 而該第1與第2包覆層爲由組成式（AlX4Gai- Χ4) Υ3 ΙΠι -Y3P ( 0&lt;Χ4&lt;1 ' 0 &lt; Υ3&lt;1 )所構成。 10. 如申請專利範圍第9項之發光二極體，其中該井層之In -64- ⑧ 201214753 組成（XI )爲 0SX1S0.3。 11.如申請專利範圍第10項之發光二極體’其中該井層之 In 組成（XI)爲 0.1SX1S0.3。 1 2 .如申請專利範圍第9至1 1項中任一項之發光二極體’ 其中該障壁層之組成X2與Y1分別爲0^X250.2、0.5&lt; Y1S0.7，該第1與第2導光層之組成X3與Y2分別爲 0.2&lt;X3&lt;0.5 ' 0.4 &lt; Y2&lt;0.6 &gt;該第1與第2包覆層之組 成 Χ4 與 Υ3 分別爲 0.3 幺 X4S0.7、0.4&lt;Υ3 幺 0.6。 13.如申請專利範圍第9項之發光二極體，其中該機能性基 板係含有由砂或鍺所構成的層。 1 4 .如申請專利範圍第9項之發光二極體，其中該機能性基 板係含有金屬基板。 15.如申請專利範圍第14項之發光二極體，其中該金屬基 板係由複數之金屬層所構成。 16·如申請專利範圍第9項之發光二極體，其中該電流 擴散層係由GaP或GalnP所構成。 1 7.如申請專利範圍第1或9項之發光二極體，其中該電流 擴散層之厚度爲0.5至2〇 μιη之範圍。 18·如申請專利範圍第1或9項之發光二極體，其中第1電 極及第2電極係設置於發光二極體之該主要的光取出 面側。 1 9·如申請專利範圍第1 8項之發光二極體，其中該第1電 極及該第2電極係歐姆電極。 -65- 201214753 20. 如申請專利範圍第18項之發光二極體，其係在該機能 性基板之該主要的光取出面側的相反側之面更具備第3 電極。 21. —種發光二極體燈，其特徵爲具備如申請專利範圍第1 至20項中任一項之發光二極體。 22. —種發光二極體燈，其特徵爲具備如申請專利範圍第20 項之發光二極體，該第1電極或該第2電極與該第3電 極予以連接於約略相同之電位。 2 3 · —種照明裝置，其係搭載複數個如申請專利範圍第1至 20項中任一項之發光二極體，及/或如申請專利範圍第 2 1或22項中至少任一項之發光二極體燈。 -66- ⑧201214753 VII. Patent application scope: 1. A light-emitting diode characterized by: a light-emitting portion' having a well layer and a composition composed of an alternating layer of composition (InxiGai-X1) As (OSXISI) (Alx2Gai_ χ2) YilnmPCO^^Sl, 〇&lt;γι$ι) The active layer of the quantum well structure of the barrier layer, and the composition of the active layer (8 1) (3〇&1-χ3) a first light guiding layer and a second light guiding layer formed by 0&lt;Y2S1), and a first cladding layer sandwiching the active layer by interposing the first light guiding layer and the second light guiding layer therebetween And a second cladding layer; a current diffusion layer formed on the light-emitting portion; and a functional substrate bonded to the current diffusion layer; and the first and second substrate cladding layers are composed of a composition formula (Alx4Gai) -x4) Y3 Inl_Y3P (0&lt;Χ4&lt;1 ' 0&lt;Y3S1). 2. For a light-emitting diode according to item 1 of the patent application, wherein the In composition (XI) of the well layer is 0SXK0.3. 3. For a light-emitting diode according to item 2 of the patent application, wherein the In composition (XI) of the well layer is 0.1SXK0.3. 4. For the light-emitting diode of claim 1 of the invention, wherein the composition of the barrier layer X2 and Y1 are 02X2S0.2, 0.5&lt;1&lt;1&lt;0·7', respectively, the composition of the first and second light guiding layers Χ3 and Υ2 are 0.2SX3S0.5, 0.4 &lt; Y2S0.6, respectively, and the composition of the first and second cladding layers Χ4 and Υ3 are respectively 0.3SX4S0.7, 0.4 &lt; Υ3 &lt;0.6 ° 5. In the light-emitting diode of the first aspect of the patent, wherein the functional substrate is transparent to the emission wavelength. -63-201214753 6. The light-emitting diode of claim 1, wherein the functional substrate is composed of GaP or SiC. 7. The light-emitting diode of claim 1, wherein the side surface of the functional substrate is on a side close to the light-emitting portion, and has a substantially vertical vertical surface for the main light extraction surface; away from the light-emitting portion On the side, the main light extraction surface has an inclined surface inclined to the inner side. 8. The light-emitting diode of claim 7, wherein the inclined surface contains a rough surface. A light-emitting diode characterized by comprising: a light-emitting portion having an alternate layer of a well layer composed of a composition formula (InxlGai-X1) As (0SX1幺1) and a formula (Alx2Gai- X2) γιΐηι -υ,Ρ ( 0&lt;Χ2&lt;1 ' 0 &lt; Y1 &lt;1 ) The active layer of the quantum well structure of the barrier layer, and the composition of the active layer (Alx3Ga|—X3) a first light guiding layer and a second light guiding layer composed of YzInnzPCOSXSS1 and 00&lt;Y2S1), and a first cladding sandwiching the first light guiding layer and the second light guiding layer and sandwiching the active layer a layer and a second cladding layer; a current diffusion layer formed on the light-emitting portion; and a functional substrate disposed opposite to the light-emitting portion and containing a reflection having a reflectance of 90% or more for an emission wavelength The layer ' is bonded to the current diffusion layer; and the first and second cladding layers are composed of a composition formula (AlX4Gai- Χ4) Υ3 ΙΠι - Y3P (0&0&;Χ4&lt;1 '0 &lt;Υ3&lt;1). 10. The light-emitting diode according to claim 9 of the patent scope, wherein the well layer In-64-8 201214753 has a composition (XI) of 0SX1S0.3. 11. The light-emitting diode of claim 10, wherein the In composition (XI) of the well layer is 0.1SX1S0.3. 1 2 . The light-emitting diode according to any one of claims 9 to 11 wherein the composition of the barrier layer X2 and Y1 are 0^X250.2, 0.5 &lt; Y1S0.7, respectively, the first The composition X3 and Y2 of the second light guiding layer are respectively 0.2 &lt; X3 &lt; 0.5 ' 0.4 &lt; Y2 &lt; 0.6 &gt; The composition of the first and second cladding layers Χ 4 and Υ 3 are 0.3 幺 X 4 S 0.7, respectively. 0.4&lt;Υ3 幺0.6. 13. The light-emitting diode of claim 9, wherein the functional substrate comprises a layer composed of sand or ruthenium. The light-emitting diode of claim 9, wherein the functional substrate comprises a metal substrate. 15. The light-emitting diode of claim 14, wherein the metal substrate is composed of a plurality of metal layers. 16. The light-emitting diode of claim 9, wherein the current diffusion layer is composed of GaP or GalnP. The light-emitting diode according to claim 1 or 9, wherein the current diffusion layer has a thickness of 0.5 to 2 μm. 18. The light-emitting diode of claim 1 or 9, wherein the first electrode and the second electrode are disposed on the main light extraction surface side of the light-emitting diode. The light-emitting diode of claim 18, wherein the first electrode and the second electrode are ohmic electrodes. The light-emitting diode according to claim 18, further comprising a third electrode on a side opposite to the main light extraction surface side of the functional substrate. A light-emitting diode lamp characterized by comprising the light-emitting diode according to any one of claims 1 to 20. A light-emitting diode lamp comprising the light-emitting diode according to claim 20, wherein the first electrode or the second electrode and the third electrode are connected to substantially the same potential. 2 3 - A lighting device carrying a plurality of light-emitting diodes according to any one of claims 1 to 20, and/or at least one of claims 2 or 22 Light-emitting diode lamp. -66- 8
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