TW200935384A - Display apparatus, driving method for display apparatus and electronic apparatus - Google Patents

Abstract

The present invention provides a display apparatus, includes: a pixel array section including a plurality of scanning lines disposed in rows, a plurality of signal lines disposed in columns, and a plurality of pixels arranged in rows and columns at places at which the scanning lines and the signal lines intersect with each other; and a driving section configured to drive the pixels through the scanning lines and the signal lines; the driving section carrying out block-sequential driving wherein the scanning lines are grouped for each predetermined number to form blocks and the pixels disposed in rows and columns are sequentially driven in a unit of a block and line-sequential driving wherein the scanning lines are scanned in each of the blocks to sequentially drive the pixels in a unit of a row.

Description

200935384 IX. Description of the invention: [Technical field to which the invention belongs]

M 43⁄43⁄4 g§ 0 [Prior Art] Frequently developed in recent years as a hair-opening Du Temple

The voltage is driven below 10 V, so the power consumption is low. The knife is low. Further, since the organic EL does not require an illumination member, since the organic EL device reacts, the device does not emit a self-luminous element that emits light when it is displayed, and the color is easy to be lighter and thinner. Further, the speed is a few μβ degree 'very high speed, g residual image. An organic EL device is used in a planar self-luminous type display device of a pixel, and an active matrix type display device in which a germanium transistor is formed as a driving element and a germanium film is formed in each pixel is developed. The active matrix type planar self-luminous display device is described, for example, in the following Patent Documents 丨 to 5. [Patent Document 1] Japanese Laid-Open Patent Publication No. 2003-255856 [Patent Document 2] 曰本开开 2〇〇3_271〇95 [Patent Document 3] Japanese Patent Laid-Open No. 4〇〇13_13324〇 [Patent Document 4] 〇4_〇29791 [Patent Document 5] Japanese Patent Laid-Open Publication No. 2 〇〇 〇 82 82 82 82 82 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 。 。 。 。 。 The display device is constructed by the pixel array portion i and the peripheral driving portion. The drive unit includes a horizontal selector 3 and a write scanner 4. Pixel array package 3. Line-shaped signal line SL and column-shaped scanning line ws. A pixel 2 is disposed in a portion where each signal line intersects the scanning line WS. In the figure, it is easy to understand for 'only'! The pixel write scanner 4 includes an offset register, and in response to the clock signal from the external supply, the pulse is also sequentially transmitted from the outside. The scan line sequentially outputs the ❿ Ο control signal. The horizontal selector 3 sequentially scans the line of the write scan _ to supply the image signal to the signal line SL. The pixel 2 is used for sampling the transistor n and the drive transistor 2. The capacitor C1 and the light-emitting element EL are formed. The driving transistor 2 is a channel type, and the source of one of the current terminals is connected to the power source line, and the other terminal of the other current terminal is connected to the light-emitting element EL. The gate of the control terminal of the driving transistor Τ2 is connected to the signal group via the sampling transistor T1. The sampling transistor η is turned on in response to a control signal supplied from the writing scanner 4, and is sampled from the signal line SL. The supplied image signal is written to the holding capacitor C. The driving transistor is written in the holding capacitor. The image, the number as the gate voltage Vgs, is accepted at the gate and will have no current. To the light-emitting element EL, the 'light-emitting element (10) emits light in response to the light of the image signal. The gate voltage Vgs indicates that the gate of the source is the reference electrode only the driving transistor T2 is operated in the saturation region. , the interpole voltage; the relationship with the drain current Ids is expressed by the following characteristic formula (1).

Ids=(l/2)p(W/L)Cox(Vgs-Vth)..(1) Here, 'H is the mobility of the driving transistor, and w is the 133422.doc 200935384 channel width of the driving transistor. L is also the channel length, and Cgx is also the capacitance film of the extremely insulating film per unit area 'Vth is also the threshold voltage. As can be seen from this characteristic, the driving transistor T2 functions as a constant current source for supplying the in-phase current Ids in response to the terminal voltage Vgs when operating in the saturation region. Fig. 24 is a graph showing the voltage/current characteristics of the light-emitting element EL. The horizontal axis represents the anode voltage V, and the drive current is drawn in the vertical direction. Further, the anode voltage of the light-emitting element EL is the gate voltage of the driving transistor T2. The current/voltage characteristics of the light-emitting element EL change over time, and the characteristic curve tends to be gentle as time passes. Therefore, even if the driving current (4) is constant, the anode voltage (thortion voltage) v still changes. At this point, the pixel circuit 2 shown in FIG. 23 is driven by the driving transistor 2 in the saturation region, and Since the driving current of the response voltage Vgs is generated in the gate current with respect to the variation of the drain voltage, the luminance of the light-emitting element can be kept constant regardless of the temporal change of the characteristics. FIG. 25 is a circuit diagram showing another example of a conventional pixel circuit. The difference from the pixel circuit of Fig. 23 which has been previously shown is that the driving transistor η is changed from the p channel type to the N channel type. In the manufacturing process of the circuit, it is advantageous to form all of the transistors constituting the pixel into an N-channel type. SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] The display panel is highly refined and large-scale, and the number of scanning lines exceeds 1_. A plurality of scanning lines are also lined up and the scanning scanner is also λ typed. In recent years, with the enlargement of the display panel and the drive unit, 133422.doc 200935384 has been developed as a block drive. In this case, the drive unit of the display device performs segmentation by dividing the scan line by a specific number of bars. The block unit sequentially drives the blocks of the pixels in the row and column, and sequentially scans the scan lines in each block to sequentially drive the lines of the pixels in column units to sequentially display the image on the panel. ❹

In the conventional block driving, the difference in operating conditions is caused by the difference in operating conditions between the pixel columns at the boundary of adjacent blocks, which has the problem of detrimental picture uniformity. In the block before and after the block, the last pixel column of the preceding block is finally scanned by the line in the block. On the other hand, the first pixel column of the subsequent block is initially scanned in line. The final column pixel of the silk block and the first pixel column of the rear block are adjacent to each other. However, if the order of the lines is sequentially scanned from the driving condition, the order of the time is extremely different, and the system becomes extremely different. The subtle brightness between the two pixel columns is different, which causes the uniformity of the kneading surface to decrease. [Technical means to solve the problem] In view of the above-mentioned past, you are the one who wants to improve the uniformity of the screen. In order to achieve the screaming of the following means, the following means are also included. The present invention is a display device, wherein the δ. pixel array portion is arranged in a row-like shape as a column-shaped scanning line, and arranged in a matrix. The pixel...-the portion where the scanning line intersects with each signal line, and the driving portion, which is used to drive the respective sounds in the '', ', and '', and the pixel and the signal are wrapped around the pixel. Departments use the 'series to distinguish the number of scans per unit number = lower drive: the positive block drives the image of the array in accordance with the attack," and the block is made, driven by blocks, lines, and in each zone. 133422.doc 200935384 Scans each scan line to drive pixels in column units. The characteristic matter is that the adjacent region (four) 'controls that the scanning directions sequentially driven by the line are opposite to each other, and the driving portion includes: a signal selector that supplies the signal line corresponding to the row to include the gray scale. a signal potential and a specific reference potential "image signal; a write scanner that sequentially supplies control signals to the column-shaped scan lines; and a drive scanner that supplies the power supply lines in parallel with the respective scan lines. The power supply voltage for switching between the potential and the low potential; the pixel includes: a sampling transistor, wherein one current end is connected to the signal line, the control end is connected to the scan line; and the driving transistor is connected to the current end of the non-polar side. In the power supply line, the control terminal of the gate is connected to the other current end of the sampling power source; the light-emitting element is connected to the current terminal of the driving transistor to be the source side; and the holding capacitor is provided. Connected between the source and the gate of the driving transistor; the driving scanner divides the column-shaped power supply lines into a specific number of blocks, and blocks the unit In the order of G 'flat shift phase', the high potential and the low potential are switched, and the blocks are sequentially driven, and the potential of the power supply line of a specific number is switched in the same phase in the block; the aforementioned human scanner is in each block. The lines for sequentially supplying control signals to the respective scanning lines are sequentially driven in each horizontal period, and the scanning directions for sequentially driving the lines are controlled to be opposite to each other between adjacent blocks. Preferably, the power supply scanner is sequentially driven in the block, and the power supply lines are switched from a high potential to a low potential. After the source of the driving transistor is lowered, the power supply lines are driven from a low potential. Returning to the high-potential correction preparation operation. On the other hand, the write scanner sequentially drives the command on the line, and the signal line is the reference 133422.doc 10 200935384. The control unit is supplied to each scanning line to improve the driving force.唬 Turn on the sampling transistor to discharge, and use #(四)Electric grinding to carry out the holding capacitor to limit the current. 2Γ The electric layer between the closed and the source of the crystal tends to be driven in the sub-drive. Further, the write scanner is configured to supply a control material Hr sampling transistor to each scanning line when the line is a signal potential, and to write a money potential to the centering operation; the signal selection The device is connected between adjacent blocks, and the order of the signal potentials is opposite to each other. Moreover, the front is. And ^ include a plurality of poles that are divided corresponding to each block. In other aspects, each pixel includes at least: a sampling transistor, a driving electric scorpion body, a holding capacitor, and a light-emitting element; The crystal system has its control terminal connected to the scan line 'its! a current terminal is connected between the signal line and a control terminal of the driving transistor; the driving transistor system is connected to the light emitting element by one of the current terminals, and the other is connected to the power source; the holding capacitor is connected to the current source The driving transistor is connected between the control terminal and the current terminal; the driving portion includes at least: a writing scanner that supplies a control L number to each scanning line, and a k-number selector that switches the signal potential to each signal line The sampling electric potential system performs a threshold voltage correcting operation according to a control signal supplied to the scanning line when the signal line is at a reference potential, and the writing of the holding capacitor corresponds to the driving transistor. a voltage of a threshold voltage, and when the signal line is at a signal potential, a signal potential writing operation is performed according to a control signal supplied to the scanning line, and a signal potential is sampled from the signal line and written in the holding capacitor; The foregoing driving 133422.doc 11 200935384: the second system is driven to the light emitting element to emit light corresponding to the signal potential written in the holding capacitor The aforementioned write scanner is squashed for every ^h scan line and is synthesized and allocated to a specific number of scan lines for each of the trace lines, as a synthesis period divided into a first period and a second period; the aforementioned write scan The device sequentially selects each block in each synthesis period, and the pixel array portion is sequentially slid, and the first-period of each synthesis period is supplied to the scan line belonging to the (four) number of the block (four). No. 'Performs the threshold voltage correction action in block units; in the fourth: (4) 'Scan lines corresponding to the specific number of blocks belonging to the block sequentially output the L number in sequence to drive ' and sequentially execute in each column of the pixel The nickname potential write operation; in the adjacent blocks, the control (4) is sequentially output to each scan line, so that the scan directions in which the lines are sequentially driven are opposite to each other. Preferably, the foregoing write scanner includes a plurality of gate drivers divided corresponding to the respective blocks, and 'pixels belonging to mutually adjacent columns between adjacent blocks, and the signal is input after the threshold voltage correction operation is completed. The time at which the potential is written is the same. [Embodiment] [Effects of the Invention] According to the present invention, the scanning directions in which the lines are sequentially driven between adjacent blocks are opposite to each other. Thereby, the difference in operating conditions is minimized between the pixel columns at the boundary of the adjacent blocks, and the luminance difference is not generated, so that the uniformity of the picture can be improved. In the first pair of areas, the last pixel column of the preceding block is scanned at the end of the block. On the other hand, the first pixel column of the subsequent block is also scanned sequentially in the end. This is due to the fact that the scanning directions of the lines controlled by the line between 133422.doc •12-200935384 1 and the adjacent blocks are opposite to each other. The final column pixel of the preceding block adjacent to each other and the first pixel column of the subsequent block become the last column to be sequentially scanned by the line. The driving condition is the same in time, and the brightness difference between the two pixel columns is not generated, and the writing can be improved. Uniformity. The embodiments of the present invention are described in detail below with reference to the drawings. Fig. phosphorus = block showing the entire structure of the first embodiment of the display device of the present invention. As shown, the display device includes a pixel array portion i and two driving portions (3, 4, 5). The pixel array unit includes: a column-shaped scanning line ws, a line-shaped signal line, a pixel 2 arranged in a matrix of the intersection of the two, and a power supply line corresponding to each column of each pixel 2 The drive unit (3, 4, 5) includes a control scanner (write scanner) 4 that sequentially supplies control signals to the respective scan lines ws, and sequentially scans the pixels 2 in units of lines; the power supply scanner (The drive scanner ^1 is sequentially scanned with the line, and each power supply line is supplied with a high-potential and low-power ❿ 1 switching power supply voltage; and a signal selector (horizontal selector) 3, which is sequentially scanned with the line The signal line SL is supplied as the image signal and the reference potential. The write scanner 4 operates in response to the clock signal EWSck supplied from the external port P, and sequentially transmits the same from the beginning of the supply. The pulse wssp' is used to control the output of each scan line. The drive scanner 5 is operated in response to the externally supplied clock signal DSck, and sequentially transmits the pulse kisses which are also supplied from the outside, thereby sequentially Switching the potential of the power supply line DS. In this first-implementation type, the m-scanner 5 is a column-shaped power supply line still 133422.doc 13 200935384

collection? The specific number of blocks is categorized, and the phase is shifted in order by the block unit, the switching between the in-row potential Vcc and the low potential Vss, and the potential of the power supply line DS of a specific number is switched in the same phase in the block. In the example shown in the figure, the driving scanner 5 divides the power supply lines of the column shape into two blocks, and sequentially shifts the phase by the block unit to switch between the high potential and the low potential, and The potential of the two power supply lines DS is switched in the same phase in the block. Among them, the number of blocks to be blocked by the present invention is not limited to two, and the driving sequence of the power supply line (power supply line) DS is generally common to the plurality of columns (complex segments). The drive scanner 5 is basically constituted by an offset register and an output buffer connected to each of the slaves one by one. The offset register operates in response to the clock (4) DSCk supplied from the outside, and sequentially transmits the DSsp s which is also supplied from the outside, thereby outputting the power exchange number as the source of the power supply for each segment. The output buffer is switched to the power supply line DS at a high potential and a low potential due to the control signal '. In the present invention, the control timing of the borrowing line is common to the benefit of the multiple power line inter-system transmissions, thereby reducing the number of output buffers. Output buffer Overwrite: The wire is supplied to the power supply. Therefore, it requires a very large current drive capability. Number: :! Big. By reducing the size of the output buffer of the device size, the circuit size of the peripheral driver unit is reduced, and the cost is reduced. The device ": for example, the example of FIG. 1" is shared by two power supplies. For the whole, the number of output buffers can be compared with the first implementation type and if the control timing μ of the 1G power supply line is still common, the number of the buffers is the first embodiment. Figure 2 shows the specific structure of the pixel 2 included in the display device shown in Figure 1. 133422.doc 200935384

Circuit diagram of φ. As shown in the figure, the pixel circuit 2 is a two-terminal type (diode type) light-emitting element EL· represented by an organic EL device or the like, an N-channel type sampling device, and the same N-channel type. It is composed of a transistor τ2 and a thin capacitor type holding capacitor C1. The sampling transistor Τι is connected to the scanning line WS as the idle terminal of the control terminal, and the source and the drain of the current terminal are connected to the 彳s line SL, and the other is connected to the gate of the driving transistor T2. G. The driving transistor T2 has one of its source and drain connected to the light-emitting element anus, and the other is connected to the power supply line DS. The driving transistor T2 of this type is an N-channel type 'as the non-polar side connecting wire DS of its single-side current end, as another source of the current terminal of the monk + Thai 4 ..., 1 = von another early The s side is connected to the anode side of the light emitting element EL. The cathode of the light-emitting element EL is fixed at a specific cathode potential

Vcat. The holding capacitor C1 is connected between the primary pole s which is the current terminal of the driving transistor T2 and the gate G which is the control terminal. For the pixel 2 including the structure, the scanner (write scanner) 4 controls the scanning line ws to switch between the low potential and the two potentials, thereby sequentially outputting the control signal, and the pixel 2 is given in column units. The lines are scanned in sequence. Power Scanner (Drive Scanner) 5 Series Matching Lines Dependent Scan 'The power supply lines are still supplied to the high potential Vee and the low potential Vss = the power supply voltage. The signal selector (horizontal selector 3) sequentially scans the line-like line 5 to supply the signal potential Vsig and the reference potential v〇fs of the image signal. In this configuration, when the power supply line is still at the high potential VcC and the signal line SL4v〇f, the sampling transistor T1 is turned on in response to the control signal, and the light-off operation for switching the light-emitting element EL from the lighting state to the light-off state is performed. Next, the power supply fine is switched from the high potential Vcc to the low potential b, and during the period when the power supply line 133422.doc 15 200935384 DS is at the low potential vss, the source of the driving transistor Τ2 is lowered without turning on the sampling transistor I. The electrode voltage is prepared for setting the gate voltage Ggs of the gate G and the source s to a voltage exceeding the threshold voltage vth of the driving transistor D2. Thereafter, the power supply line Ds & low potential Vss is returned to the high power bit VCC, and when the signal line SL is the reference potential Vofs, the sampling transistor T1 is turned on in response to the control nickname, and the source of the driving transistor T2 is raised. The pole voltage is corrected by the holding capacitor (: 丨 is discharged so that the voltage Ggs between the gate G and the source s tends to its threshold voltage vth. According to the present invention, first, the power supply line DS is at the high potential Vcc and When the signal line SL is the reference potential v〇fs, the light-emitting element el& lighting state is switched to the light-off state. Next, the power supply line Ds is switched to the low potential Vss, and the power supply line DS is at the low potential Vss. In the meantime, the sampling transistor τ1 is not turned on, and the gate/source voltage Vgs of the driving transistor T2 is set to a voltage greater than the threshold voltage Vth. When the low potential Vss returns to the high potential ycc, and when the signal line 乩 is the reference potential ¥〇&, the sampling transistor T1 is turned on, and the holding capacitor C1 is discharged to drive the driving transistor T2. Polar. Source-to-source voltage Vgs In the correction operation of the threshold voltage Vth, the backlight operation, the preparation operation, and the correction operation are sequentially performed to prevent malfunction, and the threshold voltage correction of the driving transistor T2 can be surely and surely performed. The preparation operation does not require the sampling transistor T1 to be turned on, and the source voltage of the driving transistor T2 is lowered to prevent the pixel 2 from malfunctioning, and the correcting operation is stabilized. FIG. 3-1 is for the second embodiment shown in FIG. Timing of an action description of an implementation type 133422.doc -16- 200935384 The timing diagram of this embodiment controls the power supply line of three segments with a common timing. The timing diagram of Figure 3-! shows the supply to the signal line. The image signal (input signal), the potential change of the power supply line (power supply line) that is diced every three, and the control signal (control pulse) that applies the scanning line of each column (each & A 'the input signal is in the horizontal period _, the switching potential between the signal potential Vsig and the reference potential Vofse power line first to third sections is common, and the i~3 sections are simultaneously switched from the high potential to the low potential. After returning to 高 to high potential. On the other hand, the scanning line of the first segment is when the input signal is V〇fs and the power line is high Vcc, the first control pulse is output, and the pixels of the corresponding column are switched from the lighting state. After the light is turned off, the second to fourth control pulses are continuously generated, and the threshold voltage correction operation is repeated three times. Finally, the fifth control pulse is generated, the signal potential Vsig is written, and the mobility correction is 0. The scan line is shifted from the first stage by only ih, and the first to fifth control pulses are sequentially output, and the light-off 〇 operation, the threshold voltage correction operation, and the signal potential writing operation are performed in the same manner as the first stage. Similarly, the third stage is shifted from the second stage by 1H phase, and five control pulses are sequentially outputted to perform the light-off operation, the time division correction operation, and the signal writing operation. The right action sequence enters the fourth to sixth segments, and the drive scanner switches the power line common to the fourth to sixth segments, temporarily switching from the high potential Vcc to the low potential Vss, and then returns to Vcc. In this manner, the scanner is driven to shift the potential of the power lines of the fourth to sixth stages by shifting the phase from the third to the third stage. Corresponding to this, five consecutive control pulses are sequentially applied to the respective scanning lines of the fourth to sixth segments, and the same operations as the first to third segments are repeated. 133422.doc 17 200935384 It can be explained from the above description that this embodiment adopts a common timing to control the potential of the 3 k wound power line. As a result, the number of outputs of the drive scanner can be reduced (in this embodiment, it can be 1/3), and the cost can be reduced. Further, this embodiment is a configuration in which the power supply line is returned from Vss to VCC to the first threshold voltage correction operation, and is different in the first stage, the second stage, and the third stage. As described above, when the power supply line is returned from Vcc to Vss, if the current flowing through the driving transistor is smaller (the Vgs of the driving transistor is smaller), the gate voltage and the source voltage hardly rise. The threshold voltage correction action can be performed normally in one section. Figure 3-2 is another timing diagram for the description of the operation of the pixel shown in Figure 2. The timing chart shows that the potential of the scanning line ws changes, the potential of the power supply line (power supply line) DS changes, and the potential of the signal line changes with the time axis being common. The potential change of the scanning line WS indicates a control signal for performing the opening and closing control of the sampling electric crystal. The potential change of the power supply line indicates the switching of the power supply voltage Vss. Further, the potential change of the signal line ^ indicates the switching of the signal potential Vsig of the input ❹ (4) and the reference potential V() fs. Further, in parallel with the change in the isoelectric potential, the potential change between the electrode G and the source s between the driving transistor τ 2 is also shown. As described above, the potential difference between the gate G and the source s is '. The timing chart is matched with the order of the pixels, and the period name is simply changed to (υ~ου. During the lighting period (1) 'the pixel is in the light-emitting state. If it is the xenon period (2) 'pixel from the light-emitting state Switching to the non-light-emitting state. Next, during the preparation period (3) to (5), the pixel system performs the preparatory operation for the threshold of the driving transistor. Then, during the correction period (6), the power is limited (4). Normal operation. Normally, the correction period (6) is repeated several times with the standby period 133422.doc 200935384, and the threshold voltage correction operation is completed. Thereafter, between (9), the signal potential is written to the holding capacitor C1, and driving is performed = The mobility correction of the crystal T!. Finally, proceed to the light-emitting period (1)),

The non-lighting state is switched to the light emitting state. Further, in the figure, the simplification of the explanation is performed in the first threshold voltage correction period (6). B 纟 刖 刖 刖 刖 写 写 写 写 写 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移 迁移The voltage Δν is subtracted from the voltage held at the holding capacitor C1. During the write period/mobility correction period (9), when the signal line SL is at the signal potential Vsig, the sampling transistor T1 must be turned on. Thereafter, the light source is caused to emit light at a luminance corresponding to the signal potential Vsig. At this time, since the signal potential Vsig is adjusted by the voltage corresponding to the threshold voltage Vth and the voltage ΔΥ for correcting the mobility, the light-emitting luminance of the light-emitting element is not affected by the tracking voltage Vth of the driving transistor T2 or The deviation of the mobility μ is affected. In addition to this φ, the bootstrap start operation is performed at the beginning of the light-emitting period (11), and the gate of the driving transistor T2 is held while the voltage Ggs between the gate G and the source S of the driving transistor T2 is maintained constant. The potential and source potentials rise. Next, referring to FIG. 4-1 to FIG. 4-11, the operation of the pixel circuit shown in FIG. 2 will be described in detail. First, the light-emitting period (1) of the light-emitting element EL is as shown in FIG. 4-1, and the power supply is Vcc. The sampling transistor T1 is in a closed state. At this time, since the driving transistor T2 is set to operate in the saturation region, the current Ids flowing through the light-emitting element EL is determined by the characteristic value 1 of the gate-source voltage Vgs of the driving transistor T2. value. 133422.doc •19- 200935384 Next, during the light-off period (2), when the signal line potential is Vofs, the sampling transistor T1 is turned on, and Vofs is input to the gate of the driving transistor T2 (Fig. 4-2). As a result, the voltage between the gate and the source of the driving transistor T2 becomes less than the threshold voltage. The current does not flow through the light-emitting element EL. Therefore, the light-emitting element EL is turned off. At this time, the voltage applied to the light-emitting element EL becomes the threshold voltage of the light-emitting element EL. Therefore, the anode voltage of the light-emitting element EL becomes the sum of the threshold voltage of the light-emitting element EL and the cathode voltage, and is generally Vcat+Vthel. Further, after a certain period of time, the power supply voltage is changed from Vcc to Vss during the preparation period. At this time, the power source side becomes the source of the driving transistor 2, as shown in Fig. 4-3, and a current flows from the anode of the light-emitting element EL to the power source. Thereby, the voltage of the anode of the light-emitting element EL decreases with time. At this time, since the sampling transistor T1 is turned off, the gate of the driving transistor T2 also decreases with the anode voltage of the light-emitting element EL. In summary, the driving transistor • The gate-to-source voltage of T2 (the gate of the driving transistor γ2 and the potential between the power supplies) becomes smaller with time. ❹ At this time, the right drive transistor Τ2 operates in the saturation region. In general, if it is Vgs-VthdSVds, then during the period (4), as shown in Fig. 4_4, the gate of the driving transistor T2 becomes Vss+Vthd. . Here, Vthd is the threshold voltage between the gate power sources of the driving electric crystal T2. During the period (5), the power supply voltage is again set to Vcc (Fig. 4_5). At this time, the coupling amount of the gate input to the driving transistor T2 is Δν, and the anode voltage of the light-emitting element el is Vx. By setting the power supply to Vcc, the source of the driving transistor T2 becomes the anode of the light-emitting element ,, and the current flows from the power source to the light-emitting element el by the gate source-to-electrode M Vgs of the driving transistor 2 Yang 133422.doc -20- 200935384 pole, if the voltage between the gate and source of the driving transistor T2 is less than the threshold voltage, the current will hardly cause the gate and source to rise. Then, during the threshold correction period (6), when the signal voltage is v〇fs, the sampling transistor T1 is turned on (Fig. 4-6). Thereby, the gate voltage of the driving transistor D is Vofs, and the variation of the gate voltage is based on the holding capacitance ci, the parasitic capacitance Cgs between the gate and the source, and the parasitic capacitance of the light emitting element el.

Cel is a certain ratio and is input to the source. The input ratio at this time is set to layer. g is a value represented by the following formula 2.

❹ g=(Cl + Cgs)/(Cl+Cgs+Cel) (2) In this state, if the gate-source voltage Vgs of the driving transistor 12 is greater than its threshold power MVth, as shown in Fig. 4-6 It shows that there is current flowing from the power supply. In other words, the values of Vofs and Vss must be set so that the % at this time is greater than the threshold voltage of the driving transistor T2. As described above, since the equivalent circuit of the illuminating element is represented by a diode and a capacitor, the driving is performed as long as _Vcat+Vthel (the leakage current of the light-emitting element EL is much smaller than the current flowing through the driving transistor T2) The current of the transistor T2 is used to charge C1 and Cel. At this time, ... the system rises with time as shown in Figure 4_7. The sampling transistor T1 is turned off during the subsequent standby period (8)' before the signal voltage is changed from Vofs to Vsig. At this time, since the voltage between the source and the source T of the driving transistor is larger than Vth, a current flows as shown in Fig. 4-8, and the polarity and the source electric history of the driving transistor T2 rise. At this time, since the light-emitting element EL is reversely biased, the light-emitting element EL does not emit light. After the limit value/shaw operation is completed, the sampling transistor T1 is turned off. Next *; Write period (9) When the 'spot line potential becomes Vsig', turn it on again. 133422.doc -21 · 200935384 Sample transistor τ1 (Fig. 4_9) e Vsig becomes the voltage corresponding to the gray scale. The gate potential of the driving transistor Τ2 is Vslg' in order to turn on the sampling transistor. However, since a current flows from the power source, the source potential rises with time. At this time, if the source voltage of the driving transistor T2 does not exceed the sum of the threshold voltage Vthel of the light-emitting element EL and the cathode voltage Vcat (the leakage current of the light-emitting element is less than the current flowing through the driving transistor 2) Then, the current of the driving transistor T2 is used to charge c丨 and Cel. At this time, since the threshold correction operation of the driving transistor T2 is completed, the current flowing through the driving transistor T2 reflects the mobility ^. Specifically, the large mobility rate is large at this time, and the rise in the source is also early. Conversely, if the migration rate is small, the amount of current is small, and the rise of the source is also slow (Fig. 4_丨0). Thereby, the voltage between the gate and the source of the driving transistor T2 reflects the mobility and becomes small, and after a certain period of time, the Vgs of the corrected mobility is completed. At the end, the sampling transistor T1 is turned off, and when the writing is completed and the light emitting period (11)' is turned on, the light-emitting element EL is caused to emit light. Since the voltage between the gate and the source of the driving transistor T2 is constant, the driving transistor 2 flows a constant current Ids' to the light-emitting element EL, and the current of Vel rises to Ids' flows to the voltage of the light-emitting element EL. The light-emitting element EL emits light (Fig. 4-11). In the present circuit, if the light-emitting element EL has a long light-emitting time, its I-V characteristic changes. Therefore, the potential at point B in the figure also changes. However, since the voltage between the gate and the source of the driving transistor T2 is maintained at a constant value, the current flowing through the light-emitting element EL does not change. Therefore, even if the I-V characteristic of the light-emitting element EL is deteriorated, a constant current Ids continues to flow, and the luminance of the light-emitting element EL does not change. 133422.doc • 22- 200935384 Here, consider the driving system of this pixel circuit as shown above, taking the driving sequence of Figure 3'1, but changing the power line from Vss to v" to the threshold. The time for correcting the action is different between the lines of the power line as the common line. Specifically, the power line is at the potential of Vee compared to the Nth segment and the N+1th segment. The time is higher than [therefore, by the leakage current of the driving transistor and the leakage current of the light-emitting element, the source of the f-crystal is driven to rise in the nth step of the N+mt匕. ❹ Basically, Before the limit correction operation, even if the source voltage of the drive 胄 crystal is different, if the (4) source-to-source voltage Vgs of the drive transistor is greater than the threshold voltage vth during the threshold correction operation, the normal operation can be performed. I value correction operation. However, the brightness of the light is determined by the source voltage of the driving transistor before the threshold correction operation. Therefore, in the present driving, the final segment and the next segment of the power line are common. Figure 3" is the third and fourth paragraphs) When the drive source for the threshold voltage correction e electricity crystal abruptly changes (from the first segment to the third segment vary based gently). As shown in Fig. 5, the screen of the display device is caused by the unevenness of the stripes, such as the period of the complex line (hereinafter referred to as a block) in which the power supply timing is occluded. In addition, the unevenness is more exaggerated in the figure. In order to cope with the above problems, the present invention proposes to reverse the scanning direction of the sampling transistor in the zone dragon between adjacent blocks. Fig. 6 shows an example in which the present invention is applied as an example. This timing chart is basically the same as Fig. 3-1. The difference between the present invention and the case of FIG. 3_! is as follows: the time when the power supply voltage is changed from Vss to Vcc to the threshold correction operation, 133422.doc -23- 200935384 the adjacent line between adjacent blocks is the same The point of output of the signal voltage input to the pixel is opposite to the point between adjacent blocks. ❹ 藉 By using the present invention 'between adjacent lines between adjacent blocks, the time period from the power supply line to Vec to the threshold correction operation can be made the same, and the driving transistor or the light-emitting element EL can be used. The amount of rise in the source voltage of the driving transistor caused by the leakage current or the like is the same. As a result, the unevenness of the streaks between the blocks as seen in Fig. 5 before the handling can be replaced with the unevenness of the shadow as shown in Fig. 7. In addition, in Figures 5 and 7, the shadows are represented more than the actual exaggeration. Generally. The unevenness of the streaks, such as the streaks, between the adjacent blocks is determined by the brightness difference of about 1%, but the unevenness of the change of the shadows cannot be visually recognized by the difference of the degree of the difference of 1%, so by using the present invention , can be obtained unrecognized: evenly uniform enamel. Moreover, by using the present invention, even if the number of lines constituting the block is increased, the unevenness is not recognized. Therefore, the number of blocks constituting the block can be increased as compared with the prior art, and the number of blocks of the panel can be reduced, and the cost can be reduced. . Moreover, the present invention is adopted in such a manner that the scanning direction of the sampling transistor for each adjacent block is reversed. Therefore, in the case where the panel of the gate driver is not built, the unit is preferably a gate driver unit. Fig. 8-1 is a block diagram showing the f-body structure of the second embodiment of the display device of the present invention. As shown, the display device includes a pixel array and a driving unit (3, 4, 5) for driving the same. The pixel array unit includes a scanning line WS of column =, a signal line SL of a line shape, a pixel 2 arranged in a matrix of the intersection of the two, and a squadron. The electric circuit corresponding to each column of each pixel 2 is arranged: the power supply line I driving unit (3, 4, 5) includes: a control scanner (write scanner) 4' which sequentially supplies control to each of the lines ts Signal, 133422.doc •24- 200935384 The pixels 2^ are scanned in line by line; the power scanner (drive scanner) 5, which is matched with the line, sweeps #, and supplies the supply lines first. The power supply voltage for switching between the potential and the second potential, and the signal driver (horizontal selector) 3 are sequentially scanned in accordance with the line, and the signal line of the line signal is applied to the signal potential and the reference potential of the image signal. Further, the write scanner 4 operates in response to a clock signal supplied from the outside, and transmits a start pulse WSsp which is also supplied from the outside, thereby outputting a control signal to each of the scan lines ws. The drive scanner 5 operates in response to a clock signal supplied from the outside, and sequentially transmits a start pulse DSsp which is also supplied from the outside, thereby sequentially switching the potential of the power supply line Ds in a line. The difference from the first embodiment shown in FIG. 1 is that 'the supply line DS is not common in block units. VIII%. FIG. 8-2 shows the pixel 2 included in the display device shown in FIG. 8. A circuit diagram of the specific structure. As shown in the figure, the present pixel circuit 2 is a two-terminal type (diode type) light-emitting element represented by an organic EL device or the like, and an n-channel type sampling electrical body T1, which is driven by the same Nit type. The transistor T2 and the thin capacitor type holding capacitor C1 are formed. The sampling transistor T1 is connected to the scan as the idle terminal of the control terminal, and the source and the terminal of the pair of current terminals are connected to the S signal line SL, and the other is connected to the driving electron crystal (4): Extremely G. The driving transistor T2 is connected to the power supply line DS by connecting one of the source and the drain to the I-light 7L EL'. The driving electric power body T2 of this type is an N-channel type 'the non-polar side of the current terminal of which is connected to the power supply line DS' as the source of the other single-side current terminal is connected to the light-emitting element EL The anode is opposite. The cathode of the @lateral light-emitting element EL is fixed to a specific cathode 133422.doc -25- 200935384 potential Vcat. The holding capacitor (4) is connected to the source S of the body terminal and the current as the (4) di "" (4) electric positive body T2 is the gate of the control terminal Gr [for the package = manufacturing scanner (write scanner) 4 system will scan冓; between the potential and the potential, according to the low pixel 2, the line is scanned sequentially. The electric ^ ' in the column unit to sweep the line in turn 圹 々 f source sweep " (drive scanner) 5 series with the payment: Μ 'The power supply line DS is supplied to the first potential Vcc and the second power ❹ 线: = electric_. The signal driver (horizontal selector (10) is matched with: Ketian') supplies the image signal SL to the signal line SL, the potential Vsig and the reference potential v〇fs. In this structure, the sampling thunder τ 7

Vf U is used to charge the image signal from the reference potential two = rvsig after the first timing, on the slave control signal (: 1: when the capacitor C1 is held; the sample signal potential Vsigit is written to the port Let C1. At this time, 'the electric current flowing through the driving transistor T2 is simultaneously fed back to the holding capacitor C1, and is written in the negative voltage to the voltage & the signal potential of the holding capacitor Ci is added to the driving transistor. The correction of the migration of 2 is also performed. The sampling period of the time is also the flow of the T2, "return to the retention capacitor. The mobility correction period. The pixel circuit also shown in addition to the above mobility correction function. , Μ 临 临 临 电压 电压 电压 电压 电压 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 临 电源 临 电源 电源 电源 电源 电源 电源 电源 电源 电源 电源The benefit (write scanner) 4 is also the same as the sampled electric crystal (4) before sampling the w potential vsig 'in the second timing to make the sampling transistor T1 turn on from 133422.doc •26· 200935384 L line SL 'pure the reference potential pure Applied to the driver I crystal η between the poles and will drive The source s of the transistor Τ2 is set to the second potential Vsse. The power scanner (drive scanner) 5 is connected to the third timing after the second timing: the electric fine is switched from the second potential Vss to the first potential 〜, to maintain the electricity. Each C 1 maintains a voltage corresponding to the threshold voltage of the driving transistor Τ2 in advance. With the threshold voltage correction function, the display device can cancel the threshold voltage vth of the driving transistor T2 with a deviation per pixel. In addition, the first and second timings are not required. The pixel circuit 2 shown in Fig. 8-2 further has a bootstrap start function, that is, the write scanner 4 is held by the holding capacitor (10). At the time of the signal potential, the sampling transistor TW is in a non-conducting state, and the gate G of the driving transistor T2 is electrically disconnected from the signal line, thereby cooperating with the idle potential

The voltage Vgs between the source G and the source S is maintained constant in the fluctuation of the source potential of the driving transistor T2. Even if the current/electricity (four) 发光 of the light-emitting element EL fluctuates over time, the gate (four) Vgs can be maintained constant, and no change in luminance occurs. Fig. 9 is a timing chart for explaining the operation of the pixel shown in Fig. 8.2. This timing chart shows the potential change of the scanning line WS, the potential change of the power supply line (power supply line) DS, and the potential change of the signal line SL by the common time axis. The potential change of the scanning line WS indicates a control signal for performing opening and closing control of the sampling electron cell (4). The potential change of the power supply line DS indicates the switching of the electric cap ν ", VSS. Moreover, the change in the potential of the signal line indicates the switching of the signal potential Vsig of the input signal and the reference potential Yang. Moreover, in parallel with the potential change It indicates the potential change between the driving transistor T2 and the source & 133422.doc 27- 200935384. As described above, the potential difference between the gate G and the source s is YU. This timing chart is suitable for the movement of the pixel. The period is divided into (1) ~ (7). During the period (!) before entering the field (fieid), the light = EL is in a light-emitting state. Thereafter, the new line of the line is scanned in sequence, = Prior to the initial period (2), the power supply line DS is switched from the first potential Vcc to the second potential Vss. The next period (3) 'switches the input signal from ... to Vofs. Steps to the next-period (4) Turn on the sampling transistor τι. During the ❹ period (7) to (4), the gate voltage and the source voltage of the driving transistor T2 are initialized. The period (2) to (4) is the threshold voltage correction. Use the gate of the preparatory gate drive transistor (4) «Initialize to VGfs, iM^ S is initialized to Vss. Next, during the threshold correction period (5), the threshold voltage correction operation is actually performed to maintain the threshold voltage Vth between the gate 〇 and the source s of the driving transistor Τ2. The voltage of the voltage V is actually written to the holding capacitor C1 connected between the gate 极 and the pole S of the driving transistor D. . . . , ❹ In addition, the embodiment shown in FIG. The middle limit period correction period (7) is divided into three times, and the threshold voltage correction operation is performed in a time division manner. A standby period (5a) is inserted between each of the limit voltage correction periods (5). Threshold voltage correction period (5) 'Repeated multiple threshold voltage correction operation: Second, it is convenient to keep the capacitance ci write voltage equivalent to Vth. However, the present invention is not limited thereto, and can also be used for one threshold voltage correction period (5) Then, the correction operation is performed. Then: "Advance to the write operation period/mobility correction period (6). Here, the signal potential Vsigl of the image signal is written in the form of 亀 to the holding capacitor C1' and the mobility correction is performed. The voltage Δν used is maintained from the guarantee 13342 2.doc -28. 200935384 The voltage of the capacitor c 1 is subtracted. During the writing period/mobility correction period (6) 'In the time zone where the signal line SL is at the signal potential Vsig, the sampling transistor T1 must be made Then, the light-emitting element emits light at a luminance corresponding to the signal potential Vsig. At this time, the signal potential Vsig is a voltage for correcting the voltage and the mobility corresponding to the threshold voltage Vth. Since Δν is adjusted, the light-emitting element ELi light-emitting luminance is not affected by the deviation of the threshold voltage Vth or the mobility μ of the driving transistor T2. In addition, the bootstrap start operation is performed at the beginning of the light-emitting period (7), and the gate potential of the driving transistor T2 is maintained while the voltage Ggs between the gate G and the source S of the driving transistor Τ2 is maintained constant. And the source potential rises. Next, the operation of the pixel circuit shown in Fig. 8_2 will be described in detail with reference to Figs. 1 to 11 to Fig. 12. First, as shown in Fig. 1 〇_1, during the light-emitting period (丨), the power supply potential e is again turned to V C C 'the sampling transistor Τ 1 is turned off. At this time, since the oscillation transistor 2 is set to operate in the saturation region, the driving current ids flowing through the light-emitting element EL is determined in accordance with the voltage Vgs applied between the gate g/source S of the driving transistor Τ2. The value shown by the aforementioned transistor characteristic formula is determined. Next, if the preparation periods (2) and (3) are entered as shown in Fig. 10-2, the potential of the power supply line (power supply line) is set to Vss. At this time, Vss is set to be smaller than the sum of the threshold voltage Vthe丨 of the light-emitting element EL and the cathode voltage Vcat. That is, Vss < Vthel + Vcat ', therefore, the light-emitting element EL is turned off, and the power supply line side becomes the source of the driving transistor T2. At this time, the anode of the light-emitting element EL is charged to Vss. Further, if the next preparation period (4) is entered as shown in Fig. 10-3, the potential of the signal line SL becomes Vofs. On the other hand, the sampling transistor is turned on, and the 133422.doc -29-200935384 driving transistor is turned on. The gate potential of T2 is set to Vofs. Thus, the source S and the gate G of the driving transistor T2 at the time of light emission are initialized, and at this time, the gate-to-source voltage Vgs becomes a value of Vofs - Vss. Vgs = Vofs - Vss is set to be larger than the threshold voltage vth of the driving transistor T2. Thus, the drive transistor T2 is initialized to become vgs > vth to complete the preparation of the subsequent threshold voltage correcting operation. Next, if it is advanced to the threshold voltage correction period (5) as shown in Fig. 10-4, 电位 the potential of the power supply line DS (power supply line) returns to Vcc. By setting the power supply voltage to Vcc, the anode of the light-emitting element EL becomes the source S' of the driving transistor T2, and a current flows as shown. At this time, the equivalent circuit of the light-emitting element el is shown as a parallel connection between the diode Tel and the capacitor Cel as shown. Since the anode potential (i.e., the source potential Vss) is lower than Vcat + Vthel, the diode Tel is in a closed state, and the leakage current flowing there is much smaller than the current flowing through the driving transistor T2. Therefore, most of the current flowing through the driving transistor T2 is used to charge the holding capacitor C1 and the equivalent capacitor Cei. ❹ Fig. 10-5 shows the time variation of the source voltage of the driving transistor T2 during the threshold voltage correction period (5) shown in Fig. 10-4. As shown, the source voltage of the driving transistor T2 (i.e., the anode voltage of the light-emitting element EL) rises from Vss with time. When the threshold voltage correction period (5) is passed, the driving transistor T2 is turned off, and the voltage Vgs between the source 8 and the gate 成为 becomes. At this time, the source potential is given by Vofs-Vth. If the value v〇fs_Vth is still lower than VCat+Vthel, the light-emitting element EL· is in an off state. As shown in the graph of Figure 10-5, the source voltage of the driving transistor D 2 rises with time. However, in the present example, before the source voltage of the driving transistor 12 is 133422.doc • 30- 200935384, the first threshold voltage correction period (7) is ended before the voltage reaches VofS-Vth, so the sampling transistor 71 is turned off and enters. During the standby period (5a), the state of the pixel circuit in the standby period (5a) is not shown. During the first standby period (5a), the gate G/source s voltage of the driving transistor T2 is set. Vgs is still larger than Vth, so as shown, the current flows from the power supply Vcc through the driving transistor D2 to the holding capacitor. Thereby, the source voltage of the driving transistor D2 rises, but due to the sampling transistor丨 is turned off, the gate G is at a high impedance, because the potential of the gate G also rises in accordance with the rise of the potential of the source S. That is, during the first standby period (5a), the driver is driven by the bootstrap action. The source potential and the drain potential of the transistor T2 are both increased. At this time, since the reverse bias voltage is continuously applied to the light-emitting element EL, the light-emitting element EL does not emit light. Thereafter, after 1H, the potential of the signal line SL becomes again. When v〇fs, turn on the sampling transistor T1 and start the first The second threshold voltage correction operation. Thereafter, if the second threshold voltage correction period (5) is passed, the second standby period (5a) is moved. Thus, by repeating the threshold voltage correction period (5) And the standby period φ (5a) 'The voltage between the gate G and the source S of the last driving transistor D reaches the voltage corresponding to Vth. At this time, the source potential of the driving transistor T2 is Vofs-Vth, It is smaller than Vcat+Vthel. Next, if the input signal writing period/mobility correction period (6) is shown as shown in Fig. 11-2, the potential of the signal line SL is switched from Vofs to Vsig, and the sampling transistor T1 is turned on. At this time, the signal potential V sig is a voltage corresponding to the gray scale. The gate potential of the driving transistor T2 is Vsig in order to turn on the sampling transistor T1. On the other hand, the source potential is due to flow from the power source Vcc. The current rises with time. At this point, if the source potential of the driving transistor 133422.doc -31- 200935384 T2 does not exceed the sum of the threshold voltage vthei of the light-emitting element EL and the cathode voltage Vcat, the slave drive The current flowing through the transistor T2 is used exclusively for equivalent electricity. The charging of the capacitor Cel and the holding capacitor C1. At this time, since the threshold voltage correcting operation of the driving transistor T2 is completed, the current flowing through the driving transistor T2 reflects the mobility μ. Specifically, the migration is large. The driving transistor Τ2 has a large current amount at this time, and the potential rise portion of the source is also large. Conversely, when the mobility μ is small, the φ current of the driving transistor 72 is small, and the source rises. By this operation, the gate voltage Vgs of the driving transistor Τ2 reflects the mobility μ and is only compressed, and at the time when the mobility correction period (6) is completed, the fully corrected mobility μ is obtained. Vgs. Fig. 11-3 is a graph showing temporal changes in the source voltage of the driving transistor T2 in the mobility correction period (6). As shown, if the mobility of the driving transistor T2 is large, the source voltage rises rapidly, and Vgs is only compressed by it. That is, if the mobility μ is large, the Vgs is compressed to offset the influence, and the drive current can be suppressed. On the other hand, in the case where the mobility μ is small, the source voltage of the driving transistor Τ2 does not rise so fast, and therefore Vgs is not strongly compressed. Therefore, in the case where the mobility μ is small, the Vgs of the driving electric crystal is not greatly compressed in order to compensate for the small driving ability. Fig. 12 is a view showing an operation state of the light-emitting period (7). The sampling transistor T1 is turned off during the light-emitting period (?), and the light-emitting element EL is caused to emit light. The gate-source voltage Vgs of the driving transistor T2 is kept constant, and the driving transistor T2 flows a constant current Ids' to the light-emitting element EL in accordance with the above-described characteristic formula. The anode voltage of the light-emitting element EL (that is, the source voltage of the driving transistor T2) is 133422.doc 32-200935384 Since the light-emitting element EL has a current of Idsf, it rises to VX, and when it exceeds Vcat+Vthel, it emits light. The element EL emits light. When the light-emitting element EL becomes longer in light-emitting time, its current/voltage characteristics change. Therefore, the potential of the source S shown in Fig. 1_3 changes. However, since the gate-source voltage Vgs of the driving transistor T2 is maintained at a constant value by the bootstrap start operation, the current ids' flowing through the light-emitting element EL does not change. Therefore, even the current of the light-emitting element EL / ❿

The voltage characteristic deterioration 'still always has a certain driving current Ids, and the luminance of the light-emitting element EL does not change. However, if the display device is high-definition and high-speed, the m period will change, and in this case, the threshold voltage correction operation and the signal potential writing operation must be completed within the last 1H. At that time, it is necessary to consider the input of the V〇fs to the signal line within 1H after the transient of the input signal or the control signal, and the closing operation of the sampling transistor ^, for the letter The input of the signal potential Vsig of the I line SL, the signal potential writing operation, and the closing operation of the sampling electron crystal. However, in fact, if the high definition and high speed of the device are not developed, m is considerably shortened, and it is difficult to correct the operation and signal power within 1H. The invention is based on the above-mentioned problem. During the horizontal period, one part of the period of the synthesis is subjected to a threshold voltage correction operation. Thereafter, the remainder of the synthesis period moves. u The order signal is written in the group j as an example of the operation sequence in the case of the mode (2H). The time series on the top of the time chart is in the form of thousands of Yu, +, and 4 for comparison.动作 The order of action of the reference example is shown in the lower layer I33422.doc -33 - 200935384 3-bit=1^. In the reference action: the under-order, the input signal is 'prepared V (^VsiW. The signal for the sampling of the N-th line of the transistor should be pulsed... because of the rear offset, the same package = transistor ti(n ) Turn on. Phase to 1h packet 3 pulses P〇, Pi, P2 control signal applied to the N+1 line sampling thunder > mouth body Ding (7) X1). During the first 1H, when the input L is Vofs, the sampling transistor ti(n) is in response to the control pulse.

Turn on 'to perform threshold voltage correction action. Thereafter, if the input signal becomes the signal electric Msigl during the m period, the sampling transistor T1(N) responds.

The control pulse P2 is turned on to perform a signal potential writing action. In this manner, the sampling transistor T1 (N) of the N-th line is in the first horizontal period, and the threshold voltage correcting operation and the signal potential writing operation are completed. Further, at this time, the sampling transistor T1 (N+1) of the next line is turned on in response to the control pulse !>, and the first threshold voltage correcting operation is performed. If the input signal is v〇fs during the second horizontal period, the sampling transistor T1(N+1) of the N+th line responds to the control pulse! ^ and turn on, for the second threshold voltage correction action. Thereafter, when the input signal is switched from ¥〇& to Vsig2, the sampling transistor T1(N+1) is turned on in response to the control pulse p2 to perform the signal potential writing operation. Thus, the sampling transistors of the respective lines perform the threshold voltage correcting operation and the signal potential writing operation in 1H. In the present reference example, since the correction is not completed by the threshold voltage correction operation once, the threshold voltage correction operation is repeated twice. On the other hand, in the operation sequence of the present invention, the write scanner is configured to match the scanning period 133422.doc -34· 200935384 (1 Η) of each of the plurality of scanning lines (two in the present embodiment). Contains the first _. The period of synthesis of the outsider's brother. In other words: t 5 is equivalent to 2Η during the scanning period. During the first period, correct the action for 2 scans. Next, in the first ^ 赖 'from the implementation of the threshold voltage N + 1) You & the end of the mountain, the first 'month, on the two scan lines (line N and line 1) read the heart of the fine, financial execution (4) Potential write operation. In the example of Fig., the input signal is sequentially from the equivalent of the synthetic scan (4) + between VGfs' and the second half of the second half.

❹ Change to M2. At this time, the sampling transistor τι of the '(4) line turns on the sampling Vsigl in response to the control signal pulse P2. Next, the sampling transistor T1(N+1) of the n+ith line is turned on in response to the control signal pulse p2, and Vsig2 is sampled. Fig. 14 is a timing chart showing the overall configuration of the operational sequence of the present invention including the potential change of the (four) line. As shown in the figure, the N-th line and the n+-th line are applied to the sampling transistor TUN during the correction preparation period and the threshold voltage correction period, and the control signal waveforms of D1 (N+1) are common. On the other hand, the difference between the signal writing time for the pixel of the Nth line and the signal writing time for the pixel of the Nth 丨 line is 1H or less. In the case of the step, the time when the power line (10) becomes VSS (the timing at which the non-lighting period starts) is also the difference between the Nth line and the (N+1)th line is less than 1H. In the case of non-light-emitting, the gate of the driving transistor is set to v〇fs, and after the source is set to Vss, the power supply line is switched from Vss to Vcc, and the threshold voltage correction operation is performed. Thereafter, while the mobility correction is performed, the k-th potentials Vsigl and Vsig2 are written in the respective storage lines of the respective lines, and the light-emitting element EL is caused to emit light. As described above, in the present operation sequence, in the second period, the control signals are sequentially output to the respective 133422.doc -35 - 200935384 scanning lines ws(N, Ν +1) β with a phase difference of less than 1 scanning period (1H). Since the power supply scanner performs the threshold voltage correction operation during the first period, the low power potential Vss is supplied to the plurality of power supply lines DS corresponding to the plurality of scanning lines [(Ν'N+1), and is switched to the high potential together. VCC. By then, during the first period, to be less than! The phase difference in the scanning period (10) is sequentially supplied to the high potential Vcc by supplying a low potential Vss to the plurality of power supply lines DS(N, N+1). ❹ Ο As above, in the current day and month, the scan lines are divided into blocks for each specific number of blocks, and the scan lines assigned to the scan lines of a specific number are synthesized as the first period and the second period. During the synthesis. In the timing chart shown in FIG. ,, for the sake of easy understanding, each of the two scanning lines is segmented, and one horizontal period (1H) assigned to each of the two scanning lines is synthesized as the first period and the first period. During the synthesis period of the second period (2H). The timing chart of FIG. 14 is an operation sequence of the block of the block included in the scan line of the Nth line and the scan line of the (N+1)th line. FIG. 15A shows the driving power included in the pixel of the Nth line. Waveform diagram of changes in gate potential and source potential of crystal T2. The potential waveform corresponding to the gate G and the source s also indicates the change of the power supply line DS, the change of the control signal of the sampling transistor τ 1 , and the change of the potential of the input signal supplied to the signal line SL. It is specified in the correction preparation period (4), the threshold correction period (5), and the signal writing period (6) in response to a change in the potential of the power supply line DS or a change in the control signal and the input signal of the sampling transistor T1. Operation 0 During the preparation period (4), the gate G of the driving transistor T2 is set to Vofs, and the source S is set to Vss. Thereafter, after the first threshold voltage correction period (5) 133422.doc -36- 200935384 and the standby period (5a), during the second threshold voltage correction period (5), the gate G and the source S The voltage Vgs is fixed at a voltage equivalent to Vth. Next, after the transition period (5b), the signal writing period (6) is entered.

Write operation of signal potential Vsigl. In the pixel of the Nth line, the transition from the end of the second Zt pressure correction period (5) to the entry of the input signal potential period (6) is very short. In the transition period (5b)', since the driving transistor η has a slight current leakage, the potentials of the gate G and the source s fluctuate. However, since the transfer period (5b) is very short in the pixel of the Nth line, almost no current leakage of the driving transistor T2 is observed, and the potential of the source electrode 8 is hardly changed. Fig. 15B is a waveform diagram showing potential changes of the gate G and the source S of the driving transistor of the pixel belonging to the (N+1)th line. As described above, the line n and the line N+1 belong to the same block, and the threshold voltage correction operation is performed once in the block unit, but the signal potential writing operation is sequentially performed in the block. Therefore, the signal writing period (6) is shifted from the pixel of the Nth line to the pixel of the Nth line. Therefore, as shown in the timing chart of FIG. 15B, the transition period (5b) from the second threshold voltage correction period (5) to the signal potential writing period (6) is compared with the first-turn pixel. The pixels of the first line become longer. Therefore, it is strongly affected by the current leakage of the driving transistor T2, and the potential of the gate 〇 and the source 3 of the driving transistor Τ2 rises as if surrounded by a circle of a dotted line, especially because the potential of the source s rises. The gate potential rises. Therefore, the dynamic range of the signal potential written in the holding capacitor c丨 becomes small, the pixels on the (N+1)th line fail to obtain the desired luminance, and the luminance is lower than the pixel on the nth line. 133422.doc -37- 200935384 If the operation of the block contained in the N line and the Ν+1 line ends and proceeds to the next block, the action lines for the N+2 line and the N+3 line are corrected. The action of the _ line is repeated as well. That is, the transition period of the pixels of the N+2 line is short, and the period of the transition from the threshold electric house correction period to the signal writing period becomes longer in the pixels of the (four) line. The (four) line adjacent to each other between adjacent blocks has a long transition period and is short on the N+2 line. Therefore, since the boundary between the blocks is greatly different during the transition, the brightness unevenness is clearly manifested.

According to the present invention, in order to cope with the above-mentioned points, control signals are sequentially outputted to the respective scanning lines between the phase (four) blocks, so that the directions in which the lines are sequentially scanned are opposite to each other. Thereby, the pixels belonging to mutually adjacent lines between adjacent blocks complete the threshold voltage correcting action until the transition time of the input signal potential writing operation is the same. Thereby, a difference in luminance does not occur between the pairs of adjacent lines adjacent to each other at the boundary between adjacent blocks, and an uneven display is obtained. The diagram shows a timing chart of the sequence of actions of the present invention. This embodiment is called a column, and two scanning lines are used as! For the block, the 2 horizontal period (4) is taken as the case of the 1 synthesis period. In the example of Fig. 15C, the N line and the N+1 line are taken as one block, and the N+2 line and the N+3 line are taken as the next block. Therefore, the boundary between adjacent blocks is between the N+1 line and the N+2 line. As shown in the timing diagram of the Shikou, the signal writing sequence and the potential of the power line are switched between adjacent blocks, and the signal input order is further reversed. *Therefore, 'by the adjacent block, the direction in which the line is sequentially reversed when the signal is written in reverse' is at the end of the threshold correction operation until the entry signal write action time is the same on the N+1 line and the N+2 line. . In addition, since the N+1 line and the block belonging to the tool are different, the phase difference between the power line (N) and the power line (n+2) 133422.doc -38· 200935384 is 2H. Further, the phase difference of the control signal pulses applied to the sampling transistors T1(N+1) and T1(N+2) is also 2H in the 丨 synthesis period. In conjunction with this, the input signal is Vsig(N), Vsig(N+〇,

The order of Vsig (N+3) and Vsig (N+2) changes. In summary, Vsig(N+3) and Vsig(N+2) are replaced by inversion of the lines between the blocks.

By setting the end of the threshold voltage correction operation to the transition time of the input signal potential writing operation as shown in the timing chart of FIG. 15C, the pixels of the N+1th line and the N+2 line belonging to the respective blocks can be The current leakage amount of the driving transistor is substantially the same, and the luminance difference between the pixel of the n+ith line and the pixel of the N+2th line which is recognized in the reference example becomes inconspicuous. In this way, the average sentence quality without periodicity can be obtained. In order to achieve this type of write action, the heart rate output must be reversed during the adjacent synthesis period. Fig. 15D is a schematic plan view showing a state of being displayed on the face of the pixel array unit. This reference example is formed in the pixel array to form a complete scan line _ line) 'This is divided into 4 blocks 每ι, B2, B3 B4 every 100 bundles as in the above-mentioned 'limit voltage correction action system mining area In order of the blocks, each block _ person subscribes to the m signal potential writing action in sequence within each block. This reference example is for each block (1) to the case where the lines are sequentially described from the top to the bottom. In other words, it is the case that the direction in which the lines are sequentially scanned is reversed between adjacent blocks. Dare to start at block B 1, a d? ground> #进仃6» limit voltage correction action, then the signal is written from top to bottom and the heart is known. As the process proceeds to the next step, the transition time of the threshold voltage correction operation is increased until the transition time of the seven-inch write operation becomes longer. Therefore, the current leakage amount is increased by φ, and the casing degree is lowered. The face of the figure is 133422.doc •39- 200935384 In block B1, the brightness decreases slightly from top to bottom. This is due to the fact that as the transfer time becomes longer, the current leakage increases and the brightness decreases. Hereinafter, this specification reinterprets the transfer time as a leak time for convenience of explanation. In the next block B2, after the threshold voltage correction operation is performed again, the signal writing operation is sequentially performed by the line scan. The direction in which the lines are sequentially scanned is the same as that of the block B1. The block B2 is also downward from the top of the screen. Therefore, in the block... the brightness system gradually decreases the brightness from the top to the bottom. If φ is the same as the boundary between block B1 and block B2, the last line of block (1) has the longest drain time. The initial line of the adjacent block B2 has the shortest leakage time. Therefore, at the boundary between the block B1 and the block B2, the difference in leakage time between the mutually adjacent lines is the largest, along which the maximum luminance difference is generated. Therefore, when the entire surface of the pixel array unit 1 is viewed from the whole, the band-shaped unevenness is recognized in units of the blocks B1, B2, B3, and B4, and the uniformity of the surface is deteriorated. Fig. 15E is a schematic plan view showing a state of a screen displayed on the pixel array φ portion 1 in accordance with the operation sequence of the present invention. Similarly to Fig. 5D, the 400 scanning lines (4 turns) included in the pixel array unit 1 are divided into four blocks B1 B2 and B4. The line of block B1 sequentially scans the line of the block and sequentially scans the direction of the scanning system. Similarly, the direction in which the blocks B2 and B3 are sequentially scanned is reversed. Further, between B3 and B4, the lines are sequentially scanned in the direction of each other. Invert. If you pay attention to the original block B1, the line for signal writing is sequentially scanned from top to bottom. Therefore, the last line of block B1 has the longest leakage time, and if it is block B2, the opposite is true. The line scan is performed from bottom to top. Therefore, the line at the beginning of block B2 has the longest leak time. If the boundary of block B1 and block B2 is 133422.doc -40 - 200935384, it is adjacent to each other. The line leakage time is the longest 'there is no difference in brightness. In other words, no difference in brightness occurs at the boundary between block B1 and block B2.

Alternatively, if you pay attention to the B3 junction of block B2, the leakage time of the final line on the side of block B2 is the shortest. The block B3 is opposite to the block B2, and the lines are sequentially scanned from the top to the bottom, so that the initial line of B3 has the shortest leak time. Therefore, the line leakage time adjacent to each other at the boundary between the block B2 and the block B3 is the shortest 'no brightness difference. Therefore, there is no significant luminance unevenness between the block B2 and the block B3, and a uniform luminance distribution can be obtained. The display device of the present invention comprises a thin film device structure as shown in Fig. 6. This figure shows a mode cross-sectional structure of a pixel formed on an insulating substrate. As shown in the figure, the pixel includes a transistor portion including a plurality of thin film transistors (one TFT is illustrated in the drawing), a capacitor portion such as a storage capacitor, and a light-emitting portion such as an organic EL element. On the substrate, a transistor portion is formed by a TFT process or a light-emitting portion such as an organic EL element is laminated thereon. The transparent counter substrate is adhered thereto as a flat panel via an adhesive. The display device of the present invention is as shown in Fig. 17, and includes a planar mold group shape. For example, a pixel array portion is provided on an insulating substrate, and a pixel included in an organic core member, a thin germanium transistor, a thin film capacitor, or the like is formed in an integrated manner, and the pixel array portion (pixel matrix portion) is arranged. Then, the opposite substrate is adhered to the opposite substrate as a display module.今今==基二, _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ .doc 200935384 Road). The display device of the present invention described above includes a plane suitable for inputting an image signal input to various electronic devices, such as a digital camera, a ==:, a mobile phone, a video camera, or the like, or an image signal generated in the motor device. A display of an electronic device such as a field of image display. The following table (4) uses the example of this type of machine. Yi Zhizhi Electronics

The television set to which the present invention is applied includes the front panel 12 and the image display screen U of the illuminator glass unit 3, and is produced by using the display device of the present invention on the image display screen 11. Fig. 19 is a view of a digital camera to which the present invention is applied, with a front view and a rear view. The digital camera includes an imaging lens, a light-emitting portion for flash, a display control switch, a menu „, a shutter (7), and the like, which are produced by using the display device of the present invention for the display unit 16 thereof. In the notebook type personal computer of the present invention, the keyboard 21 operated when the main body 2 includes a dead letter or the like is included in the main body cover, and the display device of the present invention is used for the display portion thereof. Fig. 21 is a portable terminal device to which the present invention is applied, with the left side showing the open state and the right side showing the closed state. The portable terminal device includes the upper side frame 23, the lower side frame 24, and the joint portion (in the case of This is a hinge portion 25, a display 26, a sub-display 27, a flash 28, a camera 29, etc., which is produced by using the display device of the present invention for the display 26 or the sub-display 27. Figure 22 is applicable to the present invention. The video camera includes: a main body portion 3A, 133422.doc 42-200935384 a front side facing lens 34 for photographing the subject, a start/stop switch 35 for photographing, a monitor 36, and the like, by the present invention It BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing a first embodiment of a display device according to the present invention. Fig. 2 is a view showing a first embodiment. Circuit diagram of the circuit structure. Fig. 3·1 is a reference timing diagram for the description of the operation of the first embodiment. Fig. 3-2 is another reference timing chart for the description of the operation of the first embodiment. Fig. 4-2 is a schematic diagram for explaining the operation of the first embodiment. Fig. 4-3 is a schematic diagram for explaining the operation of the first embodiment. Fig. 4-4 is a mode diagram for explaining the operation of the first embodiment. Fig. 4-5 is a schematic diagram for explaining the operation of the first embodiment. Fig. 4-6 is for the first embodiment. Fig. 4 is a schematic diagram for explaining the operation of the first embodiment. Fig. 4-8 is a schematic diagram for explaining the operation of the first embodiment. Fig. 4 is a first implementation. The mode circle of the action description of the type. 'Fig. 4-1 shows the curve of the action description for the first embodiment. Figure 4-11 Fig. 5 is a schematic diagram showing a display state of a reference example of the display device. Fig. 6 is a timing chart for explaining the operation of the first embodiment. 133422.doc -43 - 200935384 Fig. 7 is a plan view showing a display mode of the first embodiment. Fig. 8 is a block diagram showing the overall configuration of the display device of the present invention. Fig. 8-2 The circuit diagram shown in Fig. 51 is shown in Fig. 9. One of the pixels of the summer Fig. 9 shows the operation of the pixel shown in Fig. 8_2. Fig. 1 〇1 is a diagram illustrating the operation of the pixel shown in Fig. 8-2. The 10-2 is also used for the mode of action description. , J. Figure 10-3 is a schematic diagram for the same operation description. Figure 10-4 is a schematic diagram for the same operation description. Figure 10-5 is a graph similar to the description of the action. Figure 11-1 is a schematic diagram for the same operation description. Figure]]-2 is also a mode diagram for the description of the action. Figure 11-3 is a graph similar to the description of the action. Fig. 12 is a schematic view similar to the operation description. Fig. 13 is a timing chart for explaining the operation of the pixel shown in Fig. 8.2. Fig. 14 is a view showing the display shown in Fig. M. And the timing of the method is also the waveform diagram of the operation description of the display device. Fig. 15 is also a waveform diagram of the ISI 1 S Γ ± - month for the operation of the display device. Fig. 15C shows the timing of the first driving method of the present invention. Also, the device shown in Fig. 15D shows the mode circle of the screen for the reference example. 133422.doc 200935384 FIG. 15E is a cross-sectional view showing a device structure of a display device for a display device of the present invention. FIG. 17 is a view showing a mode of the present invention. FIG. The top view of the module structure which is not placed is shown in Fig. 18 and is shown in the present invention. The stand of the television component of the display device is shown in Fig. 19, which is a view of the present invention. The stereotype of the digital camera of the digital camera that is not installed is shown as having a perspective view of the brain. The drawing of the display device of the test device is shown in Fig. 21, which is a schematic view of the present invention. The portable terminal device of the heart device is shown in Fig. 22 as a perspective view of the present invention. The video of the casting device is shown in Fig. 23 Fig. 24 is a circuit diagram showing a problem of a conventional display device. Fig. 25 is a view showing another example of a conventional display device. Fig. 25 is a view showing another example of a conventional display device. [Description of main component symbols] 1 2 3 4 5 pixel array pixel level selector (signal driver) control scanner power scanner 133422.doc -45· 200935384

Cl holding capacitor DS power supply line EL light-emitting element SL signal line T1 sampling transistor T2 driving transistor WS scanning line 133422.doc -46-

Claims (1)

200935384 X. Patent Application Range: 1. A display device comprising: a pixel array portion, comprising: a scan line arranged in a column shape, a 彳-number line arranged in a lamp shape, and arranged on each scan line and each signal The line intersection is further: a row-like pixel; and a knife driving unit that drives each pixel via the scanning line and the signal line. The driving unit of the month 1j drives the following driving: The block is sequentially driven, and the system is driven by each The number of scan lines is divided into blocks, and the pixels in the row and column are sequentially driven in block units; and the pin lines are sequentially driven, which scans the scan lines in each block, and sequentially drives the pixels in units; Between the blocks, the control is reversed for the scanning of the line in sequence. 2. For the display device of claim 1, the driving unit of # includes: a signal selector, which supplies the signal line of the line to the number corresponding to the gray level. a video signal of a potential and a specific reference potential; a write scanner that sequentially supplies a control signal to the column-shaped scan lines and drives the scanner to supply a high potential to a power supply line arranged in parallel with each scan line. The power supply voltage is switched to a low potential; the pixel includes a sampling transistor, wherein one current terminal is connected to the signal line, the control terminal is connected to the scanning line, and the driving transistor is connected to the drain terminal. The thirteenth control gate of the thunder is connected to the sampling transistor, and the other is connected to the sampling transistor, and the other is a light-emitting component connected to the driving transistor. , s & , , pass 4 becomes the current end of the 4 pole side, and 133422.doc 200935384 holding electricity valley ' is connected between the source and the gate of the driving transistor; The device divides the specific number of the power supply lines in the column into blocks, sequentially shifts the phase by the block unit, switches the high potential and the low potential, drives the blocks in sequence, and switches in the same phase in the block. specific The sum of the potential supply line; INTRODUCTION said write scanner based in each block, within every horizontal line period by people for each scanning line supplying control signals sequentially driven, and the adjacent region 扫描 The direction of the scan in which the lines are driven in turn is controlled to be opposite to each other. 3. The display device of the present invention, wherein the power supply scanner drives the towel in sequence to change each power supply line from high power (four) to a low potential to lower the source of the driving transistor. After the voltage, the power supply lines are returned from the low potential to the high potential for corrective action; on the other hand, the write scanner is driven by the line, and when the signal line is the base potential, 'the scan lines are supplied. Controlling the signal, turning on the sampling electron cell to increase the source voltage of the pulsating transistor, and discharging the holding, so that the voltage between the gate and the source of the driving transistor tends to be corrected by the threshold voltage action. The display device of claim 2, wherein the write scanner is driven by a line, and when the signal line is a letter (four), a control signal is supplied to each scan line to enable the sampling transistor to perform a signal two. In the write operation of the holding capacitor; f, the signal selector is connected between adjacent blocks, so that the order of the potentials supplied to each k is opposite to each other. 5. The display device of claim 2, wherein the power supply scanner comprises a plurality of gate drivers corresponding to the respective blocks 133422.doc 200935384. 6. A display device comprising: a pixel array unit and a driving unit; wherein the pixel array unit includes: a column of scanning lines and a row of signal lines arranged in each of the scanning lines and the signal lines. Pixel-shaped pixels; each pixel includes at least: a sampling transistor, a driving transistor, a holding capacitor, and a light-emitting element; φ, wherein the sampling terminal is connected to the scanning line, and the pair of current terminals are connected to The signal line is connected to the control terminal of the driving transistor; the driving transistor system is connected to one of the current terminals to the light-emitting element and the other is connected to the power source; the holding capacitor is connected to the driving power. The control unit and the current end of the crystal; the drive unit includes at least: a write scanner that supplies a control signal to each scan line ;; and a signal selector that switches the signal potential and the reference for each signal line Supplying the potential; the sampling electric crystal system performs the threshold voltage correcting operation according to the control signal supplied to the scanning line when the signal line is at the reference potential Writing a voltage corresponding to the threshold voltage of the driving transistor to the holding capacitor, and when the signal line is at a signal potential, performing a signal potential writing operation according to a control signal supplied to the scanning line, from the # The image line is sampled and written to the holding capacitor; the driving electro-optical system supplies a current corresponding to the signal power 133422.doc 200935384 written in the holding capacitor to the light-emitting element to emit light; The pixel array unit divides the scanning lines by a specific number of segments and singulates and scans the scanning periods allocated to the specific number of scanning lines as a synthesis period divided into one of the first period and the second period; The device sequentially scans the pixel array portion in each synthesis period, and selects each of the blocks, and scans the first pair of the specific columns belonging to a block in each synthesis period. 7. 8. 8. Knowing the line-up supply control Signal, the threshold voltage correction action is performed in block units; Second: the second period 'scanning line for a specific number of blocks belonging to one block: human output control (four), proceeding Turn description, and performs a signal potential writing operation; "early in the neighboring blocks it by bit, for each scanning line sequentially outputs a control signal to the direction opposite to each other of the line sequential scanning. The display device of claim 6 wherein the aforementioned write scanner includes a plurality of gate drivers divided corresponding to the respective blocks. The display device of claim 6 is such that pixels adjacent to each other in the adjacent blocks are the same time after the correction operation is completed until the input signal potential writing operation is performed. The driving method of the device is the driving method of the display device described below. The display device includes: a pixel array portion that includes scan lines arranged in a column shape, configured as: shape=number line and configuration a pixel in which each scan line intersects each signal line; and a 133422.doc 200935384 drive unit that drives each pixel via the scan line and the signal line. The drive unit performs the following drive: Driving, which is divided into scanning blocks by a specific number of segments, and sequentially drives pixels in a row in a block unit; and the lines are sequentially driven, which scans each scanning line in each block to sequentially drive pixels in units; Between adjacent blocks, the scanning direction of the line is sequentially driven to be opposite to each other. 10. An electronic device comprising: a main body; and a display - information indicating that the Dan system is not input to the main body portion or outputted from the main body portion; the display portion includes a _: pixel array portion, the a column-shaped scanning line, a row-shaped signal line, and a portion of the pixel 1 U arranged in each of the scanning lines and each of the wales. The driving unit ' drives the respective moons via the scanning lines and the signal lines. The driver department performs the following driving: The block sequentially (4) 'the specific number of wires is divided into the block block' to block the block (four): the under-actuated line of pixels; and the DO line is driven in turn, which is scanned in each block The unit depends on the pixel; the column is opposite between adjacent blocks. Control the scanning direction for the line to drive in turn I33422.doc