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TW200643952A - Bidirectional split gate nand flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing - Google Patents

Bidirectional split gate nand flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing

Info

Publication number
TW200643952A
TW200643952A TW095111209A TW95111209A TW200643952A TW 200643952 A TW200643952 A TW 200643952A TW 095111209 A TW095111209 A TW 095111209A TW 95111209 A TW95111209 A TW 95111209A TW 200643952 A TW200643952 A TW 200643952A
Authority
TW
Taiwan
Prior art keywords
flash memory
nand flash
memory structure
erasing
programming
Prior art date
Application number
TW095111209A
Other languages
English (en)
Other versions
TWI405205B (zh
Inventor
Feng Gao
Ya-Fen Lin
John Cooksey
chang-yuan Chen
Yuniarto Widjaja
Dana Lee
Original Assignee
Silicon Storage Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Storage Tech Inc filed Critical Silicon Storage Tech Inc
Publication of TW200643952A publication Critical patent/TW200643952A/zh
Application granted granted Critical
Publication of TWI405205B publication Critical patent/TWI405205B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6894—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having one gate at least partly in a trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
TW095111209A 2005-05-20 2006-03-30 雙向分裂閘式反及閘快閃記憶體結構及陣列、其規劃、抹除及讀取方法、以及其製造方法 TWI405205B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/134,557 US7247907B2 (en) 2005-05-20 2005-05-20 Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing

Publications (2)

Publication Number Publication Date
TW200643952A true TW200643952A (en) 2006-12-16
TWI405205B TWI405205B (zh) 2013-08-11

Family

ID=37493317

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095111209A TWI405205B (zh) 2005-05-20 2006-03-30 雙向分裂閘式反及閘快閃記憶體結構及陣列、其規劃、抹除及讀取方法、以及其製造方法

Country Status (5)

Country Link
US (2) US7247907B2 (zh)
JP (2) JP5144026B2 (zh)
KR (1) KR101233127B1 (zh)
CN (1) CN1945836B (zh)
TW (1) TWI405205B (zh)

Cited By (1)

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TWI646588B (zh) * 2016-08-08 2019-01-01 超捷公司 形成低高度分離閘記憶體單元之方法

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US7755132B2 (en) * 2006-08-16 2010-07-13 Sandisk Corporation Nonvolatile memories with shaped floating gates
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US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US7668013B2 (en) * 2008-02-07 2010-02-23 Silicon Storage Technology, Inc. Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio
US8502296B1 (en) 2008-07-07 2013-08-06 National Semiconductor Corporation Non-volatile memory cell with asymmetrical split gate and related system and method
KR101478678B1 (ko) * 2008-08-21 2015-01-02 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
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CN103093814B (zh) * 2012-12-31 2015-12-09 清华大学 存储器阵列结构及其操作方法
US9548380B2 (en) * 2013-03-14 2017-01-17 Silicon Storage Technology, Inc. Non-volatile memory cell having a trapping charge layer in a trench and an array and a method of manufacturing therefor
CN104143552B (zh) * 2013-05-07 2018-02-06 北京兆易创新科技股份有限公司 一种电子捕获存储单元
US9390927B2 (en) * 2013-08-16 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Contact formation for split gate flash memory
US20150179749A1 (en) * 2013-12-19 2015-06-25 Silicon Storage Technology, Inc Non-volatile Memory Cell With Self Aligned Floating And Erase Gates, And Method Of Making Same
US9691883B2 (en) * 2014-06-19 2017-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Asymmetric formation approach for a floating gate of a split gate flash memory structure
US10431265B2 (en) * 2017-03-23 2019-10-01 Silicon Storage Technology, Inc. Address fault detection in a flash memory system
KR102554249B1 (ko) * 2018-02-02 2023-07-11 주식회사 디비하이텍 비휘발성 기억소자 및 그 제조방법
US11315636B2 (en) * 2019-10-14 2022-04-26 Silicon Storage Technology, Inc. Four gate, split-gate flash memory array with byte erase operation
KR102608913B1 (ko) * 2021-06-22 2023-12-01 주식회사 키파운드리 선택 게이트를 포함하는 비휘발성 메모리 소자 및 그 제조방법

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Also Published As

Publication number Publication date
KR101233127B1 (ko) 2013-02-15
TWI405205B (zh) 2013-08-11
US20060273378A1 (en) 2006-12-07
JP5144026B2 (ja) 2013-02-13
US7247907B2 (en) 2007-07-24
JP5579808B2 (ja) 2014-08-27
KR20060120494A (ko) 2006-11-27
JP2013033977A (ja) 2013-02-14
CN1945836A (zh) 2007-04-11
JP2006332640A (ja) 2006-12-07
US20070020853A1 (en) 2007-01-25
US7544569B2 (en) 2009-06-09
CN1945836B (zh) 2012-01-18

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