KR100908065B1 - Broadcasting transmitter/receiver and method of processing broadcasting signal - Google Patents

Abstract

The present invention relates to a digital broadcasting transmission / reception system. In particular, the present invention inserts and transmits predetermined known data known to the transmission / reception side at a specific position of a data area where enhanced data is transmitted. In addition, by using the known data in the demodulation or equalization process, the reception side can improve reception performance in an environment in which channel variation or noise is weak.

VSB, Base Data

Description

Broadcasting transmitter / receiver and method of processing broadcasting signal}

The present invention relates to a digital communication system, and more particularly, to a digital broadcast transmission / reception system for transmitting and receiving a modulation by a VSB (Vestigial Side Band) scheme, and a data structure.

In the United States, ATSC 8T-VSB transmission system was adopted as a standard in 1995 for terrestrial digital broadcasting, and broadcasted since the second half of 1998.In Korea, ATSC 8T-VSB transmission system, which is identical to the US method, was adopted as a standard in May 1995. Experimental broadcasting was started, and on August 31, 2000, the test broadcasting system was switched.

1 shows a conventional ATSC 8T-VSB transmission system. The data randomizer randomizes the input MPEG video / audio data, and the Reed-Soloron encoder adds 20 bytes of parity code by Reed-Solomon encoding the data, and the data interleaver interleaves the data, and the trellis encoder Converts the data from bytes into symbols and then trellis-codes them. The mux muxes the symbol strings and sync signals, the pilot inserter adds the pilot signal to the symbol strings, the VSB modulator modulates the symbol strings into an 8 VSB signal in the middle frequency band, and the RF converter converts the middle frequency signal into an RF band signal. Transmit to transmit via antenna.

The 8T-VSB transmission system, adopted as a digital broadcasting standard in North America and Korea, is a system developed for transmission of MPEG video / audio data. However, with the rapid development of digital signal processing technology and the widespread use of the Internet, digital home appliances, computers, and the Internet are being integrated into one big framework. Therefore, in order to meet various needs of users, it is necessary to develop a system capable of transmitting various additional data in addition to video / audio data through a digital broadcasting channel.

Some users of supplementary data broadcasting are expected to use supplementary data broadcasting by using PC card or portable device equipped with simple indoor antenna. In the room, signal strength is greatly reduced by wall blocking and influence of proximity moving body. Due to the effects of ghosts and noise caused by reflected waves, broadcast reception performance may deteriorate. However, unlike general video / audio data, the additional data transmission should have a lower error rate. In the case of video and audio data, the error that the human eye and ear cannot detect is not a problem, whereas in the case of additional data (eg program execution file, stock information, etc.), a bit error may occur. It can cause problems. therefore There is a need to develop a system that is more resistant to ghosting and noise in the channel.

The transmission of additional data will usually be done in a time division manner over the same channel as the MPEG video / sound. Since the beginning of digital broadcasting, however, ATSC VSB digital broadcasting receivers that receive only MPEG video / audio have been widely used in the market. Therefore, additional data transmitted on the same channel as MPEG video / audio should not affect the existing ATSC VSB-only receivers that have been used in the market. Such a situation is defined as ATSC VSB compatible, and the additional data broadcasting system should be compatible with the ATSC VSB system. The additional data may also be referred to as enhanced data or EVSB data.

In addition, in a poor channel environment, the reception performance of the conventional ATSC VSB receiving system may be degraded. Especially in the case of portable and mobile receivers, robustness against channel changes and noise is required.

Accordingly, the present invention has been made to solve the above problems, and proposes a new VSB transmission system suitable for additional data transmission and resistant to noise.

Another object of the present invention is to provide a transmission system and a reception system for improving decoding performance of additional data symbols.

It is still another object of the present invention to provide a transmission system, a reception system, and a data structure for improving reception performance by inserting and transmitting data known to a transmission / reception side into a specific area of data.

A feature of the present invention for achieving the above object is to insert the known data (Known data) already known to the input data by a predetermined rule and then output in a predetermined packet unit. The rule is described later in detail.

The packet into which the known data is inserted is divided into at least two areas and inserted into the field.

The packet into which the known data is inserted includes at least an area in which the trellis encoder can not be initialized and an area in which the trellis encoder can be initialized. The division of the area depends on the order of segments.

In the region where the trellis encoder can be initialized, part or all of the trellis encoder is initialized, and is replaced with initialization data.

A digital broadcast transmission system for performing the above includes: a packet formatter for adding known data to the enhanced data to be input and outputting it in units of packets; An RS encoder and data interleaver for performing RS encoding and interleaving on the output of the packet formatter; A trellis encoder for initializing the output data of the data interleaver and known data, and performing trellis encoding after outputting the memory data after initializing the continuous known data sequence; A compatibility processor which recalculates parity from an output of the RS encoder and an output of the trellis encoder and outputs the parity to be replaced with a parity of a parity position input to the trellis encoder; And a transmitter for inserting a synchronization signal into an output of the trellis encoder and transmitting the modulation signal through a modulation process.

The format converter may include a known data generator configured to generate predefined known data; And a multiplexer for multiplexing and outputting the MPEG header, the input enhanced data, and the generated known data by packet unit, wherein the multiplexer determines the known data position in the packet according to the segment order, It characterized in that the output.

Each data segment constituting the transmission frame according to the present invention includes: an area into which an MPEG header is inserted; An area into which known data is inserted; An area into which enhanced data is inserted; And an area in which parity data is inserted, wherein the location of the known data area is determined according to the segment order.

The data of the known data area is data that is trellis encoded by an initializeable trellis encoder, and the known data area is divided into an area that can be initialized and an area that cannot be initialized. It is done.

The broadcast transmitter / receiver and broadcast signal processing method according to the present invention have the advantage of being resistant to errors and compatible with existing VSB receivers when transmitting additional data through a channel. It has the advantage that additional data can be received without error even in ghost and noisy channel than conventional VSB system. In particular, by inserting and transmitting known data in a specific position of the data area, it is possible to improve the reception performance of a receiving system with a large channel change. In particular, the present invention is more effective when applied to portable and mobile receivers that require severe channel changes and robustness against noise.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 shows a general VSB transmission frame structure in which one frame consists of two fields and each field consists of one field sync segment and 312 data segments.

The present invention is to improve the reception performance of a receiver by inserting and transmitting predetermined known data at a specific position in the data segment.

3 is a block diagram illustrating the overall configuration of a digital transmission system according to the present invention. 3 shows an EVSB preprocessor 301, an EVSB packet formatter 302, a packet multiplexer 303, a data randomizer 304, an EVSB postprocessor 310, an RS encoder 321, a data interleaver 322, It is composed of a trellis encoder 323, a compatibility processor 324, a frame multiplexer 325, and a transmitter 330.

In the present invention configured as described above, the main MPEG packet is output to the packet multiplexer 303 and the enhanced MPEG stream is output to the EVSB preprocessor 301. The EVSB preprocessor 301 performs preprocessing such as additional error correction encoding and null data insertion on the enhanced MPEG stream and outputs the result to the EVSB packet formatter 302.

The EVSB packet formatter 302 arranges the preprocessed data and the predetermined known data at a specific position of the packet according to a predetermined rule, and outputs the packet to the packet multiplexer 303 as a predetermined unit of packets. Detailed operations of the EVSB packet formatter 302 will be described later in detail.

The packet multiplexer 303 multiplexes the enhanced MPEG packet and the main MPEG packet outputted by inserting the known data from the EVSB packet formatter 302 according to a predefined multiplexing rule and through the data randomizer 304. Output to the post-processing unit 310.

The EVSB post processor 310 includes an RS encoder 311, a data interleaver 312, a convolutional encoder 313, a data deinterleaver 314, and an RS byte remover 315.

The RS encoder 311 performs RS encoding on the output of the data renderer 304, adds 20 bytes of parity data, and outputs the parity data to the data interleaver 312.

FIG. 4 is a diagram illustrating an embodiment of the data interleaver 312, and shows an example of a convolutional interleaver having 52 branches and a unit memory byte number M = 4.

For example, the data interleaver 312 is first outputted directly through the first branch when the first byte is input, and the second byte is input through the second branch, thereby outputting a value of 52 * 4 bytes earlier. .

FIG. 5 shows an example of an input and output order of the data interleaver of FIG. 3 on a frame. Data input is entered from top to bottom in segment units, and bytes within the segment are entered first temporally from left to right. The numbers on the figure show the output order of the interleaver. The data interleaver 312 operates in units of 52 segments.

The output of the data interleaver 312 is output to the convolutional encoder 313, convolutionally encoded, and then to the RS byte remover 315 through the data interleaver 314 to remove 20 bytes of parity. This is to calculate the parity again since the original data has been changed by the convolutional encoder 313. The convolutional encoder 313 converts the input byte into a symbol to perform convolutional encoding only on the enhanced data symbol, and then converts the converted byte into a symbol and outputs the byte. That is, when the output of the data interleaver 312 is main data or known data inserted into an enhanced data packet, the convolutional encoder 313 outputs the data without changing the data. In addition, the convolutional encoder 313 outputs the MPEG header byte added by the EVSB packet formatter or the RS parity byte added to the enhanced data packet by the RS encoder 311 without changing the data.

That is, the output of the RS byte remover 315 is input to the RS encoder 321, RS encoded, and 20 bytes of parity is added again and then output to the data interleaver 322.

The operation of the data interleaver 322 may be omitted by referring to FIGS. 3 and 4.

The output of the data interleaver 322 is input to the trellis encoder 323, and the trellis encoder 323 codes the input 2 bits into 3 bits and outputs the result to the frame multiplexer 325. do.

In order to use the output data of the trellis encoder 323 as known data defined on the transmitting / receiving side, initialization of the memory in the trellis encoder 323 is required for the known data inserted in the EVSB packet.

In this case, since the initialization is performed by new data rather than input data, RS parity must be regenerated and replaced with original parity data. The compatibility processing unit 324 performs this. The initialization process of the trellis encoder 323 and the detailed operation of the compatibility processor 324 will also be described later.

The output of the trellis encoder 325 is input to the frame multiplexer 325, and the frame multiplexer 325 inserts field synchronization and segment synchronization into the output of the trellis encoder 325 and transmits the result. Output to (330). The transmitter 330 includes a pilot inserter 331, a VSB modulator 333, and an RF converter 334, and a detailed description thereof will be omitted with reference to FIG. 1.

Next, detailed operations of the packet formatter 302 will be described.

FIG. 6 is an internal configuration diagram of the packet formatter of FIG. 3. The known data generation unit 511 for generating known data, and the EVSB preprocessing unit 301 multiplex and output data and MPEG header bytes that have been preprocessed. It consists of a multiplexer 513.

In more detail, the multiplexed and outputted known data is separated from the synchronization data used as conventional reference data in the structure of the VSB transmission frame before the final transmission after interleaving and trellis encoding. Used for channel equalization and demodulation. In this way, the reception performance can be improved. In addition, the output of the packet formatter is output in units of 188 bytes. The first 4 bytes are MPEG header bytes, and the remaining 184 bytes are multiplexed from the known data and the output data of the EVSB preprocessor 301.

FIG. 7 shows the data output from the RS encoder 321 of the EVSB post-processor 310 in a frame structure, and is not a final frame. In other words, as showing some of the data segments in the frame, it shows an example of inserting known data in the packet formatter 302. Figure 7 shows the configuration of 52 segments of interleaving depth for convenience of understanding. In the ATSC VSB system, the packet at the data interleaver 312 input terminal is also called a data segment.

Referring to FIG. 7, there are largely four data areas. That is, the header area 701 includes a payload area 702 that can receive only EVSB data, a parity area 703, and a known data area 704 that can come with known data.

The known data area 704 is further divided into an area 705 in which the trellis encoder can be initialized and an area 706 in which the trellis encoder can not be initialized.

The initializeable region 705 of the trellis encoder is positions of bytes output from the interleaver in time before the parity byte of the corresponding segment. At this time, when the data inputted to the trellis encoder 323 is the beginning of the known data string or when the data is changed from the EVSB data to the known data, part or all of the data that can be initialized by the trellis encoder is replaced with initialization data. And input to the memory of the trellis encoder 323. Some or all known data may come to the region 705 in which the trellis encoder can be initialized, or EVSB data may come.

Known data may come from the region 706 in which the trellis encoder cannot be initialized, general EVSB data may come, and the size of the two data may be appropriately modified by the designer. That is, the amount of known data and EVSB data are relative to each other.

In addition, the sizes of the region 705 that can be initialized and the region 706 that cannot be initialized are different for each segment.

According to an embodiment of the present invention, the embodiment of the present invention will vary according to the segment order determined by the interleaving unit.

8 shows a part of each segment order and configuration of data in each segment in the transmission frame structure. This is done so that known data of each segment possible after data interleaving can be collected in a specific area.

For example, in a segment having an interleaving depth of 52 and a sequence (e) equal to or greater than 13 and less than or equal to 30, an area in which the trellis encoder cannot be initialized after the header area, an area that can be initialized, and a pay The load regions exist sequentially, and the parity region exists after the regions are repeated four times.

When data is interleaved in the data interleaver 322 with the above structure, it has a frame structure as shown in FIG.

9, there is data of header areas first, followed by data of known data areas. That is, it can be seen that known data scattered in each segment before data interleaving are collected in a plurality of segments after data interleaving. Following the known data areas are data of parity areas and data of payload areas.

FIG. 10 illustrates an example of a detailed block diagram of an initializeable trellis encoder 323 that trellis-codes the data interleaver 322 using interleaved data as shown in FIG. 9.

Referring to FIG. 10, a multiplexer 611 for multiplexing and outputting interleaved data, a parity byte output from the compatibility processor 324, and initialization data according to a predetermined rule, and the output data of the multiplexer 611 are trellid. A trellis encoder 612 for encoding and outputting a signal and an initialization controller for generating initialization data for initializing the memory of the trellis encoder 612 and outputting the initialization data to the multiplexer 611 and the compatibility processor 324. 613.

In other words, if the interleaved data is known data and the beginning of the known data string to which the known data is continuously input, the trellis encoder 612 needs to be initialized. This is for outputting desired known data after trellis coding. When memory initialization of the trellis encoder 612 is required, a part of the known data should be replaced with initialization data and output to the trellis encoder 612. Then, the memory in the trellis encoder is initialized by the initialization data, and the output of the trellis encoder outputs encoded known data of a desired type on the transmitting / receiving side.

If the data interleaved and output are known data and need to be initialized, the multiplexer 611 replaces a part of the interleaved data with initialization data and outputs the data to the trellis encoder 612, and the parity position in each segment. In this case, the parity data output from the compatibility processor 324 is output to the trellis encoder 612.

 The trellis encoder 612 trellis-codes the data output from the multiplexer 611 in symbol units.

That is, the trellis encoder 612 codes the upper bits constituting one symbol into one bit using one memory and outputs the lower bits by coding two bits using two memories. In this case, when known data is input, the memories must be initialized to output desired data after trellis encoding.

To this end, the initialization controller 613 generates the initialization data based on the state of the memory and outputs the initialization data to the multiplexer 611 when memory initialization is required. The initialization data consists of 4 bits, that is, two symbols.

At this time, the trellis encoder is composed of 12, and the 12 bytes output from the multiplexer 611 are sequentially input to each trellis encoder. Here, the initial four bits of each byte, that is, two symbols, may be initialization data.

  In addition, the initialization controller 613 outputs initialization data to the compatibility processor 324.

That is, since the memory is initialized by new data instead of the interleaved data, RS parity must be regenerated and replaced with original parity data.

The compatibility processing unit 324 performs this.

The compatibility processor 324 receives the output of the RS encoder 321 and the output of the initialization controller 613 of the trellis encoder 323, generates 20 bytes of parity, and outputs the parity to the multiplexer 611. .

The output of the trellis encoder 323 is output to the frame multiplexer 325.

The frame multiplexer 325 inserts field sync and segment sync into the output of the trellis encoder 323 and transmits the same through the transmitter 330.

FIG. 11 is a block diagram illustrating an embodiment of a VSB receiving system for receiving, demodulating, and equalizing data transmitted from a VSB transmitting system as shown in FIG. 3 to restore original data.

11 shows a tuner 711, a demodulator 712, an equalizer 713, a known data detector 714, a Viterbi decoder 715, a deinterleaver 716, an RS decoder 717, and a derandomizer ( 718).

In addition, the VSB receiving system includes a main packet remover 719, an MPEG header remover 720, a packet deformatter 721, and an enhanced data processor 722.

That is, the tuner 711 tunes down-converts the frequency of a specific channel and outputs it to the demodulator 712.

The demodulator 712 demodulates the tuned channel frequency in the inverse of the transmission scheme and outputs the demodulated signal to the equalizer 713 and the known data detector 704. For example, the demodulator 712 performs carrier recovery, timing recovery, and the like.

The equalizer 713 compensates for the distortion on the channel included in the demodulated signal through frequency capturing and tracking, and outputs the same to the Viterbi decoder 715.

At this time, the known data detector 714 detects the known data inserted by the transmitter from the output data of the demodulator 712 and outputs the known data to the demodulator 712 and the equalizer 713.

The demodulator 712 can improve demodulation performance by using the known data during timing recovery or carrier recovery, and the equalizer 713 can use the known data during frequency acquisition and tracking to achieve equalization performance. Can improve.

The output of the equalizer 713 passes through the Viterbi decoder 715, the deinterleaver 716, the RS decoder 717, and the derandomizer 718 and then to the main MPEG decoder (not shown). It is output to the main packet removing unit 719.

  The main MPEG decoder decodes only packets corresponding to the main MPEG. If the packet ID is EVSB, no decoding is performed.

The main packet remover 719 removes the main packet from the output of the derandomizer 718 and outputs the main packet to the MPEG header remover 720. The MPEG header remover 720 removes the MPEG header from the signal output from the main packet remover 719 and outputs the MPEG header to the packet deformatter 721. The packet deformatter 721 removes the known data included in the input signal and outputs it to the enhanced data processor 722.

As described above, those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

1 is a block diagram of a general digital broadcast transmission system

2 is a view showing the structure of a typical VSB transmission frame

3 is a block diagram illustrating a digital broadcast transmission system according to the present invention.

4 is a block diagram illustrating an embodiment of the data interleaver of FIG. 3.

5 is a diagram illustrating an example of an operation of the data interleaver of FIG. 3 on a frame;

FIG. 6 is a detailed block diagram illustrating an embodiment of the packet formatter of FIG. 3. FIG.

7 illustrates a frame structure showing an example of inserting known data before interleaving according to the present invention.

FIG. 8 is a diagram illustrating an example of inserting known data of FIG. 7 by segment. FIG.

9 is a view showing a frame structure of an example of insertion of known data after interleaving according to the present invention;

10 is a detailed block diagram of a trellis encoder according to an embodiment of the present invention.

11 is a block diagram showing the overall configuration of an embodiment of a digital broadcast reception system according to the present invention.

Explanation of symbols for the main parts of the drawings

301: EVSB preprocessor 302: EVSB packet formatter

303: packet multiplexer 304: data randomizer

310: EVSB post-processing unit 311: RS encoder

312 data interleaver 313 convolutional encoder

314: Data Deinterleaver 315: RS Byte Eliminator

321 RS encoder 322 data interleaver

323 trellis encoder 324 compatibility processor

325: frame multiplexer 330: transmitter

Claims (6)

In the method for processing a DTV broadcast signal transmitted from a broadcast transmitter in a broadcast receiver, Receiving a DTV broadcast signal including first known data mutually known at a transmitter / receiver, used to improve reception performance of enhanced data; The first known data may include: initializing a memory of a trellis encoder by initialization data at the broadcast transmitter; inputting second known data located after the initialization data to the trellis encoder; Generating first known data by performing trellis coding on the input second known data based on the initialized memory; Detecting the first known data; And And compensating for channel distortion with respect to enhanced data included in the DTV broadcast signal based on the detected first known data. The method of claim 1, Removing normal data included in the DTV broadcast signal; and processing the DTV broadcast signal in a broadcast receiver. The method of claim 2, And processing enhanced data which is a DTV broadcast signal from which the normal data has been removed. A broadcast receiver for processing a DTV broadcast signal transmitted from a broadcast transmitter, A tuner for receiving a DTV broadcast signal including first known data mutually known at a transmitter / receiver, used to improve reception performance of enhanced data; A known data detector for detecting the first known data; And And a channel equalizer configured to compensate for channel distortion with respect to enhanced data included in the DTV broadcast signal based on the detected first known data. The first known data initializes the memory of the trellis encoder by the initialization data at the broadcast transmitter, inputs the second known data located next to the initialization data into the trellis encoder, and inputs the initialized memory. And a trellis encoding is performed by the trellis encoder on the input second known data as a basis. The method of claim 4, wherein And a normal data remover for removing normal data included in the DTV broadcast signal. The method of claim 5, And an enhanced data processor configured to process enhanced data that is a DTV broadcast signal from which the normal data has been removed.

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