KR100724257B1 - Photo diode of image sensor and method for forming the same - Google Patents

Abstract

The present invention provides a photodiode of an image sensor and a method of forming the same that can minimize the defects caused by damage to the substrate during the photodiode forming process to suppress dark current generation and increase the capacitance of the photodiode to improve device performance. To this end, the present invention provides a substrate having a first conductive epitaxial layer, a second conductive doped region formed in the first conductive epitaxial layer, an insulating film formed on the second conductive doped region, Provided is a photodiode of an image sensor including a first conductivity type doped region formed on the insulating layer.

Image Sensor, CMOS, CCD, Photodiode

Description

Photodiode of image sensor and its formation method {PHOTO DIODE OF IMAGE SENSOR AND METHOD FOR FORMING THE SAME}

1 is a circuit diagram showing a unit pixel of a general CMOS image sensor.

2 is a cross-sectional view showing unit pixels of a conventional CMOS image sensor.

3 is a sectional view showing an image sensor according to a preferred embodiment of the present invention.

4A to 4C are cross-sectional views illustrating a manufacturing process of an image sensor according to a preferred embodiment of the present invention shown in FIG.

<Description of the symbols for the main parts of the drawings>

10, 110: P ++ substrate 11, 111: P- epi layer

12, 112: device isolation film 13, 113: gate insulating film

14, 114: polysilicon film 15, 115: n-doped region

16, 116: spacer 17, 118: P ° doping area

18, 119: n + doped region 117: insulating film

20: lower planarization film 21: upper planarization film

23: microlens 24: passivation layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a photodiode of a charge coupled device (CCD) and a complementary metal-oxide-semiconductor (CMOS) image sensor and a method of forming the same.

Recently, the demand of digital cameras is exploding with the development of video communication using the Internet. Moreover, the demand for small camera modules increases as the popularity of mobile communication terminals such as PDAs equipped with cameras, International Mobile Telecommunications-2000 (IMT-2000), Code Division Multiple Access (CDMA) terminals, etc. increases. Doing.

As a camera module, an image sensor module using a Charge Coupled Device (CCD) or a Complementary Metal-Oxide-Semiconductor (CMOS) image sensor, which are basic components, is widely used. The image sensor is arranged on the upper part of the light sensing unit for generating and accumulating photocharges from the outside to implement a color image. Such color filter arrays (CFAs) are red (R), green (G) and blue (B), or yellow, magenta, and cyan. It consists of a branch collar. Typically, three colors, red (R), green (G), and blue (B), are used in a color filter array of a CMOS image sensor.

Such an image sensor is a semiconductor device that converts an optical image into an electrical signal. As described above, a CCD and a CMOS image sensor have been developed and widely commercialized. A CCD is a device in which charge carriers are stored and transported in a capacitor while individual metal-oxide-silicon (MOS) capacitors are in close proximity to each other. On the other hand, a CMOS image sensor uses a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits to make MOS transistors by the number of pixels, and uses the switching to detect an output sequentially. It is a device employing the method.

However, CCD has many disadvantages such as complicated driving method, high power consumption, large number of mask processes, complicated process, and difficult to implement signal processing circuit in the CCD chip. Recently, researches on the development of CMOS image sensors using sub-micron CMOS manufacturing techniques have been enthusiastically performed to overcome the disadvantages of the CCD.

The CMOS image sensor forms an image by forming a photo diode and a MOS transistor in a unit pixel and sequentially detects a signal in a switching method. Since the CMOS manufacturing technology is used, the power consumption is low and the number of masks is approximately. Compared to CCD process, which requires 30 to 40 masks, the process is very simple, and many signal processing circuits and one-chips are possible.

In general, the CMOS image sensor is composed of a light sensing unit for detecting light and a logic circuit unit for processing the light detected by the light sensing unit into an electrical signal and converting the data into an electric signal. Efforts are underway to increase this fill factor. However, there is a limit to this effort under a limited area since the logic circuit part cannot be removed essentially. Accordingly, in order to increase the light sensitivity, a condensing technology that changes the path of light incident to an area other than the light sensing unit and collects the light sensing unit has emerged. For this purpose, an image sensor forms a microlens on a color filter. I'm using the method.

1 is a circuit diagram illustrating a unit pixel of a general CMOS image sensor.

Referring to FIG. 1, a unit pixel of a CMOS image sensor includes one photo diode (PD) and four MOS transistors, and the four MOS transistors include a transfer transistor (Tx), a reset transistor (Rx), and a drive. It consists of a transistor MD and a selector transistor Sx. A load transistor is formed outside the unit pixel to read an output signal. Unexplained reference 'Cfd' indicates the capacitance of the floating diffusion.

FIG. 2 is a cross-sectional view illustrating only the gate electrode of the photodiode PD and the transfer transistor Tx as a lower structure among the unit pixels of the general CMOS image sensor illustrated in FIG. 1.

Referring to FIG. 2, a low concentration P-epi layer (P-epi) 11 is grown on the p ++ silicon substrate 10, and the device isolation layer 12 is formed in a predetermined region. Thereafter, the gate oxide layer 13 and the polysilicon layer 14 are sequentially deposited on the substrate 10 and then etched to form a gate electrode Tx of the transfer transistor. Then, without removing the gate pattern mask used as an etch mask to define the gate electrode Tx of the transfer transistor, an n-ion implantation mask is formed thereon, and then a low concentration n-ion using an n-ion implantation mask. The implantation process is performed to form the n-doped region 15 in the p- epi layer 11.

Subsequently, after removing the gate pattern mask and the n-ion implantation mask, P ⁰ After the ion implantation mask is formed, a P ⁰ ion implantation process using a P ^O ion implantation mask is performed to form the P ⁰ doped region 17 on the upper surface of the wafer between the device isolation layer 12 and the gate electrode Tx of the transfer transistor. Form. Then, carry out a stripping process so that P ⁰ After removing the ion implantation mask, an n + ion implantation process using an n ⁺ ion implantation mask is performed to form n ⁺ doped region 18 between the gate structure Tx of the transfer transistor and the device isolation layer 12.

Subsequently, a plurality of metal wirings are formed by circuit wiring between the plurality of interlayer insulating films 19 and the interlayer insulating films 19 over the entire structure including the gate structure Tx of the transfer transistor.

In the following description, a structure completed up to an interlayer insulating film and a metal wiring is shown as a lower structure.

Subsequently, after forming the lower planarization layer 20 with an over coating layer (OCL) on the lower structure, three colors of colors for implementing a color image on the lower planarization layer 20 corresponding to the photodiode region PD are formed. The filter 21 is formed. Then, the upper planarization layer 22 is formed to cover the color filter 21, and then the microlens 23 is formed to correspond to the color filter 21 thereon. Then, the final passivation layer 24 is formed thereon.

A photodiode (PD) of the process of manufacturing the image sensor according to the prior art as described above is formed by performing the ion implantation process n- and p ⁰ ion implantation process. In this case, in order to prevent the substrate 10 from being damaged, a screen oxide is formed on the upper surface of the substrate 10. However, even if the screen oxide film is formed, damage to the substrate 10 in the ion implantation process for forming the photodiode PD is inevitable.

The defect caused by the damage of the substrate 10 causes a dark current of the photodiode PD to increase. Here, the dark current is caused by electrons moving from the photodiode PD to the floating diffusion region FD even in the absence of light, and the dark current mainly exists at the edge portion of the active region or on the surface of the substrate. It has been reported to originate from line defects, point defects, etc. or dangling bonds, and dark currents can cause serious problems in low illumination environments.

Accordingly, the present invention has been made to solve the above problems, to provide a photodiode of an image sensor and a method of forming the same that can suppress the generation of dark current by minimizing defects caused by damage to the substrate during the photodiode forming process. There is a purpose.

In addition, another object of the present invention is to provide a photodiode of an image sensor and a method of forming the same that can increase the capacitance of the photodiode to improve device performance.

According to an aspect of the present invention, there is provided a substrate including a first conductive epitaxial layer, a second conductive doped region formed in the first conductive epitaxial layer, and the second conductive doped region. Provided is a photodiode of an image sensor including an insulating film formed thereon and a first conductive doped region formed on the insulating film.

Preferably, the insulating film is formed of a SiO ₂ film by a deposition process.

Preferably, the first conductivity type doped region is formed in an in-situ doping manner.

Preferably, the first conductivity type doped region is formed by an ion implantation process using impurity ions in the growth layer after growing the insulating layer to form a growth layer.

Preferably, the first conductivity type doped region is doped with p-type impurity ions.

According to another aspect of the present invention, there is provided a substrate on which a first conductive epitaxial layer is formed, and forming a second conductive doped region in the first conductive epitaxial layer. And forming an insulating film on the second conductive doped region, and forming a first conductive doped region on the insulating film.

Preferably, the insulating film is formed of a SiO ₂ film using a deposition process.

Preferably, the first conductivity type doped region is formed in an in-situ doping manner.

Preferably, the first conductivity type doped region is formed by growing an insulating film to form a growth layer and then performing an ion implantation process using impurity ions in the growth layer.

Preferably, the ion implantation process is carried out at 10 ~ 100 KeV ion implantation energy using a dose of 1.0E11 ~ 9.0E13 atoms / cm ² using BF ₂ or B.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. In addition, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and in the case where the layers are said to be "on" another layer or substrate, they may be formed directly on another layer or substrate or Or a third layer may be interposed therebetween. In addition, the same reference numerals throughout the specification represent the same components.

Example

3 is a cross-sectional view illustrating a photodiode of an image sensor according to a preferred embodiment of the present invention. For convenience of description, only the gate electrodes of the photodiode PD and the transfer transistor Tx are shown among the unit pixels of the CMOS image sensor.

As shown in FIG. 3, a photodiode of an image sensor according to an exemplary embodiment of the present invention includes an n-doped region 115 formed in a p-epi layer 111 of a substrate 110 and an n-doped region ( An insulating film 117 formed on the insulating film 117 and a p ⁰ doped region 118 formed on the insulating film 117.

As described above, in the photodiode of the image sensor according to the preferred embodiment of the present invention, the lower and upper portions of the photodiode are surrounded by the n − doped region 115 formed at the lower portion and the p ⁰ doped region 118 formed at the upper portion thereof. It is formed of a pinned type photodiode. In this case, when the photodiode is reset, the depletion layer formed by the n-doped region 115 is increased by the insulating film 117, which depletes the photocharges generated by the incident light. Accumulation and storage will eventually increase the capacitance of the entire photodiode.

Meanwhile, the n-doped region 115 is formed relatively deep in the substrate 110 by an ion implantation process. At this time, the ion implantation process is carried out at ion implantation energy of 50 ~ 200 KeV using phosphorus (P) or arsenic (Arsenic, As) impurity ions.

In addition, the insulating film 117 is formed of a SiO ₂ film with a thickness of 1 to 500 nm. The insulating layer 117 is formed on the substrate 110 to cover the n-doped region 115 using a deposition process.

In addition, the p ⁰ doped region 118 is formed by growing the SiO ₂ insulating layer 117 and implanting BF ₂ or boron (B) impurity ions into the grown region. At this time, the ion implantation step is performed at ion implantation energy of 10 to 100 KeV with a dose of 1.0E11 to 9.0E13 atoms / cm ² .

Hereinafter, a process of forming a photodiode of an image sensor according to an exemplary embodiment of the present invention shown in FIG. 3 will be described with reference to FIGS. 4A to 4C. 4A to 4C are cross-sectional views of the process.

First, as shown in FIG. 4A, a low concentration P-epi layer (P-epi) 111 is grown on the p ++ silicon substrate 110, and the device isolation layer 112 is formed in a predetermined region. In this case, the device isolation layer 112 is formed of a high-density plasma (HDP) oxide film having a high coating property by using a shallow trench isolation (STI) process widely used in the semiconductor field.

Subsequently, the gate oxide layer 113 and the polysilicon layer 114 are sequentially deposited on the substrate 110, and then the gate oxide layer 113 and the polysilicon layer 114 are etched by performing a mask process and an etching process. As a result, the gate electrode Tx of the transfer transistor is formed.

Subsequently, an n-ion implantation mask is formed through a mask process, and then a low concentration n-ion implantation process using an n-ion implantation mask is performed to form an n-doped region 115 in the p- epi layer 111. At this time, the low concentration n-ion implantation process is carried out with ion implantation energy of 50 ~ 200 KeV using phosphorus or arsenic.

Subsequently, an LDD (Lightly Doped Drain) spacer 116 may be formed on both sidewalls of the gate electrode Tx. In this case, the spacer 116 may be formed of at least one of a silicon oxide film (SiO ₂ ) and a silicon nitride film (SiON) in a single layer or a stacked structure.

Next, as shown in FIG. 4B, an insulating film 117 is deposited on the n-doped region 115. At this time, the insulating film 117 is deposited to a thickness of 1 ~ 500nm with a SiO ₂ film by using a deposition process such as chemical vapor deposition (CVD), physical vapor deposition (PVD), spin process.

Next, as illustrated in FIG. 4C, a p ⁰ doped region 118 is formed on the insulating layer 117. In this case, the p ⁰ doped region 118 is formed in an in-situ doped manner to grow the insulating film 117 and inject p-type impurity ions into the in-situ, or the insulating film 117. ) May be formed by implanting p-type impurity ions into the growth layer. In this case, when the ion implantation process is performed on the growth layer, the ion implantation process is performed at ion implantation energy of 10 to 100 KeV with a dose of 1.0E11 to 9.0E13 atoms / cm ² using BF ₂ or B.

Subsequently, an n + doped region, that is, a floating diffusion region 119 is formed in the p− epi layer 111 exposed to one side of the gate electrode Tx.

Although the technical spirit of the present invention has been described in detail in the preferred embodiments, it should be noted that the above-described embodiments are for the purpose of description and not of limitation. In addition, it will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, according to the present invention, the following effects can be obtained.

First, the present invention provides a conventional p ⁰ by interposing an insulating film between the n-doped region and the p ⁰ doped region ^. In the ion implantation process to form the doped region, damage to the substrate may be prevented from occurring inherently, thereby preventing the generation of dark currents due to defects on the surface of the substrate.

In addition, the present invention is formed by the n-doped region by forming a pinned type photodiode such that the insulating film is formed at the lower portion and the upper and lower portions are surrounded by the p ⁰ doped region formed thereon. The depletion layer may be increased by the insulating layer, and the depletion layer may accumulate and store photocharges generated by incident light, thereby increasing the capacitance of the entire photo diode, thereby improving performance of the image sensor.

Claims (10)

a substrate on which a p- epi layer is formed; An n-doped region formed in the p- epi layer; An insulating film formed on the n-doped region; And A p ⁰ doped region formed on the insulating film; Photodiode of the image sensor comprising a. The method of claim 1, The insulating film is a photodiode of an image sensor formed of a SiO ₂ film by a deposition process. The method of claim 2, The p ⁰ doped region is a photodiode of an image sensor formed in an in-situ doping method. The method of claim 2, The p ⁰ doped region is a photodiode of an image sensor formed by an ion implantation process using impurity ions in the growth layer after growing the insulating layer to form a growth layer. The method according to claim 3 or 4, The p ⁰ doped region is a photodiode of an image sensor doped with p-type impurity ions. Forming an epitaxial layer of a first conductivity type on the substrate; Forming a first doped region in the epi layer with a second conductivity type; Forming an insulating film on the first doped region; And Forming a second doped region with the first conductivity type on the insulating film Photodiode manufacturing method of an image sensor comprising a. The method of claim 6, The insulating film is a photodiode manufacturing method of the image sensor to form a SiO ₂ film using a deposition process. The method of claim 7, wherein And the second doped region is formed in an in-situ doped manner. The method of claim 7, wherein And the second doped region is formed by growing an insulating layer to form a growth layer and performing an ion implantation process using impurity ions in the growth layer. The method of claim 9, The ion implantation process is a photodiode manufacturing method of the image sensor is carried out at 10 ~ 100 KeV ion implantation energy using a dose of 1.0E11 ~ 9.0E13 atoms / cm ² using BF ₂ or B.

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