JPS6437032A - Bendable lead frame assembly of integrated circuit and integrated circuit package - Google Patents
Bendable lead frame assembly of integrated circuit and integrated circuit packageInfo
- Publication number
- JPS6437032A JPS6437032A JP63176208A JP17620888A JPS6437032A JP S6437032 A JPS6437032 A JP S6437032A JP 63176208 A JP63176208 A JP 63176208A JP 17620888 A JP17620888 A JP 17620888A JP S6437032 A JPS6437032 A JP S6437032A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- metal
- leads
- lead frame
- frame assembly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49534—Multi-layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12033—Gunn diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/073,557 US4801999A (en) | 1987-07-15 | 1987-07-15 | Integrated circuit lead frame assembly containing voltage bussing and distribution to an integrated circuit die using tape automated bonding with two metal layers |
US73,557 | 1987-07-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6437032A true JPS6437032A (en) | 1989-02-07 |
JPH07120687B2 JPH07120687B2 (ja) | 1995-12-20 |
Family
ID=22114413
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63176208A Expired - Lifetime JPH07120687B2 (ja) | 1987-07-15 | 1988-07-13 | 集積回路の撓み性のあるリードフレームアセンブリおよび集積回路パッケージ |
Country Status (3)
Country | Link |
---|---|
US (1) | US4801999A (ja) |
EP (1) | EP0299252A3 (ja) |
JP (1) | JPH07120687B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006284077A (ja) * | 2005-03-31 | 2006-10-19 | Kumamoto Technology & Industry Foundation | 熱輻射反射炉 |
JP2009289969A (ja) * | 2008-05-29 | 2009-12-10 | Nec Electronics Corp | リードフレーム |
Families Citing this family (52)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4967261A (en) * | 1987-07-30 | 1990-10-30 | Mitsubishi Denki Kabushiki Kaisha | Tape carrier for assembling an IC chip on a substrate |
JP2708191B2 (ja) * | 1988-09-20 | 1998-02-04 | 株式会社日立製作所 | 半導体装置 |
US5036380A (en) * | 1988-03-28 | 1991-07-30 | Digital Equipment Corp. | Burn-in pads for tab interconnects |
US5028983A (en) * | 1988-10-28 | 1991-07-02 | International Business Machines Corporation | Multilevel integrated circuit packaging structures |
US5099306A (en) * | 1988-11-21 | 1992-03-24 | Honeywell Inc. | Stacked tab leadframe assembly |
JP2771203B2 (ja) * | 1988-12-27 | 1998-07-02 | 日本電気株式会社 | 集積回路実装用テープ |
US4912547A (en) * | 1989-01-30 | 1990-03-27 | International Business Machines Corporation | Tape bonded semiconductor device |
US5065228A (en) * | 1989-04-04 | 1991-11-12 | Olin Corporation | G-TAB having particular through hole |
US5108553A (en) * | 1989-04-04 | 1992-04-28 | Olin Corporation | G-tab manufacturing process and the product produced thereby |
JP2734463B2 (ja) * | 1989-04-27 | 1998-03-30 | 株式会社日立製作所 | 半導体装置 |
US5063432A (en) * | 1989-05-22 | 1991-11-05 | Advanced Micro Devices, Inc. | Integrated circuit lead assembly structure with first and second lead patterns spaced apart in parallel planes with a part of each lead in one lead pattern perpendicular to a part of each lead in the other lead pattern |
EP0405871B1 (en) * | 1989-06-30 | 1999-09-08 | Texas Instruments Incorporated | Balanced capacitance lead frame for integrated circuits |
JPH088330B2 (ja) * | 1989-07-19 | 1996-01-29 | 日本電気株式会社 | Loc型リードフレームを備えた半導体集積回路装置 |
US4975761A (en) * | 1989-09-05 | 1990-12-04 | Advanced Micro Devices, Inc. | High performance plastic encapsulated package for integrated circuit die |
JPH03120746A (ja) * | 1989-10-03 | 1991-05-22 | Matsushita Electric Ind Co Ltd | 半導体素子パッケージおよび半導体素子パッケージ搭載配線回路基板 |
US4965654A (en) * | 1989-10-30 | 1990-10-23 | International Business Machines Corporation | Semiconductor package with ground plane |
US4997517A (en) * | 1990-01-09 | 1991-03-05 | Olin Corporation | Multi-metal layer interconnect tape for tape automated bonding |
KR910020869A (ko) * | 1990-05-10 | 1991-12-20 | 원본 미기재 | 무통로 2-금속 테이프 자동 접착시스템 |
US5235207A (en) * | 1990-07-20 | 1993-08-10 | Hitachi, Ltd. | Semiconductor device |
US20010030370A1 (en) * | 1990-09-24 | 2001-10-18 | Khandros Igor Y. | Microelectronic assembly having encapsulated wire bonding leads |
US5148265A (en) * | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies with fan-in leads |
US7198969B1 (en) * | 1990-09-24 | 2007-04-03 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
JPH0828394B2 (ja) * | 1990-11-28 | 1996-03-21 | 三菱電機株式会社 | 半導体装置 |
JP3011510B2 (ja) * | 1990-12-20 | 2000-02-21 | 株式会社東芝 | 相互連結回路基板を有する半導体装置およびその製造方法 |
US5146312A (en) * | 1991-02-28 | 1992-09-08 | Lim Thiam B | Insulated lead frame for semiconductor packaged devices |
KR940006187Y1 (ko) * | 1991-10-15 | 1994-09-10 | 금성일렉트론 주식회사 | 반도체장치 |
US5311059A (en) * | 1992-01-24 | 1994-05-10 | Motorola, Inc. | Backplane grounding for flip-chip integrated circuit |
JPH0653277A (ja) * | 1992-06-04 | 1994-02-25 | Lsi Logic Corp | 半導体装置アセンブリおよびその組立方法 |
US6054756A (en) | 1992-07-24 | 2000-04-25 | Tessera, Inc. | Connection components with frangible leads and bus |
JPH0653394A (ja) * | 1992-07-28 | 1994-02-25 | Shinko Electric Ind Co Ltd | 多層リードフレーム用プレーン支持体 |
US5854094A (en) * | 1992-07-28 | 1998-12-29 | Shinko Electric Industries Co., Ltd. | Process for manufacturing metal plane support for multi-layer lead frames |
JPH077121A (ja) * | 1992-09-18 | 1995-01-10 | Texas Instr Inc <Ti> | 多層リードフレームアセンブリを有する半導体デバイスおよびそのパッケージ方法 |
US5331200A (en) * | 1992-09-30 | 1994-07-19 | Texas Instruments Incorporated | Lead-on-chip inner lead bonding lead frame method and apparatus |
JP2878929B2 (ja) * | 1993-06-03 | 1999-04-05 | 株式会社東芝 | 半導体装置 |
US5686352A (en) * | 1993-07-26 | 1997-11-11 | Motorola Inc. | Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff |
JP2500785B2 (ja) * | 1993-09-20 | 1996-05-29 | 日本電気株式会社 | 半導体パッケ―ジ用フィルムキャリアテ−プ及びこれを用いた半導体装置 |
US5994169A (en) * | 1994-10-27 | 1999-11-30 | Texas Instruments Incorporated | Lead frame for integrated circuits and process of packaging |
US20020151111A1 (en) * | 1995-05-08 | 2002-10-17 | Tessera, Inc. | P-connection components with frangible leads and bus |
US5719748A (en) * | 1995-06-28 | 1998-02-17 | Honeywell Inc. | Semiconductor package with a bridge for chip area connection |
JP2917868B2 (ja) * | 1995-07-31 | 1999-07-12 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP2663928B2 (ja) * | 1995-08-30 | 1997-10-15 | 日本電気株式会社 | Tabテープ及びtabテープを用いた半導体装置 |
MY119490A (en) * | 1995-08-30 | 2005-06-30 | Freescale Semiconductor Inc | Feed-in apparatus in a rotary trim and form |
US5982025A (en) * | 1996-05-30 | 1999-11-09 | Nec Corporation | Wire fixation structure |
US5994222A (en) * | 1996-06-24 | 1999-11-30 | Tessera, Inc | Method of making chip mountings and assemblies |
US5717246A (en) | 1996-07-29 | 1998-02-10 | Micron Technology, Inc. | Hybrid frame with lead-lock tape |
JP3577913B2 (ja) * | 1997-02-27 | 2004-10-20 | セイコーエプソン株式会社 | 半導体装置、およびこれを具備する電子機器 |
US5982027A (en) * | 1997-12-10 | 1999-11-09 | Micron Technology, Inc. | Integrated circuit interposer with power and ground planes |
US6124150A (en) * | 1998-08-20 | 2000-09-26 | Micron Technology, Inc. | Transverse hybrid LOC package |
US6662250B1 (en) * | 2000-02-25 | 2003-12-09 | Hewlett-Packard Development Company, L.P. | Optimized routing strategy for multiple synchronous bus groups |
US20040105244A1 (en) * | 2002-08-06 | 2004-06-03 | Ilyas Mohammed | Lead assemblies with offset portions and microelectronic assemblies with leads having offset portions |
JP4216270B2 (ja) * | 2004-06-30 | 2009-01-28 | 三星エスディアイ株式会社 | 電子装置、薄膜トランジスタ構造体及びそれを備える平板ディスプレイ装置 |
DE102005009163B4 (de) * | 2005-02-25 | 2013-08-14 | Infineon Technologies Ag | Halbleiterbauteil mit einem Halbleiterchip, der Signalkontaktflächen und Versorgungskontaktflächen aufweist, sowie Verfahren zur Herstellung des Halbleiterbauteils |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3838984A (en) * | 1973-04-16 | 1974-10-01 | Sperry Rand Corp | Flexible carrier and interconnect for uncased ic chips |
US4288841A (en) * | 1979-09-20 | 1981-09-08 | Bell Telephone Laboratories, Incorporated | Double cavity semiconductor chip carrier |
US4496965A (en) * | 1981-05-18 | 1985-01-29 | Texas Instruments Incorporated | Stacked interdigitated lead frame assembly |
US4410905A (en) * | 1981-08-14 | 1983-10-18 | Amp Incorporated | Power, ground and decoupling structure for chip carriers |
US4417266A (en) * | 1981-08-14 | 1983-11-22 | Amp Incorporated | Power and ground plane structure for chip carrier |
US4587548A (en) * | 1982-04-26 | 1986-05-06 | Amp Incorporated | Lead frame with fusible links |
US4680613A (en) * | 1983-12-01 | 1987-07-14 | Fairchild Semiconductor Corporation | Low impedance package for integrated circuit die |
US4734818A (en) * | 1985-01-22 | 1988-03-29 | Rogers Corporation | Decoupling capacitor for surface mounted leadless chip carriers, surface mounted leaded chip carriers and Pin Grid Array packages |
CA1246755A (en) * | 1985-03-30 | 1988-12-13 | Akira Miyauchi | Semiconductor device |
-
1987
- 1987-07-15 US US07/073,557 patent/US4801999A/en not_active Expired - Lifetime
-
1988
- 1988-06-23 EP EP88110023A patent/EP0299252A3/en not_active Withdrawn
- 1988-07-13 JP JP63176208A patent/JPH07120687B2/ja not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006284077A (ja) * | 2005-03-31 | 2006-10-19 | Kumamoto Technology & Industry Foundation | 熱輻射反射炉 |
JP2009289969A (ja) * | 2008-05-29 | 2009-12-10 | Nec Electronics Corp | リードフレーム |
Also Published As
Publication number | Publication date |
---|---|
JPH07120687B2 (ja) | 1995-12-20 |
EP0299252A2 (en) | 1989-01-18 |
EP0299252A3 (en) | 1989-08-30 |
US4801999A (en) | 1989-01-31 |
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