JPS595329A - Terminal controlling system - Google Patents

Abstract

PURPOSE:To detect the abnormality of a terminal equipment without deteriorating the processing capacity of a central controller, by detecting the potential of a terminal control and maintanance bus provided between the central controller and the terminal equipment. CONSTITUTION:When a central processor 201 provided on a central control unit 200 executes an input/output instruction, address information is outputted through an address bus driver 202 data information is inputted and outputted through a data bidirectional bus driver 203, the input/output instruction is outputted through an input/output instruction transmitting gate circuit 204, and an output instruction is outputted through an output instruction sending-out gate circuit 205, and is connected to terminal equipments 250-2no. Displacement of a terminal control and maintenance bus 215 is detected by comparators 209, 210, and such faults as disconnection of a control bus, a fault of a system and detachment of a terminal equipment, etc., and a simultaneous control fault and a short-circuit fault of the terminal equipment are detected.

Description

[Detailed Description of the Invention] The present invention relates to a terminal control method in centrally controlled installation;
In particular, the present invention relates to a terminal control method that improves Lv central control purchasing processing capacity by detecting abnormalities in terminal installation in synchronization with terminal installation control.

A conventional terminal control system of this type has a construction as shown in FIG. In FIG. 1, central control equipment 10
Is the central processing @device 101 provided at 0 an input/output command? When executed, the address information is sent to the address bus driver 102r.
Data information is input/output via the data bidirectional bus driver 103r, input instructions are output via the input/output instruction sending gate circuit 104r, and output instructions are output via the output instruction sending gate circuit 105k. and connected to the terminals 150 to 1nO.

Here, the central processing equipment 101 executes an input/output command to the terminal equipment 150.
vc[1100 control path (address no (driver 1
02. Data bidirectional bus driver 103゜I/O command transmission gate circuit 104. Output command sending gate circuit 105)
In order to diagnose whether or not the terminal device is connected, the central control port # 100 executes a ninth input command to check whether or not the terminal device is connected to the terminal port 150.
The terminal to which the output sound of the bus driver 102 is input [1i1
At 50, the output of the interposed number selection gate circuit 151 becomes low 1 Berni. On the other hand, the central processing unit 101 inputs the input command r.
When executed, the Q output of the single output command transmission gate circuit 104 becomes the callow level, and the two inputs of the open collector OR gate circuit 1520 both become low 1 novel, so its output also becomes low 1 novel, and the output is transmitted through the data bidirectional bus driver 103r. The data is then taken into the central processing unit 101. Therefore, when the central control device executes an input/output command to a terminal device, it must check the input command to see if the terminal device is connected to the control path of the central control device. ), the processing capacity of the centrally controlled interpolation is reduced by the amount of execution of the diagnostic instruction r.

In addition, there is also the drawback that when multiple terminal devices are operating, it is not possible to detect a failure when the central control unit executes a control command only on one terminal device.

The purpose of the present invention is to eliminate the above-mentioned drawbacks, namely, when a central control unit controls a terminal device, whether the terminal device is connected to the control bus of the central control device or not.
It is possible to execute input/output commands via the terminal control maintenance bus provided between the central control station and all terminal stations and to monitor the potential of this terminal control maintenance bus without performing diagnostics on input commands. , Disconnect the B terminal device [7 failures, manufacturing number failures, etc.], and handle interrupt processing if there is a failure? Perform maintenance on the terminal equipment without reducing the throughput of the centrally controlled installation. Moreover, it is an object of the present invention to provide a terminal control method r that can cope with the case where there is a problem in which a plurality of terminal devices operate even though an output command r is executed for one terminal device.

The feature of the present invention that achieves the above object r is that a plurality of terminals vc
R and a central leg device that executes input/output control commands for a terminal device selected from these terminal devices;
A terminal control maintenance bus provided in common between the terminals and the central control f2# is selected, and the required voltage is applied to the terminal control maintenance bus every time an input/output control command r is executed between the terminals. means for applying r; and means for changing the potential of the terminal control maintenance bus provided in one selected terminal device.

means for monitoring the potential r of the terminal control maintenance bus;
Is the potential of the terminal control maintenance path within the set potential range? The main objective is to detect failures in these terminal devices.

Next, an embodiment of the present invention will be explained with reference to the drawings.

FIG. 2 is a circuit diagram of the main part of an embodiment of the present invention.

In FIG. 2, when a central processing unit 201 provided in a central control unit 200 executes an input/output command r.

The address information is output through the address bus driver 202r, and the data information is output through the data bidirectional bus driver 20.
3, and the input command is output through the input/output command transmission gate circuit 204r.

The output command is outputted through the output command sending gate circuit 205'' and connected to the terminals 1iu[250-2nO.

Here, the central control clamping device 200 connects the terminal device 250 to [7].
An example of executing an output command r will be explained below. When the central processing fl Minato [1201 executes the output command
3, a low 1 novel signal is output from the terminal OUT of the central processing intervenor 201, the output command sending gate circuit 205 is at low level, and one input signal of the AND gate circuit 206 is low. level, and the output of the open collector inverter 207 enters the open collector state. On the other hand, the terminal device 250 inputs the output of the address bus driver 202 for the selection of the interposed number [The interposed number selection gate circuit 251 inputs the input]. One input of circuit 252 also goes low. moreover,
Since the output command sending gate circuit 205 becomes low 1/bell at the other input of the OR gate circuit 252, the output of the OR gate circuit 252 also becomes low, and therefore the output of the oven control 1/actor AND gate circuit 253 becomes low. become the level. As a result, current flows through the sixth-order path.

Power supply (+5V) - resistor 208 - terminal control maintenance bus 215
-Resistor 254-Open circuit 1/Kta and gate circuit 2
Output of 53 Here, if the resistance value of the resistor 208 and the resistance value of the resistor 254 are set to be equal, the potential of the terminal control maintenance bus, that is, the terminal of the comparator 1 node - the terminal of the comparator 1 The potential of the terminals of the node 210 is +2.5.
V (1/2 of +5V).

Here, the potential of the terminal of the comparator 209 is set to a value between +5V and +2.5V (1/2 of +5V), and if current flows to the terminal device 750, the potential of the terminal of the comparator 209 is set to be between +5V and +2.5V (1/2 of +5V).
The output of the notebook 209 is high 1 novel and normal operation 7 is performed, but the terminal - of the comparator 209 indicates that although the central processing unit 201 is executing the output command r to the terminal device 250, the terminal device 250 is Side Nff1 position 2
If it is disconnected from the control bus 00 (atto 17 bus driver 2021 data bidirectional path driver 203, output command sending gate circuit 2o5), no current flows through the resistor 208 and the resistor 254, so the comparator 1 node 2
Since the potential of the - terminal of 09 becomes +5■, the output of the comparator 209 becomes low level and the Nant gate circuit 2
11 output becomes high level.

One input of the Nant gate circuit 212 becomes high level, but when the central processing interposer 201 executes the output command, the output of the AND gate circuit 206 becomes low level, so the terminal CL of the time over counter 213 becomes low 1 novel. become. In response to this, the z5 time over counter 213 inputs a clock pulse r to the terminal CP, and after a certain period of time has elapsed since the addition r of the clock pulses has started, the output from the terminal becomes high level. When the output of the terminal of this time-over counter 213 becomes high 1/bell, the Nant gate circuit 21
The output of 2 becomes low level, and it is input to the terminal NMI of the central processing port #201, indicating an error in interrupt processing.
On the other hand, the output of the Nant gate circuit 214 appears at a high level to release the queue state.

On the other hand, if there is a failure in a terminal device and the central control device 200 executes a person/group command for only one terminal device, multiple terminal devices may operate, or the output of the open collector inverter 207 A comparator 210 is provided to detect the occurrence of a short fiber ground life fault on the bus. For example, terminal device 250 and terminal device 2n
When O and O receive input/output commands at the same time, current flows through the next path.

Power supply (+5V) - Resistor 208 - Output of the terminal control maintenance bus (earth potential) Here, if the resistance value of the resistor 208, the resistance value of the resistor 254, and the resistance value of the resistor 2n4 are made equal to each other, the terminal The potential of the control maintenance bus 215, that is, the potential of the terminal − of the comparator 209 and the comparator 21
The potential of the 0 terminal is +1.67V (+5V l)
/3). Therefore.

The potential of terminal - of comparator 1 node 210 is +2.5V (+
By setting the value to be between 1/2 of 5V) and +1.67V (1/3 of +5V), if only one terminal [250] is receiving input/output commands, .

As mentioned above (similarly, the potential of the terminal - of the comparator 209 is
The potential of the terminals of comparator 1/-210 is n4+2.
．． 5VI (+5V 1/2) Kt) The output of the comparator 210 becomes high 1/bell, but when multiple terminal devices simultaneously receive L or short circuit (ground), the output of the comparator 210 becomes low.
The output of E210 became low level.

Similar to the above-mentioned operation when the comparator 209 is low, the failure interrupt and cancellation of the waiting state are performed.

Therefore, L sea urchin can be understood from these things. Comparator 20
To 9 = 9 control bus disconnection. System failure r is detected, such as disconnection of the terminal device, and the comparator 210Kj outputs the terminal vct! Simultaneous control failures of l and ground failures can be detected.

As explained above, the present invention involves detecting the potential r of the terminal control maintenance bus provided between the central control unit and the terminal equipment.9. This has the effect of making it possible to detect an abnormality in the terminal device without reducing the processing capacity of the central control device.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of the main part of a conventional terminal protection system, and FIG. 2 is a circuit diagram of the main part of an embodiment of the present invention. 100...Central control 11m apart, 101...
... Central processing lit, 102 ... Address bus driver, 103 ... Data bidirectional bus driver, 104 ... Input/output instruction transmission gate circuit, 1
05...Output command sending gate circuit, 150-1
nO...Terminal device, 151~lnl...
・Packed number selection gate circuit, 152 to 1n2...
・Open collector OR gate circuit. 200...Central control unit, 201...
Central processing unit, 202...address bus driver, 203...data bidirectional bus driver, 2
04... Input/output command transmission gate circuit, 205.
...Output command sending gate circuit, 206...
・AND gate circuit, 207...Open circuit 1
7 Kutain Parter, 208.254213...
Time over counter, 215...Terminal control maintenance bus, 250~2nO...Terminal side L251~
2nl...Include number selection gate circuit. 252~2n2...OR gate circuit, 253~
2n3...Open collector and gate circuit.

Claims (1)

[Claims] A plurality of terminal installations and an input/output control command for a terminal device selected from these terminal installations.
In a terminal control system including a terminal control maintenance bus provided in common between these terminal facilities and the central control facility, and j! IJ central control device is equipped with means for applying a sufficient voltage r to the terminal control maintenance bus each time an input/output control command is executed to the selected terminal device; means for changing the potential of the terminal control maintenance bus; and means for monitoring the potential of the terminal control maintenance bus; A terminal control method characterized by detecting a failure in a terminal.