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JPS57109020A - Bus interface control system - Google Patents

Bus interface control system

Info

Publication number
JPS57109020A
JPS57109020A JP55186799A JP18679980A JPS57109020A JP S57109020 A JPS57109020 A JP S57109020A JP 55186799 A JP55186799 A JP 55186799A JP 18679980 A JP18679980 A JP 18679980A JP S57109020 A JPS57109020 A JP S57109020A
Authority
JP
Japan
Prior art keywords
error
detected
transmission part
interface
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55186799A
Other languages
Japanese (ja)
Inventor
Saburo Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55186799A priority Critical patent/JPS57109020A/en
Publication of JPS57109020A publication Critical patent/JPS57109020A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To evade the stopping of a system due to a fault of a bus by transferring information, which was expected to be transmitted by a group wherein an error is detected, by using other groups on time-division mode. CONSTITUTION:The outputs of interface circuits 31 and 32 are divided into two and inputted via data buses 208 and 209 to multiplexer circuits (transmission part) 33 and 34 in a CPU2. Their output signals are sent to an interface parity checking circuit 21 in a main storage device 1 to perform error detection. When an error is detected, a data-bus parity-error processing signal 200 is sent to the transmission part 30 of a double-transfer interface control circuit through the transmission part 11 and reception part 14 of a main-storage double-transfer interface circuit. Then, the system where the error is detected is switched to a normal system on time-division mode by a data bus control signal 207, thereby performing transfer to the main storage device 1.
JP55186799A 1980-12-26 1980-12-26 Bus interface control system Pending JPS57109020A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55186799A JPS57109020A (en) 1980-12-26 1980-12-26 Bus interface control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55186799A JPS57109020A (en) 1980-12-26 1980-12-26 Bus interface control system

Publications (1)

Publication Number Publication Date
JPS57109020A true JPS57109020A (en) 1982-07-07

Family

ID=16194780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55186799A Pending JPS57109020A (en) 1980-12-26 1980-12-26 Bus interface control system

Country Status (1)

Country Link
JP (1) JPS57109020A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03252747A (en) * 1990-03-01 1991-11-12 Fujitsu Ltd Optical parallel data transfer system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03252747A (en) * 1990-03-01 1991-11-12 Fujitsu Ltd Optical parallel data transfer system

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