JPH11265801A - Chip resistor - Google Patents
Chip resistorInfo
- Publication number
- JPH11265801A JPH11265801A JP10372666A JP37266698A JPH11265801A JP H11265801 A JPH11265801 A JP H11265801A JP 10372666 A JP10372666 A JP 10372666A JP 37266698 A JP37266698 A JP 37266698A JP H11265801 A JPH11265801 A JP H11265801A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- electrodes
- resistor
- substrate
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000011347 resin Substances 0.000 claims abstract description 20
- 229920005989 resin Polymers 0.000 claims abstract description 20
- 239000000919 ceramic Substances 0.000 claims abstract description 18
- 239000011521 glass Substances 0.000 claims abstract description 12
- 239000005011 phenolic resin Substances 0.000 claims abstract description 9
- 238000007747 plating Methods 0.000 claims description 18
- 229910000679 solder Inorganic materials 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 claims description 3
- 229920001568 phenolic resin Polymers 0.000 claims description 3
- 238000005476 soldering Methods 0.000 abstract description 5
- 239000004593 Epoxy Substances 0.000 abstract description 3
- CTQNGGLPUBDAKN-UHFFFAOYSA-N O-Xylene Chemical compound CC1=CC=CC=C1C CTQNGGLPUBDAKN-UHFFFAOYSA-N 0.000 abstract description 3
- 239000008096 xylene Substances 0.000 abstract description 3
- 238000009966 trimming Methods 0.000 description 6
- 238000005452 bending Methods 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Landscapes
- Non-Adjustable Resistors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、チップ状の絶縁性
セラミック基板の表面に抵抗体が設けられ、この基板の
両端部に電極が形成されたチップ抵抗器に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip resistor in which a resistor is provided on the surface of a chip-shaped insulating ceramic substrate, and electrodes are formed at both ends of the substrate.
【0002】[0002]
【従来の技術】チップ抵抗器の基本構造は、絶縁性セラ
ミック基板の表面の両端部に一対の電極が形成され、こ
れら一対の電極に接続されるように基板表面上に抵抗体
が印刷形成される構造である。そして従来から、回路基
板への半田付けに用いる電極構造としては、種々のもの
が提案されている。また抵抗体をレーザトリミングする
ために、抵抗体の表面にガラスコートを施すことも行わ
れている。更に、トリミングを終了した後に、前述のガ
ラスコート(下側ガラスコート)の上に更にガラスコー
ト(上側ガラスコート)を施した構造のチップ抵抗器も
提案されている。2. Description of the Related Art The basic structure of a chip resistor is such that a pair of electrodes are formed at both ends of the surface of an insulating ceramic substrate, and a resistor is formed by printing on the surface of the substrate so as to be connected to the pair of electrodes. Structure. Conventionally, various electrode structures have been proposed for use in soldering to a circuit board. Further, in order to perform laser trimming of the resistor, glass coating is performed on the surface of the resistor. Further, a chip resistor having a structure in which a glass coat (upper glass coat) is further provided on the above-mentioned glass coat (lower glass coat) after trimming is completed has been proposed.
【0003】[0003]
【発明が解決しようとする課題】従来のチップ抵抗器に
おいては、特にチップ抵抗器が実装された回路基板に曲
げ力が加わり、回路基板の電極に半田付け接続されたチ
ップ抵抗器の電極に無理な力が加わると、基板の両端に
設けられた一対の電極にクラックが入ったり接続不良が
発生することがあり、信頼性が低くなる問題があった。In a conventional chip resistor, a bending force is applied particularly to a circuit board on which the chip resistor is mounted, so that the electrode of the chip resistor soldered to the electrode of the circuit board is forcibly applied. When an excessive force is applied, a pair of electrodes provided at both ends of the substrate may be cracked or a connection failure may occur, and there is a problem that reliability is lowered.
【0004】本発明の目的は、半田付けの信頼性の高い
チップ抵抗器を提供することにある。An object of the present invention is to provide a chip resistor having high reliability of soldering.
【0005】[0005]
【課題を解決するための手段】本発明は、絶縁性セラミ
ック基板の基板表面の両端部に一対の電極が形成され、
一対の電極に接続されるように基板表面上に抵抗体が印
刷形成され、抵抗体を覆うようにガラスコートが施され
ているチップ抵抗器を改良の対象とする。According to the present invention, a pair of electrodes are formed at both ends of a surface of an insulating ceramic substrate,
A chip resistor in which a resistor is printed and formed on a substrate surface so as to be connected to a pair of electrodes and a glass coat is provided so as to cover the resistor is targeted for improvement.
【0006】本発明では、一対の電極を絶縁性セラミッ
ク基板の基板表面の両端部に形成されたメタルグレーズ
系の一対の第1電極とし、また絶縁性セラミック基板の
基板裏面の両端部に第1電極と対向するように形成され
たメタルグレーズ系の一対の第2電極を設け、更に絶縁
性セラミック基板の端面を覆い且つ第1電極と第2電極
とを接続するように導電ペーストにより形成された一対
の第3電極を設け、第1電極,第2電極及び第3電極を
覆うようにメッキ層を形成してもよい。そして第3電極
をその両端部がそれぞれ第1電極及び第2電極の表面上
に一部重畳するように形成する。In the present invention, the pair of electrodes is a pair of first electrodes of a metal glaze formed on both ends of the substrate surface of the insulating ceramic substrate, and the first electrodes are formed on both ends of the back surface of the insulating ceramic substrate. A pair of metal glaze-based second electrodes formed so as to face the electrodes were provided, and further formed of a conductive paste so as to cover the end surfaces of the insulating ceramic substrate and connect the first electrodes and the second electrodes. A pair of third electrodes may be provided, and a plating layer may be formed to cover the first, second, and third electrodes. Then, the third electrode is formed so that both ends thereof partially overlap the surfaces of the first electrode and the second electrode, respectively.
【0007】このように絶縁性基板の両端部の表裏面及
び端面に設けた第1,第2,第3電極をNiメッキで覆
うとハンダくわれを防ぐことができ、さらにハンダメッ
キ処理してNiメッキ層のハンダ濡れ性を改善すること
ができる。[0007] Covering the first, second, and third electrodes provided on the front, back, and end surfaces of both ends of the insulating substrate with Ni plating can prevent solder cracking. The solder wettability of the Ni plating layer can be improved.
【0008】また第3電極は、実装用の回路基板上に配
置された状態で回路基板と第2電極との間に溶融半田が
入り込む隙間が形成されるように第2電極の表面上に一
部重畳しているため、即ち基板の下面側では第3電極を
第2電極に一部重畳して設けてあるため、電極が段状に
形成され、本発明のチップ抵抗器を実装用のプリント回
路基板に取り付けた際、第2電極の下面側と回路基板と
の間に生じた隙間に溶融半田が回り込み、本発明のチッ
プ抵抗器が小さくても充分な固着力が得られる。The third electrode is disposed on the surface of the second electrode such that a gap is formed between the circuit board and the second electrode when the third electrode is disposed on the circuit board for mounting so that molten solder enters. Since the third electrode is partially overlapped with the second electrode on the lower surface side of the substrate, the electrodes are formed in a step shape, and the chip resistor of the present invention is mounted on a printed circuit board for mounting. When mounted on a circuit board, the molten solder wraps around the gap formed between the lower surface of the second electrode and the circuit board, and a sufficient fixing force can be obtained even if the chip resistor of the present invention is small.
【0009】特に本発明では、第3電極をキシレンフェ
ノール樹脂又はエポキシフェノール樹脂等のフェノール
系樹脂にAgを混入したAg−レジン系の導電性ペース
トにより形成する。このような導電性ペーストで第3電
極を形成すると、基板の端面に設けたAg−レジン系の
第3電極が適度の柔軟性を有するようになり、回路基板
の曲げに対しても十分に耐えることができる。Particularly, in the present invention, the third electrode is formed of an Ag-resin-based conductive paste in which Ag is mixed in a phenolic resin such as a xylene phenol resin or an epoxy phenol resin. When the third electrode is formed with such a conductive paste, the Ag-resin-based third electrode provided on the end face of the substrate has appropriate flexibility and sufficiently withstands bending of the circuit board. be able to.
【0010】[0010]
【発明の実施の形態】以下本発明の一実施例を図面に基
づいて説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.
【0011】この実施例のチップ抵抗器1は、図1に示
すように、セラミックの基板2の表面に凸型の抵抗体3
が印刷され、この両端に電極4が設けられている。抵抗
体3は、酸化ルテニウム約10μの厚みに設け、レーザ
又はサンドブラストにより凸型の底辺から上方に向って
トリミング溝5を形成し、抵抗値のトリミングが成され
ている。As shown in FIG. 1, a chip resistor 1 of this embodiment has a convex resistor 3 on a surface of a ceramic substrate 2.
Are printed, and electrodes 4 are provided at both ends. The resistor 3 is provided with a thickness of about 10 μm of ruthenium oxide, and a trimming groove 5 is formed upward from the bottom of the convex shape by laser or sand blast to trim the resistance value.
【0012】このチップ抵抗器1の電極4は、抵抗体3
が直接に接続している第1電極6と、この第1電極6と
基板2をはさんで対向して形成された第2電極7を有
し、この第1,第2電極6,7はAg−Pd、Ag−P
t等のメタルグレーズペーストを印刷形成したものであ
る。さらに、第1,第2電極6,7をはさんで基板2の
端面に、キシレンフェノール樹脂又はエポキシフェノー
ル樹脂にAgを混入したAg−レジン系の導電性ペース
トによる第3電極8が設けられ、この第3電極8は、第
1,第2電極6,7を一部被覆するように設けられ、両
者の導通を図っている。そして、この第1,第2,第3
電極全体を覆ってNiメッキ9及びハンダメッキ10が
施されている。The electrode 4 of the chip resistor 1 is connected to the resistor 3
Has a first electrode 6 directly connected thereto, and a second electrode 7 formed so as to face the first electrode 6 with the substrate 2 interposed therebetween. Ag-Pd, Ag-P
It is formed by printing a metal glaze paste such as t. Further, a third electrode 8 made of an Ag-resin-based conductive paste obtained by mixing Ag in a xylene phenol resin or an epoxy phenol resin is provided on an end surface of the substrate 2 with the first and second electrodes 6 and 7 interposed therebetween. The third electrode 8 is provided so as to partially cover the first and second electrodes 6 and 7, thereby achieving conduction between them. And the first, second, third
Ni plating 9 and solder plating 10 are applied to cover the entire electrode.
【0013】また、抵抗体3の表面には、ガラスコート
11及びレジンコート12を施して保護している。The surface of the resistor 3 is protected by a glass coat 11 and a resin coat 12.
【0014】この実施例のチップ抵抗器の製造方法は、
図3AないしFに示すように、先ず基板となるセラミッ
ク板13のスリット14をはさんで所定間隔で第1電極
6となるメタルグレーズペーストを複数列印刷して、9
00℃近い温度で焼成する。さらに同様にして第2電極
7も第1電極6と対向する位置に形成する。次に、図3
Bに示すように、第1電極6の間のセラミック板13上
にマトリクス状に抵抗体3を印刷形成し、平均850℃
の温度で焼成する。そして、図3Cに示すように、抵抗
体3の表面にガラスコート11を施し平均650℃の温
度で焼成する。この後、セラミック板13を各チップ抵
抗器毎に縦横に設けられたスリット14に沿って切断
(スクライブ)し、図3Dに示すように、基板2の端面
にAg−レジン系の導電性ペーストの第3電極8を20
μ程度の厚みに塗布し、200℃程度の温度で硬化させ
る。そして、図3E,Fに示すように、Niメッキ9,
ハンダメッキ10を各々順次施し、第1,第2,第3電
極6,7,8を被覆する。The method of manufacturing the chip resistor of this embodiment is as follows.
As shown in FIGS. 3A to 3F, first, a plurality of rows of a metal glaze paste serving as the first electrode 6 are printed at predetermined intervals across a slit 14 of a ceramic plate 13 serving as a substrate.
Bake at a temperature close to 00 ° C. Further, similarly, the second electrode 7 is formed at a position facing the first electrode 6. Next, FIG.
As shown in B, the resistors 3 are printed and formed in a matrix on the ceramic plate 13 between the first electrodes 6, and the average is 850 ° C.
Firing at a temperature of Then, as shown in FIG. 3C, a glass coat 11 is applied to the surface of the resistor 3 and fired at an average temperature of 650 ° C. Thereafter, the ceramic plate 13 is cut (scribed) along slits 14 provided vertically and horizontally for each chip resistor, and an Ag-resin-based conductive paste is applied to the end surface of the substrate 2 as shown in FIG. 3D. The third electrode 8 is set to 20
It is applied to a thickness of about μ and cured at a temperature of about 200 ° C. Then, as shown in FIGS.
Solder plating 10 is sequentially applied to cover the first, second, and third electrodes 6, 7, and 8, respectively.
【0015】この場合、スリット14は基板の両側より
設けられているため、セラミック基板端面に、樹脂を一
部重畳する状態で塗布すると、電気的にも機械的にも良
好な状態が得られる。In this case, since the slits 14 are provided from both sides of the substrate, when the resin is applied to the end surface of the ceramic substrate in a state of being partially overlapped, a good electrical and mechanical state can be obtained.
【0016】この方法によるとセラミック基板端面にお
いて、端子電極の剥がれやクラック等の欠陥が生じなく
なる。According to this method, defects such as peeling of terminal electrodes and cracks do not occur on the end faces of the ceramic substrate.
【0017】最後に、各チップ抵抗器の抵抗体3をトリ
ミングして抵抗値を調整し、エポキシ樹脂等のレジンコ
ート12を施し200℃付近の温度で硬化させる。Finally, the resistor 3 of each chip resistor is trimmed to adjust the resistance, and a resin coat 12 such as an epoxy resin is applied and cured at a temperature of about 200.degree.
【0018】また、トリミングは、図3Cの状態で行う
こともあり、この場合はその後レジンコート12を施し
て図3D以下の工程を行う。これによって、セラミック
板13をチップ毎に分離しない状態で抵抗値のトリミン
グを行うので効率良くトリミング作業を行うことがで
き、しかもレジンコート12によって、後のメッキ作業
時にも抵抗体に悪影響を与えることもない。The trimming may be performed in the state shown in FIG. 3C. In this case, the resin coating 12 is applied thereafter, and the steps shown in FIG. 3D and thereafter are performed. Thus, the resistance value is trimmed without separating the ceramic plate 13 for each chip, so that the trimming work can be performed efficiently, and the resin coat 12 has an adverse effect on the resistor even in the subsequent plating work. Nor.
【0019】この実施例のチップ抵抗器によれば、ハン
ダくわれに対して電極4の耐性が向上し、しかも、回路
基板の曲げに対しても、メタルグレーズ系のみでできた
電極と比べ柔軟性が高いので電極が強い。また、ハンダ
付けの際の回路基板に対する固着力も、第1,第2電極
6,7が回路基板に強固にハンダ付けされるので、極め
て強く、第3電極をAg−レジン系にしたことによる固
着力の低下は生じない。According to the chip resistor of this embodiment, the resistance of the electrode 4 to solder cracking is improved, and the bending of the circuit board is more flexible than that of the metal glaze electrode alone. The electrode is strong because of high performance. In addition, the fixing force to the circuit board during soldering is extremely strong because the first and second electrodes 6 and 7 are firmly soldered to the circuit board, and the third electrode is made of an Ag-resin system. There is no reduction in the fixing force.
【0020】尚、この発明のチップの抵抗器の抵抗体
は、金属皮膜抵抗体、炭素皮膜抵抗体等その用途に合わ
せて適宜選定し得るものである。またメタルグレーズペ
ースト、Ag−レジン系導電性ペーストの成分は、適宜
他の添加物が入っていても良い。本願のものは抵抗体上
にガラスコートを施しトリミングしているが、適宜公知
の方法で変更しうるものであり、他の抵抗体を用いたチ
ップ部品にも同様に応用でき、この実施例のものに限定
されるものではない。The resistor of the chip resistor according to the present invention can be appropriately selected according to its use, such as a metal film resistor and a carbon film resistor. The components of the metal glaze paste and the Ag-resin-based conductive paste may contain other additives as appropriate. In the present application, the resistor is coated with a glass coat and trimmed, but can be appropriately changed by a known method, and can be similarly applied to a chip component using another resistor. It is not limited to one.
【0021】本実施例のチップ抵抗器は、基板の両面に
設けたメタルグレーズ系の第1,第2電極にまたがって
基板の端面にAg−レジン系の第3電極を設け、この第
1,第2,第3電極を覆うNiメッキ層及び該Niメッ
キ層を覆うハンダメッキ層を形成したので、ハンダくわ
れに強く、回路基板への付け直しが可能である。また基
板の下面側の第2電極に一部重畳して第3電極を設けた
ので、基板の下面側の電極で段差が形成され、回路基板
へハンダ付けした際、下面側電極と回路基板の間に生じ
る隙間にハンダが回り込んで強い固着力が得られる。し
かも基板の端面に設けたAg−レジン系の第3電極が適
度の柔軟性を有するので、回路基板の曲げに対しても十
分に耐え得るものである。また本実施例のように、スク
ライブ後の基板側端部面にレジン含有銀塗料を表裏面の
第1,第2電極上に一部重畳する状態で直接塗布し低温
で加熱処理して第3電極を形成すると、切断されたまま
の粗い基板断面に対し直接に接合し第3電極の接着力が
強い。またハンダ付け用電極にメッキ処理する際、第3
電極がメッキ液の浸透を効果的に防止し、電極に剥れや
クラック等の欠陥を生ずることのない高品質の製品を製
造し得る。またメッキ前にレジンコートをすればメッキ
液に弱い抵抗体をレジンコートにより保護するので、抵
抗体の特性も維持できる。In the chip resistor of this embodiment, an Ag-resin-based third electrode is provided on the end face of the substrate over the metal glaze-based first and second electrodes provided on both surfaces of the substrate. Since the Ni plating layer covering the second and third electrodes and the solder plating layer covering the Ni plating layers are formed, the Ni plating layer is resistant to solder cracking and can be re-attached to the circuit board. Also, since the third electrode is provided so as to partially overlap the second electrode on the lower surface side of the substrate, a step is formed by the electrode on the lower surface side of the substrate. The solder goes around into the gap between them, and a strong fixing force is obtained. In addition, since the Ag-resin-based third electrode provided on the end face of the substrate has appropriate flexibility, it can sufficiently withstand the bending of the circuit board. Further, as in the present embodiment, a resin-containing silver paint is directly applied to the end face of the substrate after scribing in a state of being partially overlapped on the first and second electrodes on the front and back surfaces, and is subjected to a heat treatment at a low temperature. When the electrodes are formed, the third electrodes are directly bonded to the rough substrate cross section as they are cut, and the third electrode has a strong adhesive force. When plating the soldering electrodes,
The electrode effectively prevents the plating solution from penetrating, and a high-quality product can be manufactured without causing defects such as peeling and cracks in the electrode. If a resin coat is applied before plating, a resistor that is weak to a plating solution is protected by the resin coat, so that the characteristics of the resistor can be maintained.
【0022】従って、今日の実装密度の高度化の要求に
よりチップ抵抗器も小型化しているが、電極が小さくて
も十分な固着力が得られ、電気製品の小型軽量化、信頼
性、耐久性及び生産性の向上に大きく寄与するものであ
る。Accordingly, chip resistors have been miniaturized in response to today's demand for higher packing density. However, even if the electrodes are small, sufficient fixing force can be obtained, and miniaturization and weight reduction, reliability and durability of electric products can be obtained. And it greatly contributes to improvement of productivity.
【0023】[0023]
【発明の効果】本発明によれば、第3電極は、実装用の
回路基板上に配置された状態で回路基板と第2電極との
間に溶融半田が入り込む隙間が形成されるように第2電
極の表面上に一部重畳しているため、この隙間にも溶融
半田が回り込み、チップ抵抗器が小さくても充分な固着
力が得られる。According to the present invention, the third electrode is positioned on the mounting circuit board so that a gap is formed between the circuit board and the second electrode so that a molten solder enters the third electrode. Since the solder is partially overlapped on the surface of the two electrodes, the molten solder also wraps around this gap, and a sufficient fixing force can be obtained even with a small chip resistor.
【0024】また、基板の端面に設けたフェノール系樹
脂にAgを混入したAg−レジン系の第3電極が適度の
柔軟性を有するため、チップ抵抗器が実装される回路基
板の曲げに対しても十分に耐えることができて、信頼性
が増す利点がある。Further, since the Ag-resin-based third electrode in which Ag is mixed into the phenolic resin provided on the end face of the substrate has a moderate flexibility, the circuit board on which the chip resistor is mounted can be bent. Has the advantage that the reliability can be increased.
【図1】本発明のチップ抵抗器の一実施例の平面図であ
る。FIG. 1 is a plan view of one embodiment of a chip resistor of the present invention.
【図2】図1のA−A断面図である。FIG. 2 is a sectional view taken along line AA of FIG.
【図3】A,B,C,D,E,Fはこの実施例のチップ
抵抗器の製造工程を示す横断面図である。FIGS. 3A, 3B, 3C, 3D, 3F, and 3F are cross-sectional views showing the steps of manufacturing the chip resistor of this embodiment.
【符号の説明】 1 チップ抵抗器 2 基板 3 抵抗体 4 電極 5 トリミング溝 6 第1電極 7 第2電極 8 第3電極 9 Niメッキ 10 ハンダメッキ 11 ガラスコート 12 レジンコート 13 セラミック板 14 スリットDESCRIPTION OF SYMBOLS 1 Chip resistor 2 Substrate 3 Resistor 4 Electrode 5 Trimming groove 6 First electrode 7 Second electrode 8 Third electrode 9 Ni plating 10 Solder plating 11 Glass coat 12 Resin coat 13 Ceramic plate 14 Slit
───────────────────────────────────────────────────── フロントページの続き (72)発明者 小原 陽三 富山県上新川郡大沢野町下大久保3158番地 北陸電気工業株式会社内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yozo Ohara 3158 Shimookubo, Osawano-cho, Kamishinkawa-gun, Toyama Prefecture Hokuriku Electric Industry Co., Ltd.
Claims (1)
部に一対の電極が形成され、前記一対の電極に接続され
るように前記基板表面上に抵抗体が印刷形成され、前記
抵抗体を覆うようにガラスコートが施されているチップ
抵抗器であって、 前記一対の電極はメタルグレーズ系の第1電極からな
り、 前記絶縁性セラミック基板の基板裏面の両端部には前記
第1電極と対向するように形成されたメタルグレーズ系
の一対の第2電極が更に設けられ、 前記絶縁性セラミック基板の端面を覆い且つ前記第1電
極と前記第2電極とを接続するように導電ペーストによ
り形成された一対の第3電極が設けられ、 前記第1電極,前記第2電極及び前記第3電極を覆うよ
うにメッキ層が形成されており、 前記第3電極はその両端部がそれぞれ前記第1電極及び
第2電極の表面上に一部重畳するように形成されてお
り、 前記第3電極は、実装用の回路基板上に配置された状態
で前記回路基板と前記第2電極との間に溶融半田が入り
込む隙間が形成されるように前記第2電極の表面上に一
部重畳しており、 前記第3電極はフェノール系樹脂にAgを混入したAg
−レジン系の導電性ペーストにより形成されていること
を特徴とするチップ抵抗器。1. A pair of electrodes are formed at both ends of a substrate surface of an insulating ceramic substrate, and a resistor is printed and formed on the substrate surface so as to be connected to the pair of electrodes, and covers the resistor. A chip resistor coated with glass as described above, wherein the pair of electrodes comprises a metal glaze-based first electrode, and opposite ends of the insulating ceramic substrate are opposed to the first electrode at both ends on the back surface of the substrate. A pair of second electrodes of a metal glaze type formed so as to cover the end surface of the insulating ceramic substrate and formed of a conductive paste so as to connect the first electrode and the second electrode. A pair of third electrodes, a plating layer is formed to cover the first electrode, the second electrode, and the third electrode, and both ends of the third electrode are the first electrode, respectively. And the third electrode is formed so as to partially overlap the surface of the second electrode, and the third electrode is disposed between the circuit board and the second electrode while being arranged on a circuit board for mounting. The third electrode partially overlaps the surface of the second electrode so as to form a gap into which solder enters, and the third electrode is made of Ag mixed with phenolic resin.
-A chip resistor formed of a resin-based conductive paste.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP37266698A JP3159963B2 (en) | 1987-10-22 | 1998-12-28 | Chip resistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP37266698A JP3159963B2 (en) | 1987-10-22 | 1998-12-28 | Chip resistor |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP08124971A Division JP3110677B2 (en) | 1996-05-20 | 1996-05-20 | Chip resistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11265801A true JPH11265801A (en) | 1999-09-28 |
JP3159963B2 JP3159963B2 (en) | 2001-04-23 |
Family
ID=18500844
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP37266698A Expired - Lifetime JP3159963B2 (en) | 1987-10-22 | 1998-12-28 | Chip resistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3159963B2 (en) |
-
1998
- 1998-12-28 JP JP37266698A patent/JP3159963B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3159963B2 (en) | 2001-04-23 |
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