JPH0125011Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention is a pulse generation circuit that generates a pulse having a specific relationship with a video signal, which is used as a gate pulse or the like to remove a specific signal from a carrier color signal that forms a video signal. Regarding.

When a color television signal is recorded on a magnetic tape by a home video tape recorder, the carrier color signal and luminance signal that form the color video signal are separated, and the carrier color signal is frequency-converted to a lower frequency band. After converting the luminance signal into a frequency modulation signal on the high frequency band side,
The mainstream is a recording format in which both are mixed and recording tracks are arranged obliquely with respect to the running direction of the magnetic tape.

When a video tape recorder plays back a color video signal from a magnetic tape on which such recording has been performed, a luminance signal and a low-frequency conversion color signal, which are frequency modulated signals, are extracted from the playback signal from the magnetic tape. The former is demodulated by a frequency demodulator, and the latter is frequency-converted to become the original carrier color signal. At this time, since the reproduced low-pass converted color signal has frequency fluctuations caused by changes in the running speed of the magnetic tape, etc., in the reproduction system of the video tape recorder, frequency conversion is required when converting the frequency of the reproduced low-pass converted color signal. In order to make the obtained carrier color signal stable with a regular frequency, the oscillation output of the local oscillator supplied to the frequency converter is changed in frequency according to the frequency change of the reproduced low-frequency converted color signal. It is necessary to do so. Therefore, the burst signal is extracted from the carrier color signal obtained at the output side of the frequency converter, and the phase is compared with a reference oscillation output having an accurate subcarrier frequency. Based on the comparison output, the carrier color signal is An automatic phase control circuit (hereinafter referred to as an APC circuit) is provided to control the oscillation frequency of the local oscillator so that the phase of the burst signal extracted from the output matches the phase of the reference oscillation output. this
Due to the function of the APC circuit, the frequency of the oscillation output of the local oscillator changes in accordance with the frequency change of the reproduced low-pass conversion color signal, and the carrier color having a stable subcarrier frequency is output from the frequency converter. A signal will be obtained.

By the way, when the color television signal is based on the PAL system, that is, when it is a PAL color television signal, the burst signal in the carrier color signal has a phase of 90 degrees per horizontal period. It is possible to alternately switch between one and the other of two phases having a phase difference. Therefore, if the color video signal reproduced from a magnetic tape recorded as described above is a PAL color television signal, the reproduced low frequency converted color signal is frequency-converted to the original carrier color signal. In the APC circuit provided in connection with the frequency converter that obtains
Since the phase of the burst signal that is compared with the reference oscillation output changes by 90 degrees every horizontal period,
There is a risk that the APC circuit will not operate correctly. Therefore, when a PAL color television signal is recorded on a magnetic tape, a pilot burst signal having a subcarrier frequency and a predetermined constant phase is inserted into the color video signal at the time of recording. In the APC circuit used, this pilot burst signal is extracted instead of the burst signal and compared in phase with the reference oscillation output.

The pilot burst signal is inserted into the color video signal, for example, at a position as shown in FIG. 1A. In FIG. 1A, S _v is a video signal, S _H is a horizontal synchronizing signal, t _a is a horizontal blanking period, t _b is a front porch period, t _c is a back porch period, and _th is a horizontal synchronizing signal. It is a period. Also, during the back porch period _tc , there is a burst signal.
S _B exists. In such a situation, the pilot burst signal _SPB is inserted into each horizontal synchronization signal period _th , and its level is, for example, greater than the burst signal _SB .

In this way, the pilot burst signal _SPB inserted for the APC circuit must be removed from the carrier color signal after the low frequency converted color signal is frequency-converted and the carrier color signal is obtained on the reproduction side. Must be. The pilot burst signal _SPB is removed from the carrier color signal by a cleaning flag pulse generated corresponding to the insertion position of the pilot burst signal _SPB . A generating circuit for this cleaning flag pulse is formed. FIG. 2 shows a conventional cleaning flag pulse generation circuit. Reference numeral 1 designates a voltage controlled flywheel oscillator whose oscillation output is supplied to a slope generator 2 to obtain a slope voltage corresponding to the oscillation output of the flywheel oscillator 1 and supplied to a sample and hold circuit 3. From the terminal 4, a horizontal synchronizing pulse P _h corresponding to the horizontal synchronizing signal period t _h as shown in FIG. horizontal sync pulse
A narrow sampling pulse having a predetermined width is obtained from the rising edge of P _h . Then, the sample-and-hold circuit 3 samples and holds the slope voltage from the slope generator 2 using the sampling pulse from the monomulti vibrator 5, and the hold voltage output is passed through the low-pass filter 6. is supplied to the flywheel oscillator 1,
Oscillation control of the flywheel oscillator 1 is performed.
Therefore, a slope sample and hold type phased locked loop circuit (hereinafter referred to as a PLL circuit) is configured for the flywheel oscillator 1.
is phase-locked to produce an oscillating output with a leading edge before the rising edge of the horizontal synchronization pulse _Ph . This oscillation output is the mono multi-vibrator 7
The mono-multi vibrator 7 is triggered at its leading edge to generate a cleaning flag pulse P having a predetermined width from the leading edge of the oscillation output of the flywheel oscillator 1, as shown in FIG. 1C. _cf is generated and is derived from the output terminal 8. Then, such cleaning flag
During the pulse _Pcf , the carrier chrominance signal is turned off and the pilot burst signal _SPB is removed. Here, the cleaning flag pulse P _cf is used to remove the color signal noise that is likely to be mixed in the front porch period t _b together with the pilot burst signal S _PB , and to remove the conveyed color from the generation of the cleaning flag pulse P _cf. Even if there is a delay in circuit operation until the signal is turned off,
In order to ensure that the pilot burst signal _SPB is removed, etc., it is made to be a phase advancer than the horizontal synchronizing pulse _Ph .

However, in such a conventional cleaning flag pulse generation circuit, if the lock phase of the PLL circuit changes due to drift of the flywheel oscillator 1, the phase of the oscillation output of the flywheel oscillator 1 changes. As a result, the timing at which the monomulti vibrator 7 is triggered changes, and the position of the cleaning flag pulse P _cf relative to the carrier color signal moves on the time axis. There was an inconvenience that the signal _SPB and color signal noise could not be properly removed.

In view of this, the present invention is capable of generating a pulse having a leading edge that maintains a predetermined constant time relationship with the horizontal synchronizing signal in the video signal, and is suitable for use as the above-mentioned cleaning flag pulse generation circuit. This provides a suitable pulse generation circuit. Examples of the present invention will be described below.

FIG. 3 shows an example of a pulse generating circuit according to the present invention. Reference numeral 11 denotes a voltage controlled oscillator, and this voltage controlled oscillator 11 transmits a triangular wave signal having a rising slope portion that rises at a constant slope for a certain period of time and a falling slope portion whose slope can be changed at its first output terminal in a horizontal period. Occurs in An input terminal of a sample and hold section 12 is connected to a first output terminal of this voltage controlled oscillator 11. The sampling signal input terminal of this sample and hold section 12 is connected to the output terminal of a first monomulti-vibrator 14 triggered by a horizontal synchronizing pulse supplied from the input terminal 13, and the output terminal thereof is It is connected to the control end of the voltage controlled oscillator 11 via a low pass filter 15. And these voltage controlled oscillators 11,
A sample-and-hold type PLL circuit is formed by the sample-and-hold section 12 and the low-pass filter 15. The output terminal of the sample/hold section 12 is connected to one input terminal of the level comparator 17 via the DC level shift section 16, and the first output terminal of the voltage controlled oscillator 11 is connected to the other input terminal of the level comparator 17. connected to the input end of the and,
The output terminal of the level comparator 17 is connected to a set terminal S of a set-reset flip-flop (hereinafter referred to as S-RF-F) 18.

On the other hand, the input terminal 19 to which the burst flag pulse corresponding to the burst signal portion in the video signal is supplied is connected to the second mono-multi vibrator 2.
0, and its output end is connected to the input end of the third mono-multi vibrator 21,
Further, its output terminal is connected to one input terminal of the OR gate 22. The other input terminal of the OR gate 22 is connected to the second output terminal of the voltage controlled oscillator 11, and the output terminal is connected to the S-RF・F18
It is connected to the reset terminal R of. S-RF・F1
The output terminal of 8 is connected to one input of an AND gate 23 , and the input terminal 19 is connected to the other input terminal of this AND gate 23 via an inverter 24 . The output terminal of the AND gate 23 is connected to the output terminal 25.

Next, the operation of an example of the pulse generating circuit according to the present invention configured as described above will be explained with reference to the waveforms shown in FIG.

The input terminal 13 receives the horizontal synchronization signal S _H of the video signal.
_A horizontal synchronizing pulse P _h corresponding to
The vibrator 14 is triggered, and a narrow sampling pulse P _hs that rises at the leading edge of the horizontal synchronizing pulse P _h is obtained at its output terminal, and is supplied to the sampling signal input terminal of the sample and hold section 12 .

The first output terminal of the voltage controlled oscillator 11 has a fourth
As shown in the figure, a triangular wave signal is formed of a rising slope portion _T1 having a constant slope and a constant period and a falling slope portion _T2 whose slope can be changed.
T _ps is obtained. And this triangular wave signal T _ps is
The leading edge of the horizontal synchronizing pulse P _h is made to exist within the period of the rising slope portion T ₁ , and the sample and hold section 12 detects this rising slope portion.
The level of T ₁ is sampled and held by the sampling pulse P _hs from the first mono-multi vibrator 14 , and a hold voltage output D _p is obtained at the output end of the sample-and-hold section 12 . This hold voltage output D _p is supplied to the control end of the voltage controlled oscillator 11 through the low-pass filter 15, and the voltage controlled oscillator 11 outputs a hold voltage based on the slope of the falling slope portion T ₂ of the triangular wave signal T _ps . The oscillation frequency is made to correspond to a predetermined value of _{the hold voltage output D p and} is stabilized. The above is the operation of the sample-and-hold type PLL circuit composed of the voltage-controlled oscillator 11, the sample-and-hold section 12, and the low-pass filter 15.

The hold voltage output D _p from the sample and hold section 12 is also supplied to the DC level shift section 16, and its DC level is level-shifted by lowering it by level V, for example, as shown in FIG. The hold voltage output becomes D _p ′. The level of this level-shifted hold voltage output D _p ' and the level of the rising slope portion T ₁ of the triangular wave signal T _ps from the voltage controlled oscillator 11 are determined by the level comparator 17.
A pulse P _cp is obtained at the output end of the level comparator 17, which rises at the time point Q when both levels match. This pulse P _cp is supplied to the set terminal of S-RF・F18, and at the rising edge of the pulse P _cp , the S-RF
RF F18 is set and its output becomes high level.

On the other hand, the burst flag pulse P _bf corresponding to the position of the burst signal S _B from the input terminal 19
The second mono-multi vibrator 20 is triggered at the trailing edge to obtain a pulse of a predetermined width at its output end, and furthermore, at the falling edge of the output pulse of the second mono-multi vibrator 20, the third mono-multi vibrator 20 is triggered. The multi-vibrator 21 is triggered, and a narrow pulse P _d of a predetermined width is obtained at its output end with a delay of time τ from the trailing edge of the burst flag pulse P _bf . This pulse P _d is supplied to the reset terminal of S-RF・F18 through the OR gate 22, and at the rising edge of the pulse P _d , the S-RF・F18
is reset and its output goes low. Therefore, from the S-RF F18, a pulse _Pff is obtained which rises at the time point Q and falls at the rise of the pulse _Pd . This pulse P _ff and the inverted pulse P _bf ′ obtained by inverting the burst flag pulse P _bf by the inverter 24 are supplied to the AND gate 23 and output to the output terminal of the AND gate 23 at the time point Q. a pulse P _e whose edge is defined and whose trailing edge is defined by the leading edge of the inverted pulse P _bf ′ and therefore by the leading edge of the burst flag pulse P _bf , and the trailing edge of the inverted pulse P _bf ′; Therefore, the trailing edge of the burst flag pulse P _bf determines the leading edge, and the pulse P _d
A pulse P _e ' whose trailing edge is determined at the rising edge of P e ' is obtained, and these pulses P _e and P _e ' are led to the output terminal 25 .

Note that from the second output terminal of the voltage controlled oscillator 11, for example, the rising slope portion T ₁ of the triangular wave signal T _ps
A pulse P _ps which takes a low level during the period is obtained and is supplied to the reset terminal of the S-RF F18 through the OR gate 22. Therefore, for some reason,
If burst flag pulse P _bf is not obtained and pulse P _d is not formed, S-RF F1
8 is reset at the trailing edge of the pulse P _ps , and at its output end, the trailing edge of the pulse P _ff extends to the trailing edge of the pulse P _ps , as shown by the dashed line in FIG. Moreover, since a high level output is obtained from the inverter 24 at this time, a pulse is output from the AND gate 23 as shown by the dotted line in FIG.
The trailing edge of the pulse P ps, where P _e and P _e ′ are continuous without forming an edge between them, and the trailing edge time of the pulse P _{e ′} is extended. Thus, a pulse P _g whose trailing edge is determined is obtained, and this pulse P _g is guided to the output terminal 25.

The pulses obtained at the output terminal 25 in the manner described above are used for cleaning and
When used as a flag pulse, the carrier chrominance signal is normally first deactivated during the period of the pulse P _e , and then the pilot burst signal S _PB inserted into the horizontal synchronization signal period and the front porch period are used. Mixed color signal noise and further noise mixed between the pilot burst signal _SPB and the burst signal _SB are removed. Additionally, pulse
During the period P _e ', the carrier color signal is made non-signal, and the noise mixed in during the back porch period after the burst signal S _B is also removed. Therefore, other unnecessary signals in the horizontal blanking period can be reliably removed without removing the burst signal S _B.

In addition, if the burst flag pulse P _bf cannot be obtained for some reason, the carrier color signal is made non-signal during the pulse P _g period, and the burst signal S _B is also removed along with the pilot burst signal S _PB . However, the inconvenience that up to the carrier color signal following the burst signal S _B is removed for one horizontal period can be avoided.

Here, in the pulse generating circuit according to the present invention that operates as described above, due to the drift of the voltage controlled oscillator 11, etc., the voltage controlled oscillator 11, sample/hold section 12, and low pass filter
5, the lock phase of the sample-and-hold type PLL circuit composed of 5 changes, and as shown in FIG.
Suppose that the rising slope portion T ₁ of T _ps moves to the position T _1x indicated by the broken line. At this time, the hold voltage output D _p obtained from the sample and hold section 12 by sampling and holding by the sampling pulse P _hs changes to D _px shown by the dashed line, and is also shifted by the level V from the DC level shift section 16. The held voltage output D _p ′ is shifted from D _px by the level _V , which is also shown by a dashed line.
becomes. At this time, T _1x has the same slope as T ₁ , and D _px ′ has been shifted approximately parallel to D _p ′, so the level of D _p ′ and the level of T ₁ match. The time point Q when the level of D _px ′ and the level of T _1x match coincide with each other. That is, the time point when the level of D _px ' and the level of T _1x match is also Q. Therefore, the rising time of the pulse P _cp obtained at the output terminal of the level comparator 17 does not change, and as a result, the pulse P _e or P _g obtained at the output terminal 25 does not change.
The leading edge of will not change.

In this way, in the pulse generation circuit according to the present invention described above, even if the lock phase of the sample-and-hold type PLL circuit including the voltage controlled oscillator 11 changes, the leading edge of the pulse obtained at the output terminal 25 remains unchanged. time points are largely unaffected and the horizontal sync pulse
It will maintain a certain relationship with P _h .

Note that in the pulse generation circuit according to the present invention, unlike the above-mentioned example, the voltage controlled oscillator generates a triangular wave signal having a falling slope portion that falls at a constant slope for a certain period of time and a rising slope portion whose slope can be changed. It may be generated in a horizontal period. Also,
When a burst flag pulse P _bf is obtained, the level of the constant rising or falling slope portion of the triangular wave signal from the voltage controlled oscillator and the level-shifted hold voltage from the DC level shift section The leading edge is determined at the time when the output level matches the output level, and only the pulse whose trailing edge is determined by the leading edge of the burst flag pulse, that is, the pulse P _e in the above example, is guided to the output terminal. may be made into

As described above, according to the pulse generation circuit according to the present invention, it is possible to generate a pulse of a predetermined width having a leading edge that stably maintains a constant time relationship with the horizontal synchronization signal in the video signal. When the pulse generation circuit according to the present invention is used as a cleaning flag pulse generation circuit for removing unnecessary signals and noise from a carrier color signal during the horizontal blanking period in a playback system of a video tape recorder, This means that unnecessary signals and noise can be removed extremely accurately and stably.

[Brief explanation of the drawing]

FIG. 1 is a waveform diagram used to explain the recording and reproduction of PAL color television signals by a video tape recorder and the operation of a conventional cleaning flag pulse generation circuit. FIG. 3 is a block connection diagram showing an example of the pulse generation circuit according to the present invention; FIGS. 4 and 5 are used to explain the operation of the example shown in FIG. 3. FIG. In the figure, 11 is a voltage controlled oscillator, 12 is a sample/hold section, 14 is a monomulti-vibrator, 15 is a low-pass filter, 16 is a DC level shift section, 17 is a level comparator, and 18 is an S-
RF・F, 23 is an AND gate.

Claims (1)

[Scope of utility model registration request] The oscillation frequency of a voltage controlled oscillator that generates a triangular wave signal formed by a first slope portion having a constant slope and period and a second slope portion following the first slope portion whose slope can be changed is , is controlled based on a hold voltage output from a sample and hold section that samples and holds the level of the first slope portion of the triangular wave signal with a first pulse synchronized with the horizontal synchronization signal in the video signal. a phase locked loop configured as follows; a DC level shift unit for changing the DC level of the hold voltage output from the sample and hold unit; and a first slope of the output of the DC level shift unit and the triangular wave signal. a level comparator for comparing the level with the burst signal portion of the video signal, and a second pulse corresponding to the output of the level comparator and the burst signal portion of the video signal;
Alternatively, the output of the DC level shifter and the level of the first slope portion of the triangular wave signal are controlled in accordance with a control signal that causes a level change portion at the end of the first slope portion of the triangular wave signal. a pulse forming section that generates a third pulse having a leading edge corresponding to a coincident time point and a trailing edge corresponding to a leading edge of the second pulse or a time point of a level change part of the control signal; , a pulse generating circuit that uses the third pulse as an output pulse.