JPH08327609A - Ultrasonic unit - Google Patents

Abstract

PURPOSE: To obtain an ultrasonic unit based on a new phase matching method. CONSTITUTION: The ultrasonic unit having a plurality of receiving elements Qn for receiving ultrasonic signals comprises means SPL for sampling the receiving signal an means TC for time shifting the sampled signal sn in units of sampling period, means SUM for adding the receiving signals fn having identical time lag, a pair of means for convoluting a pair of sine wave signals having the carrier frequency of receiving signal and orthogonal phase and a signal received after a plurality of receiving signals are added over a predetermined length of section being sampled at the time interval of delay accuracy, and means for operating the root of squared sum of outputs from respective convolution means. The root of squared sum is provided as a phase matching output and an ultrasonic beam having high performance directivity is formed. This arrangement reduces the scale of multiplier and simplifies the constitution greatly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultrasonic device used for measuring an object or the like underwater by ultrasonic waves.

[0002]

2. Description of the Related Art Up to now, a method of ultrasonic imaging in water or in a living body has been proposed. In such an apparatus, the method of constructing the reception phasing unit for performing the delay and addition processing of the received signals is the most important in determining the scale of the entire apparatus. Therefore, the present inventors have proposed a frequency shift phasing method that relaxes the accuracy requirement for the delay phasing unit (Journal of Acoustical Society of Japan, Vol. 44, No. 9 (1988) pp. 6).
46-652). In addition, as a method of configuring the reception phasing unit, the quantized phasing method is becoming the main technique due to the rapid development of integrated circuit technology in recent years. In this quantization and phasing method, the operation speed of the sampling circuit or the quantization accuracy becomes a problem.
With respect to this problem, the present inventors have proposed a frequency shift oversampling method (Japanese Patent Application No. 4-252576).
issue).

As a method of relaxing the operation speed of the sampling circuit, a phasing method by interpolation is known. This technology is, for example, "Digital Interpolation".
Beamforming for Low-Pass
and Bandpass Signals ", Pro
ceedings of the IEEE, Vol.
67, No. 6, June (1979).

In the phasing method by interpolation, the received signal is sampled with a coarser time precision than the desired time precision, and the signal value with the desired time precision is added at the time of phasing addition by using an interpolation function such as a sampling function. Calculate and add. In the phasing method based on this interpolation, a large time delay in units of sampling cycle is performed by a circuit configuration using a memory circuit and a shift register, and a minute delay below the sampling cycle is realized by using an interpolation function. .

Further, in a method generally called a baseband phasing method, a received signal is frequency-shifted by orthogonal reference waves and is converted into a single signal band having a DC component as a center frequency through a low frequency pass filter. Delay processing from.

[0006]

In the above-mentioned prior art, in the case of simultaneously realizing a configuration for performing frequency shift processing (demodulation processing) to the baseband and phasing addition by interpolation, a large number of phase rotations or frequency shifts are required. However, there is a problem in that the device scale becomes large. That is, it is necessary to provide a mixer or a demodulation circuit for moving the frequency for each received signal. Also, if the demodulation circuit is post-positioned after performing phasing by interpolation without performing frequency shift, the output of the convolution operation circuit with the interpolation function that uses a sampling function etc. preserves the received signal band with the carrier wave kept. Therefore, it is necessary to perform the frequency shift process (demodulation process) at a high frequency.

In view of such a situation, an object of the present invention is to
It provides a simple phasing method mainly consisting of an interpolator without post-demodulation circuit after phasing, and achieves a great simplification of the device configuration based on this phasing method. To provide a sound wave device.

[0008]

The structure of the present invention comprises means for sampling the signal received by each element, means for moving the sampled signal in units of sampling cycles, and reception of the same delay time. An adding means for adding signals, a pair of sine waves having a carrier frequency of a received signal and having mutually orthogonal phases, and a plurality of received waveforms at a predetermined section length sampled at delay accuracy time intervals are provided. It has a pair of convolution means for convolving the received signal after addition, and means for calculating the square root of the sum of squares of the output of each convolution means, and obtains the square root of the above sum of squares as a phasing output. The feature is that it forms an ultrasonic beam with high-performance directivity.

In another configuration of the present invention, each of the pair of sinusoidal waves is multiplied by the waveform convoluted with the received signal after the addition in common with a waveform capable of obtaining an arbitrary time integration effect, It is characterized in that the time interval of convolution in the convolution means is set shorter than the time interval of sampling in the sampling means.

[0010]

In the phasing method, the received signals from the respective elements are sampled, time-shifted, added for each signal at the same time, and finally convolved. By such processing,
The principle that enables accurate delay processing of signals will be described below.

A signal having a center frequency of ω _S is transmitted from an ultrasonic wave transmitter / receiver. The reflected signal due to this transmission signal is
(T). A waveform obtained by sampling this signal is s (t),
If the sampling function is W (t), then by convolution

[0012]

## EQU1 ## a (t) = ∫s (t−ε) W (ε) dε = s (t) * W (t) (Equation 1) Here, * indicates the convolution operation, and the integral ∫ is −
Perform from ∞ to + ∞. The signal a (t−τ _i ) obtained by delaying the waveform a (t) by τ is

[0013]

[Number 2] becomes _{a (t-τ i) =} ∫s (t-τ i -ε) W (ε) dε = s (t-τ i) * W (t) ... ( number 2). Here, as in (Equation 1), * indicates a convolution operation, and integration is performed from −∞ to + ∞. This relationship indicates that a properly delayed signal is formed by forming a waveform obtained by moving the sampled waveform by a desired time τ _i and convolving the waveform with a sampling function.
Here, since the convolution is a linear operation, it is possible to perform this operation after adding all signals.

The result of delay addition of the signals of i = 1 to N is a
(T−τ)

[0015]

[Number 3] a (t-τ) = Σa (t-τ i) = Σs (t-τ i) * W (t) = W (t) * {Σs (t-τ i)} ... ( number 3 ) Here, * indicates a convolution operation, and the sum Σ is performed in the range of i = 1 to i = N.

On the other hand, a (t) and a (t-τ) have an envelope shape of f (t), an initial phase of δ, and an imaginary unit of j.
It can be expressed as follows.

[0017]

## EQU00004 ## a (t) = f (t) cos (ω _s t + δ) = f (t) exp {-j (ω _s t + δ)} + f (t) exp {j (ω _s t + δ)} ... 4)

[0018]

Equation 5] a (t-τ) = f (t-τ) exp {-j (ω s t-ω s τ + δ)} + f (t-τ) exp {j (ω s t-ω s τ + δ)} (Equation 5) Consider that instead of obtaining a (t) as the final phasing output, the phasing output of the envelope f (t) is obtained. The impulse response v (t) of the low-pass filter having the pass band of the reception signal bandwidth and the angular frequency ω _s ,
The product V of the initial phase φ and a pair of sine waves whose phases are orthogonal to each other
(T) (Equation 6) forms a bandpass filter centered on the angular frequency ω _s .

[0019]

[6] V (t) = v (t ) exp {-j (ω s t + φ)} ... ( number 6) V (t) and a (t-τ) convolution of the b (t-τ) To calculate,

[0020]

Equation 7] b (t-τ) = a (t-τ) * V (t) = <f (t-τ) exp {-j (ω s t-ω s τ + δ)} + f (t-τ) exp {j (ω _s t-ω _s τ + δ)}〉 * V (t) = <f (t−τ) exp {−j (ω _s t −ω _s τ + δ)}〉 * V (t) + <f (t-τ) exp {j (ω s t-ω s τ + δ)}> * V (t) ( 7) At this time, the convolution of the V (t) is the second term of f (t-τ) because having a frequency characteristic for suppressing _{exp {j (ω s t-} ω s τ + δ)}, ( 7) is

[0021]

[Equation 8] can be approximated as b (t-τ) ≒ < f (t-τ) exp {-j (ω s t-ω s τ + δ)}> * V (t) ... ( number 8). Furthermore, if the transformation of (Equation 8) is performed,

[0022]

Equation 9] b (t-τ) ≒ < f (t-τ) exp {-j (ω s t-ω s τ + δ)}> * (v (t) exp {-j (ω s t + φ)}) = <f (t-τ) exp (-jω s t)> * <v (t) exp (-jω s t)> exp {-j (φ-ω s τ + δ)} = <f (t-τ) * v (t)> exp { -j (ω s t + φ-ω s τ + δ)} ... ( Equation 9) is obtained. When the absolute value of the complex signal of (Equation 9) is taken, the phase term is dropped and the envelope ev (t−τ) is

[0023]

[Equation 10] ev (t−τ) = f (t−τ) * v (t) (Equation 10)

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The operation of this system will be described in detail below with reference to the drawings. FIG. 1 shows the basic configuration of an ultrasonic device according to the present invention. Ultrasonic wave receiver Q ₁ ... Q _n ... Q _N (Hereinafter, Q _n (n =
1 ... N)), the received signal a ₁ (t) ... a
_n (t) ... a _N (t) (hereinafter, a _n (t) (n = 1 ...
N))) is obtained. This signal a _n (t) is sampled at a time interval T ₀ by a sampling circuit SPL (controlled by a control signal C1) including an analog-digital converter to obtain s _n (t). obtain. This sampled signal s _n (t) is shown in FIG.

The signals s _n (t) (n = 1 ... N) have a mutual time delay corresponding to the direction in which the reflector is present, and each of them is shown by a chain line P ₀ corresponding to the incident direction of the reception wavefront. Appear all at once from the time (note that in FIG. 2, n = 1 ... N is n = ...- 2, −1, as in FIG. 4 described below.
It is expressed in the format of 0, +1, +2, ...).

The time axis t of this signal s _n (t) is moved by the time axis correction unit TC (controlled by the control signal C2) shown in FIG. FIG. 3 shows a specific configuration of the time axis correction unit TC. The signal d _n (t) is delayed in the storage unit D0 with respect to the signal s _n (t) in units of the time interval T _0.
(N = 1 ... N) is obtained, and the signal d _n (t) is delayed in the storage unit D1 in units of time intervals T ₁ (T ₀ = uT ₁ ) shorter than the time interval T _0. Therefore, s _n (t)
Are delayed by pT ₀ + qT ₁ (0 ≦ q <u−1), and the time axis t is set so that the incident time P ₀ of the target wavefront matches all signals s _n (t) with the accuracy of T _1. Move. The entire control is performed by the control signal C2. Here, p, q, and u are all integers, and time adjustment is performed with a time accuracy T ₁ that is significantly higher than the time interval T ₀ in sampling.

The output of this time axis correction unit TC, f _n (t)
(N = ... -2, -1, 0, +1, +2, ...) is shown in FIG.
(A). Here, the value of the time when there is no received signal is 0. Further, here, u = 4 (T ₀ = 4
It is shown as T ₁ ). This signal f _n (t) is added at each time by the adder SUM shown in FIG. 1 (controlled by the control signal C3), and the signal g shown in FIG.
Get (t). The configuration of the adder SUM is shown in FIG. 3 together with the time correction unit TC, where A is a parallel adder using ripple carry and outputs the sum output of the two input values to the input terminal of the third adder. Further, R is a register, which is controlled by a control signal C3 which is a clock having a time interval T ₁ and holds a corresponding time value.

This added signal g (t), which is the output of the adder SUM, and the waveform V _r (t) (Equation 11) shown in FIG. 5A and the waveform V _i (t) shown in FIG. 5B. ) (Equation 12), or the waveform V _r '(t) (Equation 1) shown in FIG.
3) and waveforms V _i '(t) (Equation 14) shown in FIG. 5 (d), respectively, and convolution integration processing, and calculation of the square root of the sum of squares of the results of the convolution integration processing. The absolute value of the complex output is calculated by the convolution circuit CNV shown in FIG. 1 to obtain a phasing output h (t) as shown in FIG. 4 (c). In the present embodiment, the convolution circuit C including the calculation means for obtaining the square root of the sum of squares.
It shall be referred to as NV.

[0029]

[Number 11] _{V r (t) = {sin} (πt / T w) / (πt / T w)} cos (ω c t) ... ( number 11)

[0030]

[Number 12] _{V i (t) = {sin} (πt / T w) / (πt / T w)} sin (ω c t) ... ( number 12)

[0031]

[Number 13] _{V r '(t) = cos} (ω c t) ... ( number 13)

[0032]

Equation 14] _{V i '(t) = sin} (ω c t) ... ( Equation 14) waveform V _r' (t) and V _i '(t) is a specific time interval a sine wave in phase with each other perpendicular The period is made to coincide with the carrier wave period of the received signal. Also, the waveform V
_r (t) and V _i (t) are low waveforms having rectangular pass bands on the frequency spectrum that are similar to the bandwidth of the received signal in the waveforms V _r ′ (t) and V _i ′ (t), respectively. The summed signal g (t) is obtained by multiplying the impulse response waveform of the band pass filter.
The convolution with and has the effect of filtering leaving only one signal band on the complex frequency spectrum.

In the example shown in FIG. 4C, since the received signals are from the target direction, the added waveforms are in phase, and the output h (t) of the convolution circuit CNV is h ₀ (t).
And get as a big value.

In addition to the waveforms ((Equation 11) to (Equation 14)) shown in FIGS. 5A to 5D, there are waveforms for suppressing unnecessary signal components due to sampling, and as a result of convolution,
Any waveform can be used as long as it is a waveform that outputs components orthogonal to each other.

FIG. 6 shows a configuration example of the convolution circuit CNV. The waveform g (t) sequentially transferred by the shift register SHR (controlled by the transfer clock C _4a ) and V _r (t) (or V _r ′) stored in the waveform storage unit MR1.
(T)) and V _i (t) (or V _i '(t)) stored in MR2, and the multiplication result is added by adder SS (controlled by addition clock C _4b ), respectively. The signals h ₁ (t) and h ₂ (t) are obtained at the same time by adding all the waveforms (f _n (t) in FIG. 4A). The adder SS is added by the square sum square root calculator ABS.
After taking the square sum of the output of, the square root operation is performed to obtain the envelope output h (t) from which the phase term of the signal has been removed. That is,

[0036]

[Equation 15] h (t) = √ <{h ₁ (t)} ² + {h ₂ (t)} ² > ... (Equation 15) In (Equation 15), √ <> indicates that the square root in <> is taken.

Here, assuming that the clock C _4a and the clock C _4b are matched and the time interval is T ₁ , h (t) is calculated for each T ₁ . Since this time interval T ₁ is basically sufficient as long as it is within the Nyquist interval for the received signal s (t), it is possible to make the clock C _4b slower than the clock C _4a. A configuration in which C _4b is the time interval T ₀ is particularly advantageous.

The above is the description of the operation of the ultrasonic device of the present invention with respect to the signal from the target direction. However, in the case of the signal from other than the target direction, the time axis correction is performed unlike the case of FIG. 4A. After the time axis correction by the section TC, the incident times P ₀ of the wavefronts are not the same time, so that each signal f _n (t) (n
= ... -2, -1, 0, +1, +2, ...) Since there is a phase difference, the addition signal g (t) which is the output of the adder SUM
Becomes a small signal that is canceled and is irregular. As a result,
The output h (t) of the convolution circuit CNV also becomes a small output. This is the operating principle that makes it possible to select and extract only signals from the target direction. Further, in FIG. 1, control signals C1, C2, C3, C4
Are controlled by the control unit CNT.

The directivity performance of the ultrasonic beam thus synthesized is determined by the accuracy of time alignment of received signals (Journal of Acoustical Society of Japan, Vol. 44, No. 9, pp. 6).
53-657), it is difficult to speed up the sampling circuit. However, according to the configuration of this embodiment described here, the sampling interval of the received signal remains the time interval T ₀ , and the time between the sampled signals s _n (t) (n = 1 ... N) is changed. Only the alignment accuracy can be improved to T ₁ , and an ultrasonic beam having high performance directivity can be formed.

The sampling period T ₀ is determined by the frequency bandwidth of the envelope of the received signal, and can be set to a period longer than the Nyquist interval of the upper limit frequency of the frequency band. The sampling frequency F ₀ = 1 / T ₀ is selected so that the frequency is twice or more the signal bandwidth B, and an integral multiple of F / 2 does not exist in the signal band before sampling. That is, assuming that the center frequency of the signal band is F _c , 2B ≦ F ₀ , and m is all natural numbers.

[0041]

Equation 16] _{mF 0/2 <F c -B} / 2 and _{(m + 1) F 0/} 2> to select the _{F c + B / 2 ... F} 0 satisfying equation (16). By selecting the sampling frequency F _{0 in} this way, the sampling speed can be significantly reduced.

Various modifications of the ultrasonic device of the present invention described above are possible. The first modified configuration is shown in FIG. As shown in FIG. 7, adders (A ₀ , A ₁ , ..., A _q ,
, A _u-1 ) is arranged in parallel with respect to each received signal, and does not have a storage unit D1 that delays by a short time interval T ₁ .

In this structure, the signal d _n (t) is applied only to the adder A _q corresponding to the value of q by the switch MPX. With such a configuration, the addition signal g _q (t) at the time corresponding to each q is obtained as the output of the corresponding adder. With such a configuration, the time allowed for one addition is T ₀ , and the adder (A ₀ ,
_{A 1, ..., A q,} ..., it is possible to lower the operating speed of the A _u-1). Signal g _q (t) (q = 0, 1, ... Q ...
u-1) is subjected to a convolution operation in the convolution circuit CNV.

A second modified structure is shown in FIG. As shown in FIG. 8, the received signal d _n (t) is divided into a plurality of groups for n, and each of the plurality of adders SUMB is arranged in parallel for each group, and has a parallel addition configuration. In FIG. 8, the received signal d _n (t) is (1 to n + 1) and (n + 2 to 2).
N) is divided into two groups. Although it is divided into two groups here, the number of divisions may be further increased. The configuration of FIG. 8 is also a configuration in which the storage unit D1 that delays in units of short time intervals T ₁ is not included.

This structure further connects the adder A _n to the signal line corresponding to the value of q by the switch SEL _n . In the example shown in FIG. 8, the adder A ₁ is connected on the signal line corresponding to q = 3, and the adder A _n is connected on the signal line corresponding to q = 2. In FIG. 7, the signal d
_{Although n} (t) is added only on the signal line g _q corresponding to q, the addition of the time corresponding to each q is performed by a simple configuration in which the number of adders used is reduced as shown in FIG. The signal g _q (t) is obtained as the output of the corresponding adder. With such a configuration, the operating speed of the adder can be reduced, and the number of required adders can be reduced. In the configuration example shown in FIG. 8, in order to compensate for the delay in the adder arranged for each of the groups described above, pipeline processing is possible, and appropriate addition is performed between the groups. Register R for each stage
Has been arranged.

That is, it has a register R for holding the signals partially added by the adding means, and adds a plurality of the partially added signals by pipeline processing.
In a normal configuration, d ₁ to d _n shown in FIG. 8 have a common wavefront P _0.
It is a sampling signal corresponding to, in the case of the pipeline processing, signal d ₁ to d _n is the signal d _{n + 1} ~d _N T ₀ than
Sampling signal at a time delayed by By doing so, the delay time due to the addition processing in the adder SUMB in the lower stage can be compensated. Signal g _q (t) (q =
0, 1, ... Q ... u-1) are convolved in the convolution circuit CNV. The third modified configuration is shown in FIG. As shown in FIG. 9, the storage capacity of the long-time storage unit D0 is reduced by making the unit configuration including the time conversion unit and the adder a subordinate connection configuration in which the units are subordinately connected. In the configuration of FIG. 9, the received signal s _n (t) is n = 1 to k,
It is divided into two groups of n = k + 1 to N, and each of the plurality of unit configurations described above is connected to each group. In each group, a delay with the time interval T ₀ as a unit time is performed in the storage unit D0 to obtain d _{1 to} d _k and d _{k + 1 to} d _N , respectively, and d
_{1 to} d _k and d _{k + 1 to} d _N are input to the adder SUM of each group,
In each adder SUM, the signal d _n (t) is divided into a plurality of groups, and for each of these groups, the added signal gg _q (t) (q is a signal d _n divided into a plurality of groups).
(Indicates an argument for identifying each group of (t)), and subsequently, gg _q (t) in each group of the two groups is a quadratic delay circuit DD0 with the sampling time interval T ₀ as a unit. Will be delayed again by. The signals from the second group that have been delayed again by the secondary delay circuit DD0 are again added by the secondary adder SSUM, and finally the added signal g _q (t) is obtained.

This signal g _q (t) is the convolutional circuit CN
The convolution operation is performed on V. With this configuration, the storage unit D that delays the time interval T ₀ as a unit time
The storage capacity of 0 can be reduced.

[0048]

The ultrasonic device of the present invention is based on a new phasing method in which the received signals from the respective elements are added separately for each minute delay time, and finally convolution processing is performed, and the required multiplier is provided. The number of devices can be reduced and the device configuration can be greatly simplified.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of an ultrasonic device according to the present invention.

FIG. 2 is a diagram illustrating a relationship between a received signal and an incident wavefront, and a sampled signal s _n (t).

FIG. 3 is a diagram illustrating a detailed configuration of a time correction unit and an adder.

FIG. 4 is a diagram showing (a) an output waveform of a time axis correction unit, (b) an output waveform of an adder, and (c) an output waveform of a convolution circuit in a signal from a target direction.

FIG. 5 is a diagram showing examples (a) to (d) of convolutional waveforms.

FIG. 6 is a block diagram showing a configuration example of a convolution circuit.

FIG. 7 is a block diagram showing a first modified configuration of the basic configuration of the ultrasonic device according to the present invention.

FIG. 8 is a block diagram showing a second modified configuration of the basic configuration of the ultrasonic device according to the present invention.

FIG. 9 is a block diagram showing a third modified configuration of the basic configuration of the ultrasonic device according to the present invention.

[Explanation of symbols]

Q _n ... Ultrasonic wave receiver, SPL ... Sampling circuit, TC ... Time correction unit, SUM ... Adder, CNV ... Convolution circuit, CN
T ... Control unit, ABS: Square sum of squares operator, SHR ... Shift register, MR1, MR2 ... Waveform storage unit, SS ... Adder, A ₀ , A ₁ , ..., A _q , ..., A _u-1 ... Addition Bowl, D1 ...
Storage unit, SUMB ... Adder, SEL _n ... Switching device, R
... register, D0 ... storage section, DD0 ... secondary delay circuit,
SSUM ... Secondary adder.

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location G01S 15/89 8907-2F G01S 15/89 B

Claims (8)

[Claims] 1. In an ultrasonic device having a plurality of receiving elements for receiving an ultrasonic signal, sampling means for sampling the received signal and time conversion for converting each sampled signal into a different time relationship. Means, an adding means for adding the values of the time-converted signals at the same time, a convolution means for respectively performing a convolution process of the addition result by the adding means and two different reference signals, and the convolution means An ultrasonic device having means for obtaining a square root of a sum of squares of two convolution processing results. 2. The ultrasonic device according to claim 1, wherein the addition means determines that the same time is within a specific time interval within a sampling time interval in the sampling means. . 3. The ultrasonic device according to claim 1, wherein the adding means is composed of parallel adders connected in parallel. 4. The ultrasonic device according to claim 3, wherein the adding means includes a switch, and the switch causes the parallel adder to operate for a signal at a corresponding time. 5. The apparatus according to claim 1, further comprising means for holding the signals partially added by said adding means, and adding a plurality of said partially added signals by pipeline processing. An ultrasonic device characterized by: 6. The ultrasonic device according to claim 1, wherein the time converting means and the adding means are unitary and a plurality of the unitary constituents are connected subordinately. 7. The ultrasonic device according to claim 1, wherein a convolution time interval in the convolution means is set shorter than a sampling time in the sampling means. 8. The ultrasonic device according to claim 1, wherein the two different reference signals are a pair of sine waves whose phases are orthogonal to each other.