JPH0821664B2 - Lead solder plating equipment - Google Patents
Lead solder plating equipmentInfo
- Publication number
- JPH0821664B2 JPH0821664B2 JP2289393A JP28939390A JPH0821664B2 JP H0821664 B2 JPH0821664 B2 JP H0821664B2 JP 2289393 A JP2289393 A JP 2289393A JP 28939390 A JP28939390 A JP 28939390A JP H0821664 B2 JPH0821664 B2 JP H0821664B2
- Authority
- JP
- Japan
- Prior art keywords
- cathode
- lead
- solder
- solder plating
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910000679 solder Inorganic materials 0.000 title claims description 58
- 238000007747 plating Methods 0.000 title claims description 43
- 239000004065 semiconductor Substances 0.000 claims description 22
- 238000000034 method Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 5
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 229910001369 Brass Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Electroplating Methods And Accessories (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 「産業上の利用分野」 この発明はIC（半導体集積回路）等の半導体装置のリ
ードに厚膜半田メッキを施す半田メッキ装置に関する。TECHNICAL FIELD The present invention relates to a solder plating apparatus for performing thick film solder plating on leads of a semiconductor device such as an IC (semiconductor integrated circuit).
「従来の技術」 ICなどの半導体装置の実装において、信頼性が高く、
コストのかからない実装方法が望まれている。しかし、
近年の半導体集積回路の大規模化に応じ、それを搭載す
るICパッケージの多ピン化および狭ピッチ化が加速して
いるために、これに対応した精密半田付け技術の進歩が
伴わない状況が生じてきている。"Conventional technology" High reliability when mounting semiconductor devices such as ICs.
A cost-effective mounting method is desired. But,
As the scale of semiconductor integrated circuits has increased in recent years, the number of pins and the pitch of IC packages on which they are mounted have been increasing, and the situation in which precision soldering technology has not progressed in response to this has arisen. Is coming.
即ち、多ピンおよび狭ピッチ化されたICの端子を半田
付けするに際し、微細な半田付け部に一定量の半田を安
定的に供給することが極めて困難であるために、従来、
これらのICに対し、手付け作業に負っているところが大
きいのが現状である。In other words, when soldering multi-pin and narrow-pitch IC terminals, it is extremely difficult to stably supply a fixed amount of solder to a fine soldering portion.
At present, these ICs are largely relied on by hand work.
ところが手付け作業では、微細な部分に半田を供給す
る場合、供給する半田量が一定しない問題がある。この
ため、供給する半田量が少ない場合は、接合部の強度不
足を来し、また、半田量が過多の場合は、隣接する端子
どうしが半田のブリッジによって接合されて短絡してし
まう不具合を生じていた。However, there is a problem in the soldering operation that when supplying solder to a minute part, the amount of supplied solder is not constant. For this reason, when the amount of solder supplied is small, the strength of the joint becomes insufficient, and when the amount of solder is excessive, adjacent terminals are joined by a bridge of solder and short circuit occurs. Was there.
そこで、この種の半導体装置の基板への実装方法とし
て、予め半導体装置の端子、例えば、ICのリードに半田
メッキを施しておき、基板の回路への接合の際に、接合
部分に半田を外部から供給して接合する方法がとられて
いる。Therefore, as a method of mounting this type of semiconductor device on a substrate, a terminal of the semiconductor device, for example, a lead of an IC is plated with solder in advance, and when the substrate is joined to a circuit, the solder is externally applied to the joint. And joining them.
ここで、半導体装置の端子に施されている半田メッキ
は、外部から供給される半田との濡れ性を良好にする目
的で設けられたもので、数μｍ程度の厚さで形成され
る。しかし、この程度の厚さの半田メッキのみでは、接
合強度が不足するので、不足となる半田を以下に説明す
る方法で外部から供給して接合作業を行っていた。Here, the solder plating applied to the terminals of the semiconductor device is provided for the purpose of improving the wettability with the solder supplied from the outside, and is formed with a thickness of about several μm. However, only with solder plating having such a thickness, the bonding strength is insufficient, so that the insufficient solder is supplied from the outside by a method described below to perform the bonding operation.
半田の供給方法には、糸半田を用いる方法、端子が接
合される基板のパッドに予めスクリーン印刷などによっ
て半田ペーストを塗布しておく方法、ディスペンサーに
よって基板のパッドに半田ペーストを塗布する方法、溶
融半田槽に基板を浸漬する方法などがある。As a solder supply method, a method of using a thread solder, a method of previously applying a solder paste to a pad of a substrate to which terminals are joined by screen printing, a method of applying a solder paste to a pad of a substrate by a dispenser, a melting There is a method of immersing the board in a solder bath.
しかし、QFPなどの多ピンで、リードの間隔が狭い本
体部を有するIC、例えば、リード間隔が0.65mm以下のIC
などでは、供給半田量が僅かでも過剰であると、リフロ
ー（溶融）後にリード間の半田によるブリッジが発生
し、また、少しでも不足すると、接合強度の不足が生じ
るために、適正な量の半田を供給することが極めて困難
であった。However, ICs with multiple pins such as QFP and having a main body with narrow lead spacing, for example, ICs with lead spacing of 0.65 mm or less
For example, if the amount of supplied solder is too small, a bridge due to the solder between the leads may occur after reflow (melting), and if it is even a little short, the joint strength may be insufficient, so an appropriate amount of solder may be used. Was extremely difficult to supply.
そこで、本願出願人は以下説明するように、ICのリー
ドに厚膜半田メッキを施すことにより適量な半田をリー
ドに付着させる方法を提案するに至った。Therefore, as described below, the applicant of the present application has proposed a method of applying an appropriate amount of solder to a lead of an IC by applying a thick-film solder plating to the lead.
第５図はQFPなどの多ピンパッケージICの多数のリー
ドに電気半田メッキを施すための治具１を示すものであ
る。この治具１は黄銅などの金属からなる４角形状の上
枠３と非導電体の下枠２とネジ４…とから構成されてい
る。FIG. 5 shows a jig 1 for performing electric solder plating on many leads of a multi-pin package IC such as QFP. The jig 1 includes a rectangular upper frame 3 made of a metal such as brass, a non-conductive lower frame 2 and screws 4.
そして、第６図に示すように、その下枠２と上枠３と
の間にQFPなどの多ピンパッケージICの本体部５のリー
ド6,6,…を挾み、ネジ４…で固定したのち、この治具１
を半田メッキ浴Ａに浸漬し、リード6,6,…の大部分が半
田メッキ浴Ａ中に浸されるように配置し、治具１を陰極
に、半田インゴット７を陽極として電気メッキすること
によって行なわれる。Then, as shown in FIG. 6, the leads 6, 6, ... Of the main body 5 of the multi-pin package IC such as QFP are sandwiched between the lower frame 2 and the upper frame 3 and fixed with screws 4. Later, this jig 1
Is soaked in a solder plating bath A, and most of the leads 6, 6, ... Are so arranged as to be immersed in the solder plating bath A, and the jig 1 is used as a cathode and the solder ingot 7 is used as an anode for electroplating. Done by.
「発明が解決しようとする課題」 ところで、上述した従来の半田メッキ装置によってQF
Pのリードの半田メッキを行った場合、QFPの４隅の近傍
のリードは他のリードよりもメッキ厚が厚くなる傾向に
ある。このため、QFPをプリント基板に実装する際にQFP
の４隅の近傍における各リードの間が半田のブリッジに
よって短絡される恐れがあるという問題があった。ま
た、リードのメッキ厚が一定でないため、QFPを実装す
る際の実装強度が安定性に欠けるという問題があった。"Problems to be solved by the invention" By the way, the above-mentioned conventional solder plating apparatus is used for QF
When the P lead is solder-plated, the lead near the four corners of the QFP tends to have a thicker plating thickness than other leads. Therefore, when mounting the QFP on the printed circuit board, the QFP
There is a problem that the solder bridges may short-circuit between the leads in the vicinity of the four corners. Moreover, since the lead plating thickness is not constant, there is a problem in that the mounting strength when mounting the QFP lacks stability.
この発明は上述した事情に鑑みてなされたものであ
り、各リードに対し均一な厚さの半田メッキ槽を電析さ
せることができるリードの半田メッキ装置を提供するこ
とを目的とする。The present invention has been made in view of the above circumstances, and an object thereof is to provide a lead solder plating apparatus capable of depositing a solder plating bath having a uniform thickness on each lead.
「課題を解決するための手段」 この発明は、半導体装置の本体部の周囲に配設された
複数のリードの基部のみに当接して、この半導体装置が
載置される受け部と、 前記複数のリードに当接し、各リードの基部を前記受
け部との間に挟持する陰極と、 前記リードに対し、前記陰極と反対側に配設される陽
極と、 前記陰極から突出して形成され、前記本体部の周囲の
角部近傍における前記リードの配設されていない領域に
配設される補助陰極と を具備し、前記陰極と前記受け部がリードの基部を挟持
している状態で半田メッキ液中にて前記陽極と前記陰極
および前記補助陰極との間に電流を流すことにより、前
記リードに半田を電析させることを特徴としている。"Means for Solving the Problem" The present invention relates to a receiving portion on which the semiconductor device is mounted, by abutting only on the base portions of a plurality of leads arranged around the main body of the semiconductor device, A cathode that abuts the lead and sandwiches the base part of each lead between the receiving part and the receiving part; an anode that is disposed on the opposite side of the cathode with respect to the lead; An auxiliary cathode disposed in a region where the lead is not disposed in the vicinity of a corner around the main body, and the solder plating solution with the cathode and the receiving portion sandwiching the base of the lead. It is characterized in that a solder is electrodeposited on the leads by passing a current between the anode, the cathode and the auxiliary cathode.
「作用」 上記構成によれば、補助陰極への電析が行われること
により、本体部周囲の角部のリードにメッキが過剰に電
析されるのが抑えられる。[Operation] According to the above-described configuration, the electrodeposition on the auxiliary cathode prevents the leads on the corners around the main body from being excessively plated.
「実施例」 以下、図面を参照し、本発明の一実施例を説明する。[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.
第１図はこの発明の一実施例による半田メッキ装置の
構成を示す正断面図である。この図において、11はチタ
ン材による陰極であり、略直方体状をなすと共に、その
上部は絶縁材によるカバー10によって覆われ、その下部
は半導体装置の本体部５に対応した形状の凹部が形成さ
れている。この凹部の周囲のチタン材が本体部５の４辺
に配列したすべてのリード6,6,…の基部上面に当接す
る。また、11a,11a,…は、ダミー陰極（本発明の補助陰
極に相当する。）で有り、陰極11から、第２図に示すよ
うに、本体部５の４角のリード６の存在しない各４領域
に突出している。ダミー陰極11aの材料としては、42合
金（Fe−Ni合金）あるいはチタン等が好ましい。12はPE
EK材等の絶縁材による下受台（本発明の受け部に相当す
る。）であり、その上部は中央部が除去されることによ
り、リード6,6,…の各基部に当接する塀状部12a,12a,…
が形成されている。また、下受台12はその断面積が下部
へ向う程小さくなるように、側部にテーパが形成されて
いる。14は保持部材であり、下受台12のテーパ部と当接
するすり鉢状の凹部が形成されている。また、保持部材
14の周囲には陰極11と対向する位置に陽極13が設けられ
ている。FIG. 1 is a front sectional view showing the structure of a solder plating apparatus according to an embodiment of the present invention. In this figure, reference numeral 11 is a cathode made of a titanium material, which has a substantially rectangular parallelepiped shape, an upper portion thereof is covered with a cover 10 made of an insulating material, and a lower portion thereof is provided with a concave portion having a shape corresponding to the main body portion 5 of the semiconductor device. ing. The titanium material around the recess is in contact with the upper surfaces of the bases of all the leads 6, 6 arranged on the four sides of the main body 5. Further, 11a, 11a, ... Are dummy cathodes (corresponding to the auxiliary cathodes of the present invention), and each of the cathodes 11 does not have the four leads 6 of the main body 5 as shown in FIG. It projects in 4 areas. As the material of the dummy cathode 11a, 42 alloy (Fe-Ni alloy), titanium or the like is preferable. 12 is PE
It is a lower pedestal made of an insulating material such as EK material (corresponding to the receiving portion of the present invention), the upper portion of which is a fence-shaped member that abuts on each base portion of the leads 6, 6, ... Part 12a, 12a, ...
Are formed. Further, the lower pedestal 12 is formed with a taper on its side so that its cross-sectional area becomes smaller toward the lower part. Reference numeral 14 denotes a holding member, which is formed with a mortar-shaped concave portion that comes into contact with the tapered portion of the lower support 12. Also, a holding member
An anode 13 is provided around 14 at a position facing the cathode 11.
この半田メッキ装置による半田メッキは次のようにし
て行われる。リードフォーミングの完了した半導体装置
は、下受台12に載せられ、その本体部５の４辺の各リー
ド6,6,…の基部が塀状部12a,12a,…によって下から支え
られる。次いで陰極11が半導体装置の上に載せられ、陰
極11の下面凹部の周囲のチタン材と下受台12の塀状部12
a,12a,…とによってリード6,6,…の基部が挟まれる。そ
して、半導体装置および陰極11の載置された下受台12が
保持部材14のすり鉢状部に収納される。陽極13は、リー
ド6,6…との距離ｄが約５〜20mm程度となる位置に設置
される。Solder plating by this solder plating apparatus is performed as follows. The semiconductor device for which the lead forming has been completed is placed on the lower pedestal 12, and the bases of the leads 6, 6, ... On the four sides of the main body 5 are supported from below by the fence-shaped portions 12a, 12a ,. Next, the cathode 11 is mounted on the semiconductor device, and the titanium material around the concave portion on the lower surface of the cathode 11 and the wall 12
The bases of the leads 6, 6, ... Are sandwiched by a, 12a ,. Then, the lower pedestal 12 on which the semiconductor device and the cathode 11 are placed is housed in the mortar-shaped portion of the holding member 14. The anode 13 is installed at a position where the distance d from the leads 6, 6 ... Is about 5 to 20 mm.
このようにして半導体装置の装着が完了し、この半田
メッキ装置が半田メッキ液中に浸され、陰極11およびダ
ミー陰極11aと陽極13に電流が流される。In this way, the mounting of the semiconductor device is completed, the solder plating apparatus is dipped in the solder plating solution, and the current is passed through the cathode 11, the dummy cathode 11a, and the anode 13.
本実施例による半田メッキ装置によれば、ダミー陰極
11a,11a,…に対して半田メッキが電着するため、本体部
５の４角の付近のリードに過剰に半田メッキ層が電析さ
れるのが防止される。各辺に32本のリードを有する半導
体装置を試料とし、本実施例による半田メッキ装置を用
いてリードへの半田メッキを行なうと、第３図に示す結
果が得られた。なお、第４図はダミー陰極11aを設けな
いで半田メッキを行った場合の各リードのメッキの膜厚
を示している。第４図に示すように、ダミー陰極11aを
設けない場合には各辺の端部、すなわち、本体部５の角
部付近のリードのメッキの膜厚が厚くなるのに対し、第
３図に示すように、ダミー陰極11bを設けた場合にはす
べてのリードが一様な膜厚のメッキ層が形成されるのが
わかる。According to the solder plating apparatus of this embodiment, the dummy cathode
Since the solder plating is electrodeposited on 11a, 11a, ..., Excessive deposition of the solder plating layer on the leads near the four corners of the main body 5 is prevented. When a semiconductor device having 32 leads on each side was used as a sample, and the leads were solder-plated using the solder plating apparatus according to this embodiment, the results shown in FIG. 3 were obtained. Note that FIG. 4 shows the plating film thickness of each lead when solder plating is performed without providing the dummy cathode 11a. As shown in FIG. 4, when the dummy cathode 11a is not provided, the thickness of the lead plating becomes thicker at the end of each side, that is, near the corner of the main body 5, whereas in FIG. As shown, it is understood that when the dummy cathode 11b is provided, a plating layer having a uniform film thickness is formed on all the leads.
また、本実施例によれば、陰極11からダミー陰極11a,
11a,…が突出して形成されており、陰極11と下受台12が
リードの基部を挟持して保持するため、メッキ液の状態
によらずリードとダミー陰極11a,11a,…の位置関係が安
定して保たれ、この状態によりメッキがなされるので、
簡単な作業で均一のメッキ膜厚が得られる。Further, according to the present embodiment, the cathode 11 to the dummy cathode 11a,
11a, ... are formed so as to project, and the cathode 11 and the lower pedestal 12 sandwich and hold the base of the lead. Therefore, the positional relationship between the lead and the dummy cathode 11a, 11a ,. It is kept stable and plating is performed in this state,
Uniform plating film thickness can be obtained by simple operation.
「発明の効果」 以上説明したように、この発明によれば、半導体装置
の本体部の周囲に配設された複数のリードの基部のみに
当接して、この半導体装置が載置される受け部と、前記
複数のリードに当接し、各リードの基部を前記受け部と
の間に挟持する陰極と、前記リードに対し、前記陰極と
反対側に配設される陽極と、前記陰極から突出して形成
され、前記本体部の周囲の角部近傍における前記リード
の配設されていない領域に配設される補助陰極とを具備
し、前記陰極と前記受け部がリードの基部を挟持してい
る状態で半田メッキ液中にて前記陽極と前記陰極および
前記補助陰極との間に電流を流すことにより、前記リー
ドに半田を電析させるようにしたので、各リードに一様
な膜厚の半田メッキ層を形成することができ、実装時に
おいて安定した実装強度の得られる半導体装置を製造す
ることができ、しかも、陰極から補助陰極が突出して形
成されており、陰極と受け部がリードの基部を挟持して
保持するため、メッキ液の状態によらずリードと補助陰
極の位置関係が安定して保たれ、この状態でメッキがな
されるので、簡単な作業で均一なメッキ膜厚が得られ
る。という効果が得られる。[Advantages of the Invention] As described above, according to the present invention, the receiving portion on which the semiconductor device is mounted is brought into contact with only the base portions of the plurality of leads arranged around the main body portion of the semiconductor device. A cathode that contacts the plurality of leads and sandwiches the base of each lead between the receiving portion, an anode that is arranged on the opposite side of the cathode with respect to the lead, and protrudes from the cathode. A state in which the cathode and the receiving portion sandwich the base of the lead between the cathode and the receiving portion, the auxiliary cathode being formed in a region where the lead is not provided in the vicinity of a corner around the main body. Since a current is passed between the anode and the cathode and the auxiliary cathode in the solder plating solution to deposit the solder on the leads, the solder plating with a uniform film thickness is applied to each lead. Layers can be formed and the It is possible to manufacture a semiconductor device with stable and stable mounting strength. Moreover, the auxiliary cathode is formed so as to project from the cathode, and the cathode and the receiving portion sandwich and hold the base portion of the lead. The positional relationship between the lead and the auxiliary cathode is stably maintained regardless of the state, and plating is performed in this state, so that a uniform plating film thickness can be obtained by a simple operation. The effect is obtained.
第１図はこの発明の一実施例によるリードの半田メッキ
装置の構成を示す正断面図、第２図は同装置に半導体装
置を載置した状態を示す平面図、第３図は同実施例によ
って半田メッキを行った場合の半田メッキ層の膜厚を示
す図、第４図は従来の半田メッキ層の膜厚を示す図、第
５図は従来の半田メッキ治具の構成を示す斜視図、第６
図は第５図の半田メッキ治具を用いた半田メッキを説明
する図である。 ５……本体部、６……リード、11……陰極、11a……ダ
ミー陰極（補助陰極）、13……陽極。FIG. 1 is a front sectional view showing the structure of a lead solder plating apparatus according to an embodiment of the present invention, FIG. 2 is a plan view showing a state in which a semiconductor device is mounted on the apparatus, and FIG. FIG. 4 is a diagram showing a film thickness of a solder plating layer when solder plating is performed, FIG. 4 is a diagram showing a film thickness of a conventional solder plating layer, and FIG. 5 is a perspective view showing a structure of a conventional solder plating jig. , Sixth
The figure is a view for explaining the solder plating using the solder plating jig of FIG. 5 ... Main body, 6 ... Lead, 11 ... Cathode, 11a ... Dummy cathode (auxiliary cathode), 13 ... Anode.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 前嶋 義久 静岡県浜松市中沢町10番１号 ヤマハ株式 会社内 (56)参考文献 特開 昭62−83491（ＪＰ，Ａ) 特開 平２−111898（ＪＰ，Ａ) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshihisa Maejima 10-1 Nakazawa-machi, Hamamatsu City, Shizuoka Prefecture Yamaha Stock Company (56) Reference JP 62-83491 (JP, A) JP 2-111898 (JP, A)
Claims (1)
数のリードの基部のみに当接して、この半導体装置が載
置される受け部と、 前記複数のリードに当接し、各リードの基部を前記受け
部との間に挟持する陰極と、 前記リードに対し、前記陰極と反対側に配設される陽極
と、 前記陰極から突出して形成され、前記本体部の周囲の角
部近傍における前記リードの配設されていない領域に配
設される補助陰極と を具備し、前記陰極と前記受け部がリードの基部を挟持
している状態で半田メッキ液中にて前記陽極と前記陰極
および前記補助陰極との間に電流を流すことにより、前
記リードに半田を電析させることを特徴とするリードの
半田メッキ装置。1. A semiconductor device having a plurality of leads arranged around a main body thereof, and abutting only on a base portion of the semiconductor device, the receiving portion on which the semiconductor device is mounted, and the plurality of leads. A cathode sandwiching the base portion between the receiving portion and the receiving portion; an anode disposed on the side opposite to the cathode with respect to the lead; and a corner portion around the main body portion formed to project from the cathode. An auxiliary cathode disposed in a region in which the lead is not disposed, the anode and the cathode in a solder plating solution with the cathode and the receiving portion sandwiching the base of the lead. A solder plating apparatus for a lead, wherein solder is electrodeposited on the lead by applying a current between the lead and the auxiliary cathode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2289393A JPH0821664B2 (en) | 1990-10-26 | 1990-10-26 | Lead solder plating equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2289393A JPH0821664B2 (en) | 1990-10-26 | 1990-10-26 | Lead solder plating equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04162759A JPH04162759A (en) | 1992-06-08 |
| JPH0821664B2 true JPH0821664B2 (en) | 1996-03-04 |
Family
ID=17742643
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2289393A Expired - Fee Related JPH0821664B2 (en) | 1990-10-26 | 1990-10-26 | Lead solder plating equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0821664B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7145512B2 (en) * | 2019-11-06 | 2022-10-03 | 株式会社花岡金属商会 | Treatment method for dummy material used in electrolytic copper plating method |
| JP2022179872A (en) | 2021-05-24 | 2022-12-06 | 富士電機株式会社 | semiconductor equipment |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6283491A (en) * | 1985-10-07 | 1987-04-16 | Nippon Kokan Kk <Nkk> | Method for preventing overcoat on the edge of plated object during electroplating |
| JPH02111898A (en) * | 1988-10-20 | 1990-04-24 | Mitsubishi Electric Corp | Producing device for semiconductor element |
-
1990
- 1990-10-26 JP JP2289393A patent/JPH0821664B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04162759A (en) | 1992-06-08 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |