JPH08181001A - Chip resistor for surface mounting and its surface-mounting method - Google Patents
Chip resistor for surface mounting and its surface-mounting methodInfo
- Publication number
- JPH08181001A JPH08181001A JP6325374A JP32537494A JPH08181001A JP H08181001 A JPH08181001 A JP H08181001A JP 6325374 A JP6325374 A JP 6325374A JP 32537494 A JP32537494 A JP 32537494A JP H08181001 A JPH08181001 A JP H08181001A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- support
- chip resistor
- heat dissipation
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 7
- 239000012212 insulator Substances 0.000 claims abstract description 17
- 239000011810 insulating material Substances 0.000 claims abstract description 16
- 230000017525 heat dissipation Effects 0.000 claims description 58
- 239000004020 conductor Substances 0.000 claims description 50
- 229920005989 resin Polymers 0.000 claims description 9
- 239000011347 resin Substances 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 6
- 239000010949 copper Substances 0.000 abstract description 6
- 229910000431 copper oxide Inorganic materials 0.000 abstract description 6
- 229910001925 ruthenium oxide Inorganic materials 0.000 abstract description 6
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 abstract description 6
- 238000010030 laminating Methods 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 description 23
- 239000000463 material Substances 0.000 description 9
- 238000005476 soldering Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Supply And Installment Of Electrical Components (AREA)
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は配線基板に面実装するチ
ップ抵抗器に係り、特に放熱特性とはんだ付け性の改善
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip resistor surface-mounted on a wiring board, and more particularly to improvement of heat dissipation characteristics and solderability.
【０００２】[0002]
【従来の技術】図１０、１１は、特開平２―３０９６０
２に示された従来の放熱型チップ抵抗器の構成と配線基
板への面実装例を示したものである。図１０において、
１はセラミックなどの絶縁物からなる抵抗体支持体、２
は金属、例えば銅や酸化ルテニウムなどを焼成して形成
した抵抗体、３は抵抗体２の電極、１１は抵抗体支持体
１の裏面に設けられた放熱用導体であり、これらによっ
てチップ抵抗器が構成されている。図１１において、４
は配線基板、５は配線基板４の導電用電極、６ははん
だ、１３は配線基板４の受熱用導体である。このような
チップ抵抗器は、抵抗体２の電極３を、配線基板４の導
電用電極５にはんだ６によって接続される。そして、チ
ップ抵抗器の放熱用導体１１は、配線基板上の受熱用導
体１３と接し、チップ抵抗器で発生した熱を配線基板に
伝導するよう構成されている。2. Description of the Related Art FIGS.
3 is a diagram showing a configuration of the conventional heat dissipation type chip resistor shown in FIG. 2 and an example of surface mounting on a wiring board. In FIG.
1 is a resistor support made of an insulating material such as ceramics, 2
Is a resistor formed by firing a metal, such as copper or ruthenium oxide, 3 is an electrode of the resistor 2, 11 is a heat-radiating conductor provided on the back surface of the resistor support 1, and these are chip resistors. Is configured. In FIG. 11, 4
Is a wiring board, 5 is a conductive electrode of the wiring board 4, 6 is solder, and 13 is a heat receiving conductor of the wiring board 4. In such a chip resistor, the electrode 3 of the resistor 2 is connected to the conductive electrode 5 of the wiring board 4 by the solder 6. The heat dissipation conductor 11 of the chip resistor is in contact with the heat receiving conductor 13 on the wiring board and configured to conduct the heat generated by the chip resistor to the wiring board.
【０００３】図１２は、特開平２−３９４０１に示され
ている放熱型チップ抵抗器の他の構成例で、銀パラジウ
ムなどからなる放熱用導体１１を配線基板にはんだ付け
可能に被着できる構成とすることによって放熱特性の改
善を図ったものである。FIG. 12 shows another configuration example of the heat dissipation type chip resistor disclosed in Japanese Patent Laid-Open No. 2-39401, in which a heat dissipation conductor 11 made of silver palladium or the like can be solderably attached to a wiring board. By doing so, the heat dissipation characteristics are improved.
【０００４】また図１３は、特開平３−２１５９０２に
示されているチップ抵抗器の他の構成例で、抵抗体２の
保護のため抵抗体２の上にオーバーコートガラス層１５
を備えるとともに、抵抗体支持体１の厚みを厚くし、放
熱効果を改善したものとなっている。なを、３ａは上部
電極、３ｂは側部電極である。FIG. 13 shows another configuration example of the chip resistor disclosed in Japanese Patent Laid-Open No. 3-215902, in which an overcoat glass layer 15 is provided on the resistor 2 to protect the resistor 2.
In addition, the resistor support 1 is thickened to improve the heat dissipation effect. 3a is an upper electrode and 3b is a side electrode.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、図１０
に示すような従来の放熱型チップ抵抗器は導電用電極と
放熱用導体とを配線基板の対応部に精度よく接触するよ
うに構成することは難しく、またはんだ溶融時チップ抵
抗器が浮くため、はんだ付後チップ抵抗器と配線基板と
の受熱用導体とを密着させるのは難しい。また密着した
場合でも接触部には熱抵抗があり、放熱特性の大幅な向
上は不可能である。また図１２に示すようなチップ抵抗
器の場合、放熱用導体をはんだ付けする為のはんだが導
電用電極と接触する不良（はんだブリッジ）を発生しや
すく小型化に限界があるといった問題点があった。また
図１３に示すような抵抗体を覆うオ−バ−コートガラス
層は抵抗体保護の役目は果たすが放熱にはほとんど寄与
しない。このような問題点に鑑み、本発明では高い放熱
特性を確保することにより部品の温度上昇を抑制すると
ともに、電子機器製造時のはんだ短絡不良を阻止し、ひ
いては、電子機器、部品の信頼性の向上、小型化および
高歩留まりを実現できる面実装用チップ抵抗器とその面
実装方法を提供することを目的とする。However, as shown in FIG.
It is difficult to configure the conventional heat dissipation type chip resistor as shown in Fig. 1 so that the conductive electrode and the heat dissipation conductor are brought into contact with the corresponding parts of the wiring board with high accuracy, or the chip resistor floats when melted. After soldering, it is difficult to bring the chip resistor and the heat receiving conductor of the wiring board into close contact with each other. Further, even if they are in close contact with each other, there is thermal resistance in the contact portion, and it is impossible to greatly improve the heat dissipation characteristics. Further, in the case of the chip resistor as shown in FIG. 12, there is a problem that the solder for soldering the heat dissipation conductor is liable to cause a defect (solder bridge) in contact with the conductive electrode, and there is a limit to downsizing. It was Further, the overcoat glass layer covering the resistor as shown in FIG. 13 plays a role of protecting the resistor but hardly contributes to heat dissipation. In view of such a problem, in the present invention, while suppressing the temperature rise of the component by ensuring a high heat dissipation characteristics, prevent solder short circuit failure during electronic device manufacturing, by extension, the reliability of the electronic device, components It is an object of the present invention to provide a surface-mounting chip resistor and a surface-mounting method thereof, which can realize improvement, miniaturization, and high yield.
【０００６】[0006]
【課題を解決するための手段】本発明のチップ抵抗器
は、抵抗体を絶縁物からなる抵抗体支持体中に埋設し、
抵抗体支持体の両側部に抵抗体の電極を備えたものであ
る。In a chip resistor of the present invention, a resistor is embedded in a resistor support made of an insulator,
The resistor electrodes are provided on both sides of the resistor support.
【０００７】また、本発明のチップ抵抗器は、抵抗体お
よびこの抵抗体の電極を絶縁物からなる抵抗体支持体の
上面に形成、支持するとともに、前記抵抗体支持体の下
面には、この下面のほぼ全面に渡って放熱用導体を形成
したものである。In the chip resistor of the present invention, the resistor and the electrode of the resistor are formed and supported on the upper surface of the resistor support made of an insulating material, and the lower surface of the resistor support is provided with The heat dissipation conductor is formed over almost the entire lower surface.
【０００８】また、本発明のチップ抵抗器は、抵抗体お
よびこの抵抗体の電極を保持する絶縁物からなる抵抗体
支持体の下面に、放熱用導体が形成された面実装用チッ
プ抵抗器において、前記放熱用導体に同一高さの凸部を
複数設けたものである。The chip resistor of the present invention is a surface-mounting chip resistor in which a heat dissipation conductor is formed on the lower surface of a resistor support made of a resistor and an insulator holding the electrode of the resistor. The heat radiation conductor is provided with a plurality of protrusions having the same height.
【０００９】また、本発明のチップ抵抗器は、抵抗体お
よびこの抵抗体の電極を保持する絶縁物からなる抵抗体
支持体の下面には、放熱用導体が形成され、前記抵抗体
支持体の側面には、前記抵抗体の電極が形成された面実
装用チップ抵抗器において、前記抵抗体支持体の下面で
電極と放熱用導体との間に絶縁物からなる凸部を形成し
たものである。Further, in the chip resistor of the present invention, a heat dissipation conductor is formed on the lower surface of the resistor support body composed of the resistor body and the insulator holding the electrode of the resistor body. On a side surface, in a surface mounting chip resistor having electrodes of the resistor formed thereon, a convex portion made of an insulator is formed between the electrode and the heat dissipation conductor on the lower surface of the resistor support. .
【００１０】また、本発明のチップ抵抗器の面実装方法
は、抵抗体を保持し、この抵抗体の電極を両側部に配
置、保持する絶縁物からなる抵抗体支持体で構成される
面実装用チップ抵抗器を配線基盤に面実装する際におい
て、前記抵抗体支持体と配線基板との間に熱伝導用樹脂
を充填するものである。Further, the surface mounting method of the chip resistor according to the present invention is such that the resistor is held and the electrodes of the resistor are arranged on both sides of the resistor, and the surface mounting is made of a resistor support made of an insulating material. When the chip resistor for use is surface-mounted on the wiring board, a resin for heat conduction is filled between the resistor support and the wiring board.
【００１１】[0011]
【作用】第１の発明において、抵抗体を絶縁物からなる
抵抗体支持体中に埋設したので、抵抗体の発熱を抵抗体
支持体の全面から放熱する。また、抵抗体支持体の両側
部に抵抗体の電極を配置（放熱用導体を設けることな
く）したので電極間のはんだブリッジが生じない。In the first aspect of the invention, since the resistor is embedded in the resistor support made of an insulator, the heat generated by the resistor is radiated from the entire surface of the resistor support. Further, since the electrodes of the resistor are arranged on both sides of the resistor support (without providing the heat dissipation conductor), a solder bridge between the electrodes does not occur.
【００１２】第２の発明において、抵抗体の電極を抵抗
体支持体の上面に形成、支持するとともに抵抗体支持体
の下面には、この下面のほぼ全面に渡って放熱用導体を
形成できるので、はんだブリッジの不良を伴うことな
く、放熱用導体の面積を大きくできる。In the second aspect of the invention, since the electrode of the resistor is formed and supported on the upper surface of the resistor support, the heat dissipation conductor can be formed on the lower surface of the resistor support over substantially the entire lower surface. The area of the heat dissipation conductor can be increased without causing defects in the solder bridge.
【００１３】第３の発明において、放熱用導体に設けた
同一高さの凸部は、はんだ付けに際しチップ抵抗器の傾
斜を防止する。In the third invention, the protrusions having the same height provided on the heat dissipation conductor prevent the chip resistor from tilting during soldering.
【００１４】第４の発明において、電極と放熱用導体と
の間に形成した凸部は両者間のはんだブリッジを阻止す
るとともにチップ抵抗器の傾斜を防止する。In the fourth aspect of the present invention, the convex portion formed between the electrode and the heat dissipation conductor prevents the solder bridge between them and prevents the chip resistor from tilting.
【００１５】第５の発明において、チップ抵抗器を配線
基板に面実装する際に、抵抗体支持体と配線基板との間
に充填した絶縁性樹脂がチップ抵抗器と配線基板とに密
着し、チップ抵抗器で発生した熱を配線基板に効率よく
伝導する。In the fifth invention, when the chip resistor is surface-mounted on the wiring board, the insulating resin filled between the resistor support and the wiring board adheres to the chip resistor and the wiring board, The heat generated by the chip resistor is efficiently conducted to the wiring board.
【００１６】[0016]
【実施例】以下に、実施例１乃至５を、図１乃至図１１
を用いて詳述する。なお、図において、従来例と同一符
号は同一または相当部分を示した。 〈実施例１〉図１は本発明の実施例１のチップ抵抗器の
断面図である。本実施例において、銅や酸化ルテニウム
などからなる抵抗体２は、セラミックなど絶縁材料から
なる抵抗体支持体１によって上下部からサンドイッチさ
れるように覆われるとともに、その両サイドには抵抗体
２の電極３が上部抵抗体支持体１にくいこんで配置され
た状態で、チップ抵抗器が構成されている。このような
チップ抵抗器は、絶縁材料からなる下部の抵抗体支持体
１上に抵抗ペーストを印刷焼成して抵抗体２を形成した
ものに上部の抵抗体支持体１となる絶縁材料を積層させ
るとともに、電極３を配置して製造する。このような技
術は一般に積層セラミックコンデンサの生産などに使用
されている。抵抗体２の上下部に配設された抵抗体支持
体１である絶縁材料を同一材料とすることによって、抵
抗体２の発熱によりチップ抵抗器に生じる熱応力やそり
の発生を低減することができ、信頼性が大きく向上す
る。また、材料費および加工費などを含めた製造コスト
は比較的低く抑えることが可能である。EXAMPLES Examples 1 to 5 will be described below with reference to FIGS.
Will be described in detail. In the drawings, the same reference numerals as those in the conventional example indicate the same or corresponding portions. <First Embodiment> FIG. 1 is a sectional view of a chip resistor according to a first embodiment of the present invention. In this embodiment, the resistor 2 made of copper or ruthenium oxide is covered by the resistor support 1 made of an insulating material such as ceramic so as to be sandwiched from above and below, and both sides of the resistor 2 are covered with the resistor 2. The chip resistor is formed in a state where the electrode 3 is arranged so as to be difficult to fit in the upper resistor support 1. In such a chip resistor, a resistor paste is printed and fired on a lower resistor support body 1 made of an insulating material to form a resistor 2, and an insulating material to be the upper resistor support body 1 is laminated. At the same time, the electrode 3 is arranged and manufactured. Such a technique is generally used for producing a monolithic ceramic capacitor. By using the same insulating material for the resistor support 1 disposed above and below the resistor 2, it is possible to reduce the generation of thermal stress and warpage that occur in the chip resistor due to the heat generated by the resistor 2. It is possible and reliability is greatly improved. In addition, manufacturing costs including material costs and processing costs can be kept relatively low.
【００１７】図２は、上述の方法で製造したチップ抵抗
器を配線基板４上に面実装した例を示すもので、電極３
が互いに短絡しないようにしながら電極３を配線基板４
の導電用電極５にはんだ６を用いて接続したものであ
る。このような形状の場合、抵抗体２からの発熱は配線
基板との接続部を通って、配線基板に放熱されるのみで
なく、抵抗体の発熱をチップ抵抗器の表面全体を通して
空気中に放熱するため、通常のチップ抵抗器よりも放熱
特性が向上する。また、抵抗体を絶縁体で覆った構造で
あり、しかもこの絶縁体をセラミックなどの材料によっ
て構成すれば機械強度も確保することができるため、図
３に示すようにアルミニウムなどの材料から成る放熱フ
ィン７を、抵抗体支持体１に直に取り付ける構造とする
ことができるため、チップ抵抗器の発熱の大きさに応じ
て放熱特性の適応的設計が極めて容易である。FIG. 2 shows an example in which the chip resistor manufactured by the above-mentioned method is surface-mounted on the wiring board 4, and the electrode 3
The electrode 3 and the wiring board 4 so that they do not short-circuit with each other.
The conductive electrode 5 is connected by using solder 6. In the case of such a shape, the heat generated from the resistor 2 is not only radiated to the wiring substrate through the connecting portion with the wiring substrate, but also the heat generated by the resistor is radiated to the air through the entire surface of the chip resistor. Therefore, the heat dissipation characteristics are improved as compared with a normal chip resistor. Further, since the resistor is covered with an insulator, and the insulator is made of a material such as ceramic, mechanical strength can be ensured. Therefore, as shown in FIG. Since the fins 7 can be directly attached to the resistor support 1, it is extremely easy to adaptively design the heat radiation characteristics according to the amount of heat generated by the chip resistor.
【００１８】〈実施例２〉図４は、２番目の実施例であ
るチップ抵抗器の側面図である。本実施例におけるチッ
プ抵抗器は、セラミックなど絶縁材料からなる抵抗体支
持体１の上面に、銅や酸化ルテニウムなどからなる抵抗
体２と、この抵抗体２の両側に電極３を配置し、抵抗体
支持体１の裏面には、チップ抵抗器を配線基板４にはん
だ付けするとともに、チップ抵抗器で発生した熱を配線
基板４側に伝導する放熱用導体を配置して構成したもの
である。このチップ抵抗器は、電極３を抵抗体支持体１
の上面に配置したため、抵抗体支持体１の裏面全体を放
熱用導体１１として使用することが可能となっている。
従って、チップ抵抗器からの発熱はこの放熱用導体１１
から配線基板４側へ大量に伝導され、放熱特性は大きく
向上する。また、この放熱用導体１１のはんだ付性が悪
くはんだ接合部に空孔などの欠陥を生じた場合、放熱特
性のみならず長期信頼性も低下するので、はんだ性を改
善する為に、例えば、厚さ２μｍのニッケルめっきの上
に厚さ５０μｍ程度のはんだを被覆したものなどを用い
て、良好なはんだ性を確保するよう構成することが望ま
しい。<Embodiment 2> FIG. 4 is a side view of a chip resistor according to a second embodiment. In the chip resistor of this embodiment, a resistor 2 made of copper or ruthenium oxide, and electrodes 3 on both sides of the resistor 2 are arranged on the upper surface of a resistor support 1 made of an insulating material such as ceramics. On the back surface of the body support 1, a chip resistor is soldered to the wiring board 4, and a heat dissipation conductor that conducts heat generated by the chip resistor to the wiring board 4 side is arranged. In this chip resistor, the electrode 3 is connected to the resistor support 1
Since it is arranged on the upper surface of the above, it is possible to use the entire back surface of the resistor support 1 as the heat dissipation conductor 11.
Therefore, the heat generated from the chip resistor is generated by the heat dissipation conductor 11
A large amount is conducted to the wiring board 4 side, and the heat dissipation characteristics are greatly improved. In addition, when the solderability of the heat dissipation conductor 11 is poor and a defect such as a hole is generated in the solder joint, not only the heat dissipation property but also the long-term reliability is deteriorated. It is desirable to use a nickel plating having a thickness of 2 μm and a solder having a thickness of about 50 μm coated thereon to ensure good solderability.
【００１９】図５は、上記のチップ抵抗器を配線基板４
に実装した一例を示したもので、配線基板４に設けたチ
ップ抵抗器の固定とチップ抵抗器からの熱を受熱する受
熱用導体１３と、チップ抵抗器の裏面に配置した放熱用
導体１１とをはんだ付けし、抵抗体支持体１の上面の電
極３と配線基板４上の導体５との接続をボンディングワ
イヤ９（またはビームリードなど）により行ったもので
ある。ボンディングワイヤ９の材質の例としては、通電
電流がおよそ１００ｍＡを超えるような場合には線径３
００μｍ前後のアルミニウムワイヤを、通電電流がおよ
そ１００ｍＡ以下の場合は線径２５〜５０μｍの金ワイ
ヤなどを使用する。チップ抵抗器の電極３の材質は、ニ
ッケルまたはアルミニウムを用いるが、ボンディングワ
イヤ９との良好な接続性を確保するため、さらに金など
により保護膜を形成する場合もある。FIG. 5 shows the above-mentioned chip resistor as a wiring board 4.
In the example shown in FIG. 1, the chip resistor provided on the wiring board 4 is fixed and the heat receiving conductor 13 for receiving heat from the chip resistor, and the heat radiating conductor 11 arranged on the back surface of the chip resistor. Is soldered, and the electrode 3 on the upper surface of the resistor support 1 and the conductor 5 on the wiring board 4 are connected by a bonding wire 9 (or a beam lead or the like). An example of the material of the bonding wire 9 is a wire diameter of 3 when the energizing current exceeds about 100 mA.
An aluminum wire of about 00 μm is used, and a gold wire having a wire diameter of 25 to 50 μm is used when the energizing current is about 100 mA or less. Nickel or aluminum is used as the material of the electrode 3 of the chip resistor, but in order to ensure good connectivity with the bonding wire 9, a protective film may be further formed with gold or the like.
【００２０】〈実施例３〉実施例２に示したチップ抵抗
器のように、放熱用導体１１の面積が抵抗体支持体下面
の投影面積に近い大きさ（面積比およそ７０％以上）の
場合、はんだ付時チップ抵抗器が配線基板に対し、傾斜
して接合される場合が発生する。このような場合放熱が
均一に行われなくなるために抵抗体の抵抗率が部位によ
って不均一になること、はんだ接合部のなかの特定の点
に熱履歴時の応力が集中することなど信頼性に悪影響を
与える場合がある。<Embodiment 3> When the area of the heat dissipation conductor 11 is close to the projected area of the lower surface of the resistor support (about 70% or more of the area ratio) like the chip resistor shown in Embodiment 2 When soldering, the chip resistor may be inclined and joined to the wiring board. In such a case, the heat dissipation is not performed uniformly, so that the resistivity of the resistor becomes uneven depending on the part, and stress during heat history is concentrated at a specific point in the solder joint, which reduces reliability. May have adverse effects.
【００２１】第３の実施例は、上記不都合を解消するた
め、第２の実施例のチップ抵抗器の放熱用導体１１に位
置出し用の凸形状部１０を複数ケ所設けたものである。
図６はこの第３の実施例であるチップ抵抗器を配線基板
４に実装した一例の側面図である。この図に示す如く、
位置出し用の凸形状部１０が受熱用導体１３に接し、は
んだ付時のチップ抵抗器の傾斜を防止することが可能に
なる。また、この凸形状部１０をはんだよりも熱伝導率
の高い材料によって構成すれば放熱特性向上にも寄与す
る。In the third embodiment, in order to solve the above-mentioned inconvenience, a plurality of positioning convex portions 10 are provided on the heat dissipation conductor 11 of the chip resistor of the second embodiment.
FIG. 6 is a side view of an example in which the chip resistor according to the third embodiment is mounted on the wiring board 4. As shown in this figure,
The convex portion 10 for positioning is in contact with the heat receiving conductor 13, and it becomes possible to prevent the chip resistor from tilting during soldering. Further, if the convex portion 10 is made of a material having a higher thermal conductivity than solder, it also contributes to the improvement of heat dissipation characteristics.
【００２２】〈実施例４〉図７は第４の実施例であるチ
ップ抵抗器の側面図である。本実施例におけるチップ抵
抗器は、セラミックなど絶縁材料からなる抵抗体支持体
１の上面に、銅や酸化ルテニウムなどからなる抵抗体２
を載置し、抵抗体支持体１の両側部に電極３を配置し、
抵抗体支持体１の下面にチップ抵抗器の放熱用導体１１
を備えるとともに、抵抗体支持体１の下面で、放熱用導
体１１と電極３との間に両者のはんだブリッジ防止用の
凸形状部１２を構成したものである。この凸形状の凸部
の高さは、電極３および放熱用導体１１の厚さ分よりも
高く設定されていて、実装したとき凸形状部１２の先端
が配線基板４に接するか、やや隙間を有する程度の高さ
である。<Fourth Embodiment> FIG. 7 is a side view of a chip resistor according to a fourth embodiment. The chip resistor according to the present embodiment has a resistor support 2 made of an insulating material such as ceramic, and a resistor 2 made of copper or ruthenium oxide on the upper surface of the resistor support 1.
And place the electrodes 3 on both sides of the resistor support 1,
The lower surface of the resistor support 1 is provided with a heat dissipation conductor 11 for a chip resistor.
And a convex portion 12 for preventing solder bridges between the heat dissipation conductor 11 and the electrode 3 is provided on the lower surface of the resistor support 1. The height of the convex portion of this convex shape is set to be higher than the thickness of the electrode 3 and the heat dissipation conductor 11, and when mounted, the tip of the convex portion 12 contacts the wiring board 4 or a slight gap is left. It is high enough to have.
【００２３】図８は、本実施例のチップ抵抗器を配線基
板４に実装した一例を示すもので、両者のはんだ付けに
より、凸形状部１２の先端と配線基板４との間に若干の
隙間が形成されているが、はんだブリッジの防止機能を
十分はたしている。また、凸形状部１２と配線基板４と
の隙間が略零となるように設定した場合には、チップ抵
抗器の傾き防止にもなる。このように本実施例において
は、チップ抵抗器からの発熱は放熱用導体１１からはん
だ６を通って配線基板上の受熱用導体１３へと伝わると
ともに、電極３と放熱用導体１１が近接していたとして
も、両者間に存在する凸形状部１１により、両者間には
んだブリッジを発生することなくチップ抵抗器を配線基
板上にはんだ付することができる。FIG. 8 shows an example in which the chip resistor of this embodiment is mounted on the wiring board 4. By soldering both of them, a slight gap is formed between the tip of the convex portion 12 and the wiring board 4. Although it is formed, it sufficiently fulfills the function of preventing the solder bridge. Further, when the gap between the convex portion 12 and the wiring board 4 is set to be substantially zero, the chip resistor can be prevented from tilting. As described above, in the present embodiment, the heat generated from the chip resistor is transmitted from the heat dissipation conductor 11 through the solder 6 to the heat reception conductor 13 on the wiring board, and the electrode 3 and the heat dissipation conductor 11 are close to each other. Even if it does, the chip-shaped resistor can be soldered on the wiring board without generating a solder bridge between the two due to the convex portion 11 existing between the two.
【００２４】〈実施例５〉図９は、第５の実施例である
チップ抵抗器を配線基板上に実装した様子を示す側面図
である。本実施例におけるチップ抵抗器は、セラミック
など絶縁材料からなる抵抗体支持体１の上面に、銅や酸
化ルテニウムなどの抵抗体２を載置し、この抵抗体支持
体１の両側面に電極３を配置した構造で、このチップ抵
抗器を配線基板上に実装するに際し、抵抗体支持体１の
下面（または、配線基板上）に絶縁性樹脂材料１４を塗
布し、配線基板上にセットした後はんだ付けの工程に流
してはんだ付けするものである。絶縁性樹脂材料１４
は、２個の電極部３のはんだ同士が接触することによる
短絡を防止することと、チップ抵抗器から配線基板への
放熱性を向上させる効果を持つ。従って絶縁性樹脂材料
１４はエポキシ樹脂などで構成可能であるが、放熱性向
上のためには必要に応じて無機充填材の比率を適宣高く
すると良い。<Embodiment 5> FIG. 9 is a side view showing a state in which the chip resistor of the fifth embodiment is mounted on a wiring board. In the chip resistor according to this embodiment, a resistor 2 made of copper or ruthenium oxide is placed on the upper surface of a resistor support 1 made of an insulating material such as ceramic, and electrodes 3 are provided on both sides of the resistor support 1. After mounting the chip resistor on the wiring board, the insulating resin material 14 is applied to the lower surface of the resistor support 1 (or on the wiring board) and set on the wiring board. It is to be soldered in the step of soldering. Insulating resin material 14
Has the effect of preventing a short circuit due to the contact between the solders of the two electrode parts 3 and improving the heat dissipation from the chip resistor to the wiring board. Therefore, the insulating resin material 14 can be made of epoxy resin or the like, but it is preferable to appropriately increase the ratio of the inorganic filler to improve heat dissipation.
【００２５】以上述べてきたような放熱特性に優れたチ
ップ抵抗器は、配線基板として通常使用されるガラスエ
ポキシ基板や紙フェノール基板よりも熱抵抗が低い、例
えば、金属基板などの配線基板に搭載された場合に、よ
り効果的なものであることはいうまでもない。The chip resistor having excellent heat dissipation characteristics as described above is mounted on a wiring board such as a metal board having a lower thermal resistance than that of a glass epoxy board or a paper phenol board usually used as a wiring board. Needless to say, it is more effective if it is done.
【００２６】[0026]
【発明の効果】以上のように本発明によるチップ抵抗器
は、抵抗体を、絶縁物からなる抵抗体支持体中に埋設
し、前記抵抗体支持体の両側部に前記抵抗体の電極を備
えた構成としたことにより、抵抗体の発熱を抵抗体支持
体の全面から放熱し、部品の温度上昇を抑制するととも
に、電極間のはんだブリッジなどの加工不良が減少する
ので、これを組み込んだ電子機器の信頼性の向上と、製
造コストの低減を図ることができるという効果を奏す
る。As described above, in the chip resistor according to the present invention, the resistor is embedded in the resistor support made of an insulating material, and the electrodes of the resistor are provided on both sides of the resistor support. With this configuration, the heat generated by the resistor is radiated from the entire surface of the resistor support, the temperature rise of the parts is suppressed, and processing defects such as solder bridges between electrodes are reduced. It is possible to improve the reliability of the device and reduce the manufacturing cost.
【００２７】また、抵抗体およびこの抵抗体の電極を、
絶縁物からなる抵抗体支持体の上面に形成、支持すると
ともに、前記抵抗体支持体の下面には、この下面のほぼ
全面に渡って放熱用導体を形成したことにより、放熱用
導体と電極との間でのはんだブリッジなどの加工不良を
伴うことなく、放熱用導体の放熱面積を大きくし部品の
温度上昇を抑制することができるので、これを組み込ん
だ電子機器の信頼性の向上と、製造コストの低減ができ
るという効果を奏する。In addition, the resistor and the electrode of this resistor are
The resistor support made of an insulator is formed and supported on the upper surface of the resistor support, and the lower surface of the resistor support is formed with a heat dissipation conductor over substantially the entire lower surface, so that a heat dissipation conductor and an electrode are formed. Since the heat dissipation area of the heat dissipation conductor can be increased and the temperature rise of parts can be suppressed without causing processing defects such as solder bridges between the two, it is possible to improve the reliability of electronic equipment incorporating this and to manufacture it. This has the effect of reducing costs.
【００２８】また、抵抗体およびこの抵抗体の電極を保
持する絶縁物からなる抵抗体支持体の下面に、放熱用導
体が形成された面実装用チップ抵抗器において、前記放
熱用導体に同一高さの凸部を複数設けたことことによ
り、はんだ付けに際しチップ抵抗器の傾斜を防止できる
ことから均一な放熱特性を得ることができるので、これ
を組み込んだ電子機器の信頼性が向上するいう効果を奏
する。Further, in a surface mounting chip resistor in which a heat dissipation conductor is formed on the lower surface of a resistor support made of a resistor and an insulator for holding the electrode of this resistor, the same height as that of the heat dissipation conductor is provided. By providing a plurality of convex portions, the chip resistor can be prevented from tilting during soldering, and uniform heat dissipation characteristics can be obtained.Therefore, the effect that the reliability of electronic equipment incorporating this is improved Play.
【００２９】また、抵抗体およびこの抵抗体の電極を保
持する絶縁物からなる抵抗体支持体の下面には、放熱用
導体が形成され、前記抵抗体支持体の側面には、前記抵
抗体の電極が形成された面実装用チップ抵抗器におい
て、前記抵抗体支持体の下面で電極と放熱用導体との間
に絶縁物からなる凸部を形成したことにより、電極と放
熱用導体との両者間のはんだブリッジを阻止するととも
に、チップ抵抗器の傾斜を防止できることから均一な放
熱特性を得るすることができるので、これを組み込んだ
電子機器の信頼性の向上と、製造コストの低減ができる
という効果を奏する。Further, a heat dissipation conductor is formed on the lower surface of the resistor support made of a resistor and an insulator holding the electrode of the resistor, and a side face of the resistor support is provided with a conductor for the resistor. In a surface-mounting chip resistor having an electrode formed thereon, a convex portion made of an insulator is formed between the electrode and the heat dissipation conductor on the lower surface of the resistor support, so that both the electrode and the heat dissipation conductor are formed. In addition to preventing the solder bridge between them, the chip resistor can be prevented from tilting, so that uniform heat dissipation characteristics can be obtained, so the reliability of electronic devices incorporating this can be improved and the manufacturing cost can be reduced. Produce an effect.
【００３０】更にまた、本発明のチップ抵抗器の面実装
方法においては、抵抗体を支持し、この抵抗体の電極を
両側部に配置、保持する絶縁物からなる抵抗体支持体で
構成される面実装用チップ抵抗器を、配線基板に面実装
する際において、前記抵抗体支持体と配線基板との間に
絶縁性樹脂を充填するようにしたことにより、抵抗体支
持体と配線基板とが絶縁性樹脂を介して密着し、チップ
抵抗器で発生した熱を配線基板に効率よく伝導し、チッ
プ抵抗器の温度上昇を抑制するとともに、電極間のはん
だ短絡不良を阻止できるので、これを組み込んだ電子機
器の信頼性の向上と、製造コストの低減ができるという
効果を奏する。Furthermore, in the surface mounting method of the chip resistor of the present invention, the resistor support is made of an insulator that supports the resistor and arranges and holds the electrodes of the resistor on both sides. When the surface-mounting chip resistor is surface-mounted on the wiring board, by filling the insulating resin between the resistor support and the wiring board, the resistor support and the wiring board are separated from each other. Since it adheres through the insulating resin and efficiently conducts the heat generated by the chip resistor to the wiring board, suppresses the temperature rise of the chip resistor and prevents solder short circuit between electrodes, it is incorporated. In addition, the reliability of electronic devices can be improved and the manufacturing cost can be reduced.
【図１】本発明の実施例１のチップ抵抗器を示す側面断
面図である。FIG. 1 is a side sectional view showing a chip resistor according to a first embodiment of the present invention.
【図２】本発明の実施例１のチップ抵抗器を配線基板上
にはんだ付した様子を示す側面断面図である。FIG. 2 is a side sectional view showing a state in which the chip resistor of Example 1 of the present invention is soldered onto a wiring board.
【図３】本発明の実施例１のチップ抵抗器に放熱フィン
をとりつけたものを、配線基板上にはんだ付した様子を
示す側面断面図である。FIG. 3 is a side cross-sectional view showing a state in which a chip resistor of Example 1 of the present invention to which a radiation fin is attached is soldered onto a wiring board.
【図４】本発明の実施例２のチップ抵抗器を示す側面断
面図である。FIG. 4 is a side sectional view showing a chip resistor according to a second embodiment of the present invention.
【図５】本発明の実施例２のチップ抵抗器を配線基板上
に実装した様子を示す側面断面図である。FIG. 5 is a side sectional view showing a state in which the chip resistor of Example 2 of the present invention is mounted on a wiring board.
【図６】本発明の実施例３のチップ抵抗器を配線基板上
にはんだ付した様子を示す側面断面図である。FIG. 6 is a side sectional view showing a state in which the chip resistor of Example 3 of the present invention is soldered onto a wiring board.
【図７】本発明の実施例４のチップ抵抗器を示す側面断
面図である。FIG. 7 is a side sectional view showing a chip resistor according to a fourth embodiment of the present invention.
【図８】本発明の実施例４のチップ抵抗器を配線基板上
にはんだ付した様子を示す側面断面図である。FIG. 8 is a side sectional view showing a state in which the chip resistor of Example 4 of the present invention is soldered onto a wiring board.
【図９】本発明の実施例５のチップ抵抗器を配線基板上
にはんだ付した様子を示す側面断面図である。FIG. 9 is a side sectional view showing a state in which a chip resistor of Example 5 of the present invention is soldered on a wiring board.
【図１０】従来の放熱型チップ抵抗器の一実施例を示す
側面図である。FIG. 10 is a side view showing an example of a conventional heat dissipation type chip resistor.
【図１１】従来の放熱型チップ抵抗器を配線基板上に実
装した様子を示す側面断面図である。FIG. 11 is a side sectional view showing a state in which a conventional heat radiation type chip resistor is mounted on a wiring board.
【図１２】従来の放熱型チップ抵抗器の別の一実施例を
示す構成図である。FIG. 12 is a configuration diagram showing another embodiment of a conventional heat dissipation type chip resistor.
【図１３】従来のチップ抵抗器の別の実施例を示す側面
断面図である。FIG. 13 is a side sectional view showing another embodiment of the conventional chip resistor.
１ 抵抗体支持体 ２ 抵抗体 ３ （チップ抵抗器の）電極 ４ 配線基板 ５ （配線基板の）導電用電極 ６ はんだ ７ 放熱フィン ９ ボンディングワイヤ １０ 凸形状部 １１ （チップ抵抗器の）放熱用導体 １２ 凸形状部 １３ （配線基板の）受熱用導体 １４ 絶縁性樹脂材料 １５ オーバーコートガラス層 1 Resistor Support 2 Resistor 3 Electrode (for Chip Resistor) 4 Wiring Board 5 Conductive Electrode (for Wiring Board) 6 Solder 7 Radiating Fin 9 Bonding Wire 10 Convex Shaped Part 11 (For Chip Resistor) Radiating Conductor 12 Convex Shaped Part 13 Heat-Receiving Conductor (of Wiring Board) 14 Insulating Resin Material 15 Overcoat Glass Layer
Claims (5)
に埋設し、前記抵抗体支持体の両側部に前記抵抗体の電
極を備えたことを特徴とする面実装用チップ抵抗器。1. A surface-mount chip resistor, wherein a resistor is embedded in a resistor support made of an insulator, and electrodes of the resistor are provided on both sides of the resistor support.
らなる抵抗体支持体の上面に形成、支持するとともに、
前記抵抗体支持体の下面にはこの下面のほぼ全面に渡っ
て放熱用導体を形成したことを特徴とする面実装用チッ
プ抵抗器。2. A resistor and an electrode of the resistor are formed and supported on the upper surface of a resistor support made of an insulating material, and
A surface mounting chip resistor characterized in that a heat dissipation conductor is formed on substantially the entire lower surface of the resistor support.
絶縁物からなる抵抗体支持体の下面に放熱用導体が形成
された面実装用チップ抵抗器において、 前記放熱用導体に同一高さの凸部を複数設けたことを特
徴とする面実装用チップ抵抗器。3. A surface mount chip resistor having a heat dissipation conductor formed on the lower surface of a resistor support made of an insulator that holds a resistor and an electrode of the resistance, the heat dissipation conductor having the same height. A surface-mount chip resistor having a plurality of convex protrusions.
絶縁物からなる抵抗体支持体の下面には放熱用導体が形
成され、前記抵抗体支持体の側面には前記抵抗体の電極
が形成された面実装用チップ抵抗器において、 前記抵抗体支持体の下面で、電極と放熱用導体との間に
絶縁物からなる凸部を形成したことを特徴とする面実装
用のチップ抵抗器。4. A heat dissipating conductor is formed on a lower surface of a resistor support made of an insulator that holds a resistor and an electrode of the resistor, and an electrode of the resistor is formed on a side surface of the resistor support. In a surface-mounting chip resistor formed with, a surface-mounting chip resistor characterized in that a convex portion made of an insulator is formed between an electrode and a heat dissipation conductor on the lower surface of the resistor support. vessel.
側部に配置、保持する絶縁物からなる抵抗体支持体で構
成される面実装用チップ抵抗器を配線基板に面実装する
際において、 前記抵抗体支持体と配線基板との間に絶縁性樹脂を充填
することを特徴とするチップ抵抗器の面実装方法。5. A surface mounting chip resistor constituted by a resistor support made of an insulating material for holding a resistor and arranging and holding electrodes of the resistor on both sides thereof is surface-mounted on a wiring board. 3. The surface mounting method for a chip resistor, comprising: filling an insulating resin between the resistor support and the wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6325374A JPH08181001A (en) | 1994-12-27 | 1994-12-27 | Chip resistor for surface mounting and its surface-mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6325374A JPH08181001A (en) | 1994-12-27 | 1994-12-27 | Chip resistor for surface mounting and its surface-mounting method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08181001A true JPH08181001A (en) | 1996-07-12 |
Family
ID=18176127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6325374A Pending JPH08181001A (en) | 1994-12-27 | 1994-12-27 | Chip resistor for surface mounting and its surface-mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08181001A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009005108A1 (en) * | 2007-06-29 | 2009-01-08 | Koa Corporation | Resistor |
| JP2016503237A (en) * | 2012-12-21 | 2016-02-01 | ヴィシェイ デイル エレクトロニクス, インコーポレイテッドVishay Dale Electronics, Inc. | Power resistor with integrated heat spreader |
| JP2018050017A (en) * | 2016-09-23 | 2018-03-29 | Koa株式会社 | Chip resistor |
-
1994
- 1994-12-27 JP JP6325374A patent/JPH08181001A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009005108A1 (en) * | 2007-06-29 | 2009-01-08 | Koa Corporation | Resistor |
| US8149082B2 (en) | 2007-06-29 | 2012-04-03 | Koa Corporation | Resistor device |
| JP5320612B2 (en) * | 2007-06-29 | 2013-10-23 | コーア株式会社 | Resistor |
| JP2016503237A (en) * | 2012-12-21 | 2016-02-01 | ヴィシェイ デイル エレクトロニクス, インコーポレイテッドVishay Dale Electronics, Inc. | Power resistor with integrated heat spreader |
| JP2018050017A (en) * | 2016-09-23 | 2018-03-29 | Koa株式会社 | Chip resistor |
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