[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JP6890520B2 - 電力用半導体装置 - Google Patents

電力用半導体装置 Download PDF

Info

Publication number
JP6890520B2
JP6890520B2 JP2017194118A JP2017194118A JP6890520B2 JP 6890520 B2 JP6890520 B2 JP 6890520B2 JP 2017194118 A JP2017194118 A JP 2017194118A JP 2017194118 A JP2017194118 A JP 2017194118A JP 6890520 B2 JP6890520 B2 JP 6890520B2
Authority
JP
Japan
Prior art keywords
bonding layer
resin
semiconductor device
power semiconductor
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017194118A
Other languages
English (en)
Other versions
JP2019067986A (ja
Inventor
翔 熊田
翔 熊田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2017194118A priority Critical patent/JP6890520B2/ja
Priority to US16/029,760 priority patent/US10468368B2/en
Priority to DE102018213859.1A priority patent/DE102018213859A1/de
Priority to CN201811152150.9A priority patent/CN109616460B/zh
Publication of JP2019067986A publication Critical patent/JP2019067986A/ja
Application granted granted Critical
Publication of JP6890520B2 publication Critical patent/JP6890520B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/16Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating with interposition of special material to facilitate connection of the parts, e.g. material for absorbing or producing gas
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/40Semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/273Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/2732Screen printing, i.e. using a stencil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29006Layer connector larger than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29007Layer connector smaller than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29012Shape in top view
    • H01L2224/29013Shape in top view being rectangular or square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/29076Plural core members being mutually engaged together, e.g. through inserts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/29078Plural core members being disposed next to each other, e.g. side-to-side arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/292Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29239Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/292Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29244Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/292Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29247Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/292Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29255Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/29294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
    • H01L2224/32058Shape in side view being non uniform along the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325Material
    • H01L2224/32505Material outside the bonding interface, e.g. in the bulk of the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009Pre-treatment of the layer connector or the bonding area
    • H01L2224/83048Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83095Temperature settings
    • H01L2224/83096Transient conditions
    • H01L2224/83097Heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909Post-treatment of the layer connector or bonding area
    • H01L2224/83951Forming additional members, e.g. for reinforcing, fillet sealant
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10254Diamond [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1027IV
    • H01L2924/10272Silicon Carbide [SiC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/1033Gallium nitride [GaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Powder Metallurgy (AREA)

Description

本発明は、半導体素子が配線部材に接合される電力用半導体装置に関する。
半導体装置の中でも電力用半導体装置は、産業用機器から家電及び情報端末まで幅広い機器の主電力(パワー)の制御に用いられ、とくに輸送機器等においては高い信頼性が求められている。一方で、従来のシリコン(Si)からなる半導体素子に代えて、炭化珪素(SiC)等のワイドバンドギャップ半導体からなる半導体素子を備えた電力用半導体装置の開発が進められており、電力用半導体装置の高パワー密度化及び高温動作化が進んでいる。
高温動作での接合信頼性を高めるためには、半導体素子自体の耐熱性を向上させるだけでなく、半導体素子を回路部材に接合する接合材の信頼性を高める必要がある。そこで、焼結金属体を含む接合材を用いて半導体素子を回路基板やヒートシンク等の回路部材に接合する、いわゆる焼結接合を用いた電力用半導体装置の製造方法が提案されている(例えば、特許文献1)。
さて一般的に、金属粒子は粒子径が所定のサイズよりも小さくなると、バルク金属に比べて非常に活性な表面状態を有するようになり、表面エネルギーを減らす方向へ容易に反応が進行する。そこで、焼結接合に用いる接合材には、ナノオーダーから数マイクロオーダーの焼結性金属粒子が含まれる。このような接合材によれば、その金属粒子は、バルク金属の融点よりも低温で溶融及び凝固するが、接合材の接合後にはバルク金属の融点まで再溶融することがない。したがって、焼結性金属粒子の焼結接合を用いると、バルク金属などの融点よりも低い温度での接合が可能となるため、接合温度の上昇に伴う部材の損傷や製造コストの増加が抑制された、接合温度よりも高い耐熱性を有する電力用半導体装置が得られる。
さて、反応性の高い焼結性金属粒子は、接合前の状態での反応の進行を抑制するために有機保護膜で覆われている。この有機保護膜は、接合時の加熱により分解及び除去され、金属粒子同士の接触が促されることで焼結が進行し接合が可能となる。
特開2011−249257号公報
しかしながら、焼結性金属粒子を用いて、半導体素子を配線部材に接合したトランスファーモールド型パワーモジュールでは、焼結金属体と樹脂との接着強度が不足し、パワーモジュール動作時に、焼結金属体などの接合層から樹脂が剥離するという問題があった。
そこで、本発明は、上記のような問題点を鑑みてなされたものであり、接合層と樹脂との接合強度を向上させることが可能な技術を提供することを目的とする。
本発明に係る電力用半導体装置は、配線部材と、半導体素子と、前記配線部材と前記半導体素子とを接合し、焼結金属体からなる接合層と、前記配線部材、前記半導体素子、及び、前記接合層を覆う樹脂とを備え、前記接合層は、前記樹脂と隣接して設けられ、前記樹脂が充填された複数の空隙を有する第1接合層を含み、前記樹脂に含まれる複数のフィラーの幅のうちの最大幅は、前記第1接合層の前記複数の空隙の径のうちの最小径よりも大きく、前記樹脂は、前記フィラーが入り込んだ前記空隙よりも前記フィラーが入り込んでいない前記空隙に充填され易い。
本発明によれば、樹脂に含まれるフィラーの最大幅は、第1接合層の空隙の最小径よりも大きい。このような構成によれば、第1接合層に対する樹脂のアンカー効果を高めることができるので、接合層と樹脂との接着強度を向上させることができる。
実施の形態1に係る電力用半導体装置の要部の構成を示す平面図である。 図1のA−A線の断面図である。 実施の形態1に係る電力用半導体装置の主要な製造工程を示すフローチャートである。 接合層と樹脂との間の接合強度と、接合層の空隙率との関係を示す模式図である。 トランスファー成形後の第1接合層を拡大した模式図である。 トランスファー成形後の第1接合層を拡大した模式図である。 実施の形態1に係る電力用半導体装置の要部の別構成を示す平面図である。 実施の形態2に係る電力用半導体装置の要部の構成を示す平面図である。 図8のA−A線の断面図である。
<実施の形態1>
図1は、本発明の実施の形態1による、トランスファーモールド型の電力用半導体装置101の要部の構成を示す平面図であり、図2は、図1のA−A線に沿った断面図である。なお、説明を明瞭にするために、図1及び図2では、ワイヤー等の配線部材の図示は省略し、図1では、電力用半導体装置101のいくつかの構成要素を封止する樹脂5の図示は省略している。
図1に示すように、電力用半導体装置101は、配線部材1と、半導体素子2と、配線部材1と半導体素子2とを接合する接合層3と、樹脂5とを備える。樹脂5は、配線部材1の裏面(半導体素子2が搭載された面と逆側の面)が露出するように、配線部材1、半導体素子2、及び、接合層3を覆っており、トランスファー成形の構造が取られている。
配線部材1は、例えば、電気導電性と熱伝導性に優れた銅(Cu)、銅合金、または、アルミニウム(Al)等の金属の矩形状ブロックである。なお、配線部材1は、ブロックに限るものではなく、実際には様々な形態のものが適用できる。例えば、配線部材1は、リードフレームと称される板材、または、絶縁性を有するセラミックの基材に金属配線パターンが設けられたセラミック絶縁基板などであってもよい。
半導体素子2は、例えば、MOSFET(Metal Oxide Semiconductor Field-Effect Transistor)、SBD(Schottky Barrier diode)、または、IGBT(insulated gate bipolar transistor)などの電力用半導体素子を含む。また、半導体素子2は、材質が珪素(Si)やワイドバンドギャップ半導体材料としての炭化珪素(SiC)、窒化ガリウム(GaN)、ダイヤモンドなどを含む。
本実施の形態1では、スイッチング素子としてSiのIGBTを半導体素子2に用いた。例えば、半導体素子2は、厚み0.1〜0.4mm程度であり、半導体素子2の主面21は矩形状を有する。半導体素子2の裏面22にはコレクタ電極(図示せず)が設けられ、主面21には主電力電極であるエミッタ電極(図示せず)と、制御電極であるゲート電極とが設けられる。主面21側には配線部材等が接合されたり、配線部材1の下面側には冷却部材が設けられたりすることもある。さらに、半導体素子2を含む回路が設けられた面は、例えば樹脂5によって封止される。一般的に、トランスファーモールド型の電力用半導体装置では、樹脂5は熱硬化性樹脂である。
接合層3は、金(Au)、銀(Ag)、銅(Cu)、または、ニッケル(Ni)などを含む。例えば、Au、Ag、Cu、または、Niなどの骨材たる金属微粒子が有機成分(有機分散材)中に分散されてペースト状になった焼結性金属接合材料を用いて、接合層3は形成される。
焼結性金属接合材料に含まれるナノメーターレベルの金属微粒子は、比較的大きな表面積を有することによって比較的大きな表面エネルギーを有することから反応性が高くなっている。このため、焼結性金属接合材料では、その金属が、バルク状態の融点よりも低い温度で金属接合が拡散により進むという現象を利用することができる。ただし、金属微粒子のみでは、その反応性の高さから、常温でも接触するだけで焼結すなわち拡散接合が進行してしまう。このような金属微粒子が凝集して焼結反応が、意図せずに進行するのを抑制するため、焼結性金属接合材料は、金属微粒子の表面を覆う保護膜などの保護材をさらに含む。保護材は、例えば、個々の金属微粒子を独立した状態で分散保持するための有機分散材である。また、接合工程において焼結反応を生じさせるために、焼結性金属接合材料には、加熱により有機分散材と反応して金属微粒子を露出する分散材捕捉材、及び、有機分散材と分散材捕捉材との反応物質を捕捉して揮散する揮発性有機成分等が添加されている。なお、加熱に加えて加圧を行えば、金属微粒子同士の接合強度を向上させられるとともに、緻密な接合層3を得ることができる。
なお、本実施の形態1では、接合層3は、第1接合層31s及び第2接合層31mを含む。第1接合層31sは、樹脂5と隣接して設けられ、第2接合層31mは、配線部材1、半導体素子2及び第1接合層31sに囲まれて設けられている。そして、第1接合層31sは樹脂5が充填された空隙を有しており、第2接合層31mの空隙率は、第1接合層31sの空隙率よりも小さくなっている。なお、空隙率は、第1接合層31sまたは第2接合層31mと空隙とがなす単位体積当たりの空隙の体積に相当する。
次に、本実施の形態1による電力用半導体装置101の製造方法について説明する。図3は、本実施の形態1による電力用半導体装置101の主な製造工程を示すフローチャートであり、配線部材1と半導体素子2とを接合する接合層3の製造工程と、それら一体品をトランスファー成形する工程とを示す。なお、説明を明瞭にするために、図3では、半導体素子2への配線工程などの図示は省略している。
まずステップS1の接合材塗布工程にて、例えばスクリーン印刷法により、配線部材1上に焼結性金属接合材料を塗布する。焼結性金属接合材料を塗布する印刷には、印刷マスクとスキージとが用いられ、ペースト状の焼結性金属接合材料を印刷マスクの表面に供給し、ペーストを掻き取ることによりペーストを配線部材1上に塗布する。
ここで、部分的に塗布量を調整してペーストの空隙率を制御したり、後述の接合条件を調整したりすることで、接合後の接合層3中の空隙率を制御することができる。本実施の形態1では、空隙率が小さい第2接合層31mと相対的に空隙率が大きい第1接合層31sとを、それぞれの所望の領域に形成する。このように接合層3に空隙を含ませることによって、はんだ材等の接合材に比べて高価な焼結性金属粒子を含む焼結性金属接合材料の使用量を減らすことができる。なお、焼結性金属接合材料の使用量を減らす方法として、塗布面積を減らしたり、塗布領域全域にわたって塗布厚さを低減したりする方法があるが、これらの方法は、放熱性能の低下、電気抵抗の増加、及び、信頼性の低下を招くため好ましくない。
続いて、ステップS2のマウント工程にて、配線部材1上に塗布された焼結性金属接合材料上の適正な位置に半導体素子2を搭載する。
ステップS3の加圧接合工程にて、これまでの工程で形成された構造体を適切な温度(例えば、温度80℃、処理時間30分)に加熱して乾燥することにより、焼結性金属接合材料の有機溶媒成分を除去する。その後、半導体素子2を押下して焼結性金属接合材料を加圧しながら、接合に必要な温度(例えば、温度200℃〜350℃、処理時間30分)に上記構造体を加熱した状態で当該構造体を加圧(例えば、10MPa)する。これにより、焼結性金属接合材料は、配線部材1の接合面と、半導体素子2の接合面と、金属微粒子同士とを焼結接合する。このようにして、空隙率が大きい第1接合層31sと空隙率が小さい第2接合層31mとを含む接合層3が形成される。
最後に、ステップS4のトランスファー成形工程にて、配線部材1と半導体素子2とが接合層3によって接合された一体品を、配線部材1の裏面を除いて樹脂5で覆い、電力用半導体装置101が完成する。この際、第1接合層31sの空隙に樹脂5が充填される。
完成した電力用半導体装置101では、動作時に温度の上昇及び下降が繰り返される。そのため、金属焼結体と樹脂との界面には線膨係数の差に起因して、せん断力が発生する。この力が、金属焼結体と樹脂との接着強度を超えると金属焼結体から樹脂が剥離する。
これに対して本実施の形態1では、トランスファー成形時に、空隙率が大きい第1接合層31sの空隙に樹脂5が充填される。このような構成によれば、アンカー効果により第1接合層31sの金属焼結体と樹脂との接着強度を向上させることができ、金属焼結体からの樹脂5の剥離を抑制することができる。また、従来から存在する工程(トランスファー成形)で樹脂5を充填するため、工数の増加がなく、コストアップを抑制できる。
なお、半導体素子2の外周部直下に比べて、半導体素子2の中央部直下では、接合層3の空隙に樹脂5を充填しにくい。このため、空隙率が大きい第1接合層31sは、半導体素子2の外周部直下に設けることが望ましい。また、空隙率が大きい第1接合層31sは、空隙率が小さい第2接合層31mに比べて熱伝導率が低く、半導体素子2の熱を配線部材1に放熱する能力が小さい。一方、半導体素子2は動作時に発熱し、半導体素子2の中央部付近の温度はその外周部付近の温度に比べて上がりやすい。そのため、放熱性の観点から、本実施の形態1のように、第1接合層31sを半導体素子2の外周部に設け、第2接合層31mを半導体素子2の中央部に設けることが望ましい。このように、接合層3の空隙率を制御することで、半導体素子2と配線部材1との間の放熱性を維持しながら、耐熱性に優れた信頼性の高い電力用半導体装置を得ることができる。
次に、接合層3の空隙率について説明する。図4は、接合層3と樹脂4との間の接合強度と、接合層3の空隙率との関係を示す模式図である。
接合層3の空隙率が5%よりも小さい範囲aにある場合、樹脂5は接合層3に入り込みにくくなり、上述したアンカー効果を十分に得ることができず、接合層3と樹脂5との接着強度を十分に向上させることができない。一方、接合層3の空隙率が20%よりも大きい範囲cにある場合、接合層3自体の強度が不足し、電力用半導体装置101の動作時に接合層3内部で亀裂が進展するため、信頼性が低くなる。そこで本実施の形態1では、接合層3と樹脂5との接着強度を向上させ、かつ電力用半導体装置101の信頼性を向上させるために、接合層3に含まれる第1接合層31sの空隙率が5%以上20%以下の適正範囲bに制御されている。
次に、樹脂5に含まれるフィラー5fのサイズと、第1接合層31sの空隙31shのサイズとの関係について説明する。図5及び図6は、トランスファー成形後の第1接合層31sを拡大した模式図である。具体的には、図5は、フィラー5fの最大幅が、第1接合層31sの空隙31shの最大幅である最大径よりも大きい状態を示す図であり、図6は、フィラー5fの最大幅が、第1接合層31sの空隙31shの最大幅である最大径以下であると仮定した状態を示す図である。
図5の場合、フィラー5fが空隙31shに完全に入り込まないので、第1接合層31sに樹脂5を充填することができる。よって、第1接合層31sに対する樹脂5のアンカー効果を十分に得ることができ、第1接合層31sと樹脂5との接着強度を向上させることができる。一方、図6の場合、フィラー5fが空隙31shに完全に入り込んでいるので、空隙31shとフィラー5fの隙間とに樹脂5を充填することができない。これは、樹脂5は高粘度のため、空隙31shに樹脂5が充填されるためには一定のサイズ以上の隙間が必要であるためである。この結果図6の場合には、第1接合層31sに対する樹脂5のアンカー効果を十分に得ることができず、第1接合層31sと樹脂5との接着強度を十分に向上させることができない。
そこで本実施の形態1では、樹脂5に含まれるフィラー5fの最大幅は、第1接合層31sの空隙31shの最小径よりも大きくなっている。このような構成によれば、1以上の空隙31shにおいて、図5の状態、つまりアンカー効果が得られる状態を実現することができる。
<実施の形態1のまとめ>
以上のように、本実施の形態1における電力用半導体装置101では、半導体素子2と配線部材1とを接合する接合層3を備え、接合層3は、樹脂5が充填された空隙31shを有する第1接合層31sを含み、樹脂5に含まれるフィラー5fの最大幅は、第1接合層31sの空隙31shの最小径よりも大きい。このような構成によれば、第1接合層31sに対する樹脂5のアンカー効果を高めることができるので、コストアップを抑制しつつ、接合層3と樹脂5との接着強度を向上させることができる。したがって、耐熱性及び信頼性に優れたトランスファーモールド型の電力用半導体装置101を低コストで得ることができる。
なお以上の説明では、樹脂5に含まれるフィラー5fの最大幅が、第1接合層31sの空隙31shの最小径よりも大きい構成について説明した。しかしこれに限るものではなく、樹脂5に含まれるフィラー5fの最大幅が、第1接合層31sの空隙31shの最大径よりも大きくてもよい。このような構成によれば、一部の空隙31shにおいてではなく、全ての空隙31shにおいて、図5の状態、つまりアンカー効果が得られる状態を実現することができる。
また以上の説明では、図1に示すように1つの配線部材1に1つの半導体素子2を接合する構成について説明したが、これに限るものではない。例えば、図7に示すように、1つの配線部材1に複数の半導体素子2を接合する構成であってもよい。この構成は、各半導体素子2を接合する接合材料を一括で塗布し、各半導体素子2を一括で加圧接合することができるので、生産性の観点から望ましい。
<実施の形態2>
図8は、本発明の実施の形態2による、トランスファーモールド型の電力用半導体装置101の要部の構成を示す平面図であり、図9は、図8のA−A線に沿った断面図である。以下、本実施の形態2に係る構成要素のうち、上述の構成要素と同じまたは類似する構成要素については同じ参照符号を付し、異なる構成要素について主に説明する。
実施の形態1では、図1に示すように金属焼結体である接合層3は、半導体素子2の直下のみに設けられた。これに対して本実施の形態2では、接合層3は、半導体素子2の直下だけでなく、半導体素子2の周囲にも設けられている。つまり、第1接合層31sは、配線部材1と半導体素子2との間、及び、平面視における半導体素子2の外側に設けられている。
<実施の形態2のまとめ>
以上のような本実施の形態2によれば、実施の形態1に比べて第1接合層31sと樹脂5のとの接触面積を大きくすることができる。したがって、樹脂5が充填された空隙を有する第1接合層31sの体積を増加させることができ、接合層3と樹脂5との接着強度をより高めることができる。
なお、本発明は、その発明の範囲内において、各実施の形態及び各変形例を自由に組み合わせたり、各実施の形態及び各変形例を適宜、変形、省略したりすることが可能である。
1 配線部材、2 半導体素子、3 接合層、5 樹脂、5f フィラー、31s 第1接合層、31sh 空隙、31m 第2接合層、101 電力用半導体装置。

Claims (7)

  1. 配線部材と、
    半導体素子と、
    前記配線部材と前記半導体素子とを接合し、焼結金属体からなる接合層と、
    前記配線部材、前記半導体素子、及び、前記接合層を覆う樹脂と
    を備え、
    前記接合層は、
    前記樹脂と隣接して設けられ、前記樹脂が充填された複数の空隙を有する第1接合層を含み、
    前記樹脂に含まれる複数のフィラーの幅のうちの最大幅は、前記第1接合層の前記複数の空隙の径のうちの最小径よりも大きく、
    前記樹脂は、前記フィラーが入り込んだ前記空隙よりも前記フィラーが入り込んでいない前記空隙に充填され易い、電力用半導体装置。
  2. 請求項1に記載の電力用半導体装置であって、
    前記接合層は、
    前記配線部材、前記半導体素子及び前記第1接合層に囲まれて設けられ、前記第1接合層よりも空隙率が小さい第2接合層をさらに含む、電力用半導体装置。
  3. 請求項1または請求項2に記載の電力用半導体装置であって、
    前記第1接合層は、
    前記配線部材と前記半導体素子との間、及び、平面視における前記半導体素子の外側に設けられている、電力用半導体装置。
  4. 請求項1から請求項3のうちのいずれか1項に記載の電力用半導体装置であって、
    前記第1接合層の空隙率は、5%以上20%以下である、電力用半導体装置。
  5. 請求項1から請求項4のうちのいずれか1項に記載の電力用半導体装置であって、
    前記接合層は、銀、金、銅、または、ニッケルを含む、電力用半導体装置。
  6. 請求項1から請求項5のうちのいずれか1項に記載の電力用半導体装置であって、
    前記樹脂は、熱硬化性樹脂である、電力用半導体装置。
  7. 請求項1から請求項6のうちのいずれか1項に記載の電力用半導体装置であって、
    前記樹脂に含まれる複数のフィラーの幅のうちの最大幅は、前記第1接合層の前記複数の空隙の径のうちの最大径よりも大きい、電力用半導体装置。
JP2017194118A 2017-10-04 2017-10-04 電力用半導体装置 Active JP6890520B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2017194118A JP6890520B2 (ja) 2017-10-04 2017-10-04 電力用半導体装置
US16/029,760 US10468368B2 (en) 2017-10-04 2018-07-09 Power semiconductor device having void filled with resin
DE102018213859.1A DE102018213859A1 (de) 2017-10-04 2018-08-17 Leistungshalbleitermodul
CN201811152150.9A CN109616460B (zh) 2017-10-04 2018-09-29 电力用半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017194118A JP6890520B2 (ja) 2017-10-04 2017-10-04 電力用半導体装置

Publications (2)

Publication Number Publication Date
JP2019067986A JP2019067986A (ja) 2019-04-25
JP6890520B2 true JP6890520B2 (ja) 2021-06-18

Family

ID=65728126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017194118A Active JP6890520B2 (ja) 2017-10-04 2017-10-04 電力用半導体装置

Country Status (4)

Country Link
US (1) US10468368B2 (ja)
JP (1) JP6890520B2 (ja)
CN (1) CN109616460B (ja)
DE (1) DE102018213859A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7072462B2 (ja) * 2018-07-30 2022-05-20 株式会社日立製作所 半導体装置、焼結金属シートおよび焼結金属シートの製造方法
JP7029182B2 (ja) * 2019-05-22 2022-03-03 協立化学産業株式会社 接合体の製造方法
JP7351134B2 (ja) * 2019-08-08 2023-09-27 富士電機株式会社 半導体装置及び半導体装置の製造方法
JP2021097072A (ja) * 2019-12-13 2021-06-24 昭和電工マテリアルズ株式会社 半導体装置の製造方法
WO2023084911A1 (ja) * 2021-11-10 2023-05-19 住友電気工業株式会社 半導体装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2892348B1 (ja) * 1998-06-04 1999-05-17 松下電器産業株式会社 半導体ユニットおよび半導体素子の実装方法
EP1050888B1 (en) * 1998-08-28 2010-10-06 Panasonic Corporation Conductive paste, conductive structure using the same, electronic part, module, circuit board, method for electrical connection, method for manufacturing circuit board, and method for manufacturing ceramic electronic part
JP2000294692A (ja) * 1999-04-06 2000-10-20 Hitachi Ltd 樹脂封止型電子装置及びその製造方法並びにそれを使用した内燃機関用点火コイル装置
US6847122B1 (en) * 2003-10-16 2005-01-25 Kulicke & Soffa Investments, Inc. System and method for preventing and alleviating short circuiting in a semiconductor device
JP5066529B2 (ja) * 2006-10-19 2012-11-07 パナソニック株式会社 半導体素子の実装構造体及び半導体素子の実装方法
TWI456707B (zh) 2008-01-28 2014-10-11 Renesas Electronics Corp 半導體裝置及其製造方法
JP5611537B2 (ja) * 2009-04-28 2014-10-22 日立化成株式会社 導電性接合材料、それを用いた接合方法、並びにそれによって接合された半導体装置
JP2011165871A (ja) 2010-02-09 2011-08-25 Denso Corp 電子装置およびその製造方法
JP5525335B2 (ja) 2010-05-31 2014-06-18 株式会社日立製作所 焼結銀ペースト材料及び半導体チップ接合方法
US8569109B2 (en) * 2011-06-30 2013-10-29 Infineon Technologies Ag Method for attaching a metal surface to a carrier, a method for attaching a chip to a chip carrier, a chip-packaging module and a packaging module
JP2014029897A (ja) * 2012-07-31 2014-02-13 Hitachi Ltd 導電性接合体およびそれを用いた半導体装置
EP3057123B1 (en) * 2013-10-07 2021-12-08 Furukawa Electric Co., Ltd. Joining structure comprising layers with different average crystal grain sizes for a semiconductor chip
JP6575301B2 (ja) * 2014-10-31 2019-09-18 三菱マテリアル株式会社 封止用ペースト、ろう接合材とその製造方法、封止用蓋材とその製造方法、及びパッケージ封止方法
WO2016103528A1 (en) * 2014-12-26 2016-06-30 Henkel Japan Ltd. Sinterable bonding material and semiconductor device using the same
US9532448B1 (en) * 2016-03-03 2016-12-27 Ford Global Technologies, Llc Power electronics modules

Also Published As

Publication number Publication date
DE102018213859A1 (de) 2019-04-04
JP2019067986A (ja) 2019-04-25
CN109616460A (zh) 2019-04-12
US20190103374A1 (en) 2019-04-04
CN109616460B (zh) 2023-02-24
US10468368B2 (en) 2019-11-05

Similar Documents

Publication Publication Date Title
JP6890520B2 (ja) 電力用半導体装置
JP4770533B2 (ja) 半導体装置の製造方法および半導体装置
WO2016152258A1 (ja) 半導体装置
JP6336138B2 (ja) 半導体装置
TW201238023A (en) Semiconductor device and method for manufacturing semiconductor device
JP2014135411A (ja) 半導体装置および半導体装置の製造方法
US20120074563A1 (en) Semiconductor apparatus and the method of manufacturing the same
CN111276447A (zh) 双侧冷却功率模块及其制造方法
JP6129107B2 (ja) 電力用半導体装置、および電力用半導体装置の製造方法
JP5246143B2 (ja) 半導体モジュールおよびその製造方法ならびに電気機器
JP6399906B2 (ja) パワーモジュール
JP2018006492A (ja) 半導体装置及び半導体装置の製造方法
CN107634036B (zh) 半导体装置
JP2012138470A (ja) 半導体素子、半導体装置および半導体装置の製造方法
CN108369912B (zh) 半导体装置及其制造方法
JP2014107519A (ja) 半導体装置およびその製造方法
JP2012209469A (ja) 電力用半導体装置
JP6064845B2 (ja) 半導体装置
JP2001332664A (ja) 半導体装置およびその製造方法
WO2013021983A1 (ja) 半導体装置及びその製造方法
JP2015162645A (ja) 半導体装置およびその製造方法
JP2018148106A (ja) 電力用半導体装置
JP2014053406A (ja) 半導体装置およびその製造方法
JP7582156B2 (ja) 半導体装置及びその製造方法
JP6119553B2 (ja) 電力用半導体装置およびその製造方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20191105

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20200807

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20200908

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20201020

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20210427

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20210525

R150 Certificate of patent or registration of utility model

Ref document number: 6890520

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250