JP4588595B2 - Plasma processing apparatus and processing method - Google Patents

Description

  The present invention relates to a plasma processing method used for processing a semiconductor integrated circuit, and more particularly to a dry etching method.

In semiconductor integrated circuits, miniaturization has progressed in response to demands for higher density, and in particular, insulation layers with a low dielectric constant have the purpose of lowering wiring capacitance in wiring layers and operating devices at low speed with low power consumption. Has been introduced.

  Further, since it is difficult to secure a selection ratio with respect to the processing mask and the base for these insulating materials, etching is performed with a gas in which a mixed amount of a gas having a high deposition property is increased. Therefore, on the wafer surface, a film is formed and deposited by the deposition gas on the round shape portion (bevel portion) of the wafer edge portion where the impact of ions is particularly small, and the film is formed with a thickness of about 100 nm at the end of etching.

The deposited film peels off during the processing of the next process, and generates a foreign matter, or causes a failure such as inducing the peeling of the underlying film.
Conventionally, for example, as disclosed in Patent Document 1, a deposited film that is generated as a result of an etching process is removed after the etching by a post-treatment with a chemical solution.
Further, for example, Patent Document 2 discloses a plasma etching method for preventing deposit accumulation by supplying a deposit removing gas having a function of chemically reacting with a deposit to the vicinity of an end of the substrate to be processed. Is described.
JP 2001-237236 A JP 2004-200333 A

In the above-described prior art, if the deposited film is not sufficiently removed, the film is peeled off in the subsequent processing step to generate foreign matter, or the film that is a part of the device on the wafer is damaged when processed with a highly removable chemical. There was a problem that. Especially when the film on the wafer is a low dielectric constant insulating film, etc., the low dielectric constant insulating film is susceptible to chemical damage to the chemical solution, and since the usable chemical solution is limited, the removal efficiency of the deposited film is low, Processing time is prolonged and throughput is lowered, which is a major factor of deterioration of electrical characteristics or yield. Alternatively, the use of a special device for bringing the chemical solution into contact with the bevel portion intensively has been carried out, but these have a high device cost and cause an increase in production cost.

  The deposited film on the bevel portion is etched by using an apparatus in which the power supply line to the wafer and the focus ring is made independent, and after the etching is finished, the power supply line on one side is grounded in the etching apparatus. Plasma is intensively generated in the peripheral part and efficiently removed.

According to the present invention, the production cost of a semiconductor integrated device can be reduced.

In the embodiment of the present invention, immediately after etching, plasma is intensively generated around the wafer edge portion where the deposited film adheres in-situ, and the deposited film is formed without adversely affecting the film on the wafer. It gives a way to remove. In particular, by removing in-situ, it is possible to avoid alteration and hardening of the deposited film over time or due to atmospheric exposure, etc., so that more efficient removal processing can be performed, and the influence on the throughput of the etching apparatus is slight. In total, you can expect the merit of ensuring high throughput.
Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic sectional view of a plasma etching apparatus using UHF (Ultra High Frequency) -ECR (Electron Cyclotron Resonance). Here, reference numeral 101 denotes a vacuum processing chamber, the quartz window 102 is provided for passing a UHF electromagnetic field for generating plasma into the vacuum processing chamber 101, and the electrode 103 faces the quartz window 102 in the vacuum processing chamber 101. A high-frequency power source 105 for placing a wafer 104 on which a semiconductor integrated device is formed and generating a bias voltage is connected. The antenna 107 is connected to the quartz window 102 and introduces an electromagnetic field for generating plasma into the vacuum processing chamber 101 from the UHF power source 110. The solenoid coil 108 forms a magnetic field in the vacuum processing chamber 101. The gas dispersion plate 109 disperses the gas supplied from the mass flow controller 110 according to the etching recipe into the vacuum processing chamber 101 and introduces it uniformly.

A silicon ring 121 is installed on the non-wafer mounting portion of the electrode 103 via an insulating ring 123 and a conductor ring 122. A high frequency power source 105 is connected to the conductor ring 122 and the electrode 103 from outside the vacuum processing chamber 101 via a switch circuit 124.
As shown in FIG. 2, the switch circuit 124 has a function of switching the power supply lines to the electrodes and the focus ring (conductor ring) to the high-frequency power supply 105 and the wiring to the ground, respectively.

FIG. 2 shows an example in which one high-frequency power source 105 is connected to a feed line to an electrode and a focus ring (conductor ring), but the high-frequency power source connected to the electrode and the focus ring (conductor ring) are shown. The high frequency power source connected to the power source may be a different high frequency power source. FIG. 2 shows an example in which the wiring to the ground is arranged separately for the electrode and the focus ring (conductor ring), but one wiring connected to the ground is for the electrode. And branching for a focus ring (conductor ring).
The wafer 104 is a wafer having a diameter of 300 mm, and the wafer used in this embodiment is a wafer on which a film and a pattern for etching evaluation in the wiring layer forming step are formed.

  First, an etching process was performed on the wafer 104 with a predetermined etching recipe in a state where the wiring from the high-frequency power source 105 was connected to the electrode and the focus ring by the switch circuit 124. After the processing, the wafer is taken out, and the measurement result of the thickness of the deposited film on the wafer bevel portion is shown in FIG. It can be seen that a deposited film of up to 100 nm is formed from the vertical portion of the wafer end surface to the back surface portion.

  Next, a case where the method of the present invention is performed after performing the same etching process as described above using an evaluation wafer of the same specification will be described. After performing the etching step, a normal end sequence is performed, and the power supply line to the focus ring is switched from the high frequency power source side to the ground side by the switch circuit 124 of FIG. Thereafter, hydrogen gas, which is an etching gas for the deposited film, was introduced and adjusted to a predetermined pressure, and then 100 W of power was output from the high-frequency power source 105, and this state was maintained for 30 seconds. Thereafter, the wafer was taken out, and the same measurement as shown in FIG. 3 was performed. The result is shown in FIG. 4, and it can be seen that the deposited film is removed by the post-treatment according to the present invention.

  In the second embodiment of the present invention, after performing the etching process and the end sequence in the same manner as in the first embodiment, the switch circuit 124 of FIG. 1 connects the power supply line to the electrode to the ground side and introduces hydrogen gas. Then, after adjusting to a predetermined pressure, 150 W of electric power was output from the high frequency power source 105, processing was performed for 45 seconds, and then the same inspection measurement was performed. As a result, it was confirmed that all the deposited films were removed.

  Further, the processing according to the above two examples was performed not on the etching evaluation wafer but on the wafer in which the device was built, and the electrical characteristics were evaluated, but it was confirmed that the same excellent characteristics as in the conventional case were obtained.

  As shown in FIG. 5, the method according to the present invention is considered to be able to efficiently generate discharge plasma in the vicinity of the bevel portion where the deposit is attached, and thus chemical damage to the wafer surface with the device can be avoided. .

  As described above, it has been exemplified that the deposition of the bevel portion generated by the etching can be efficiently removed in the etching apparatus by implementing the present invention. The industrial effect brought about by this invention is that the throughput is improved compared to the conventional chemical processing, and the total production cost is greatly reduced by eliminating the costs associated with chemicals, chemical processing equipment and waste liquid processing. It can be done.

Sectional drawing of the plasma processing apparatus explaining the Example of this invention. The figure which shows the function of a switch circuit. The figure which shows the quantity of the deposited film adhering to the bevel part by the etching process. The figure which shows that the deposited film adhering to a bevel part is removed by application of this invention. The figure explaining the reason which the effect of this invention expresses.

Explanation of symbols

101 Vacuum processing chamber 103 Electrode 104 Wafer 121 Focus ring 124 Switch circuit

Claims (3)

A vacuum processing chamber; plasma generating means for generating plasma; a substrate for processing a semiconductor integrated device to which plasma etching is performed; an electrode disposed in the vacuum processing chamber for mounting the substrate to be processed; A focus ring made of silicon installed around the processing substrate, and at least one high-frequency power source for applying high-frequency power to the substrate to be processed and the focus ring made of silicon ,
A switch circuit for switching the power supply line to the focus ring made of the substrate to be processed and the silicon to the high-frequency power source or to the ground, respectively,
With the switch circuit, one of the substrate to be processed or the focus ring made of silicon is grounded,
On the other hand, plasma is generated in the lower part of the periphery of the substrate to be processed by applying high frequency power from the high frequency power source. A vacuum processing chamber; plasma generating means for generating plasma; a substrate for processing a semiconductor integrated device to which plasma etching is performed; an electrode disposed in the vacuum processing chamber for mounting the substrate to be processed; In a plasma processing method by a plasma processing apparatus having a focus ring made of silicon installed around a processing substrate and at least one high-frequency power source for applying high-frequency power to the substrate to be processed and the focus ring made of silicon ,
A high frequency power is supplied from the high frequency power source to the target substrate and the focus ring made of silicon by a switch circuit that switches a power supply line to the focus ring made of silicon and the focus ring made of silicon to the high frequency power source or wiring to the ground. Plasma etching the substrate to be processed while applying
With the switch circuit, one of the substrate to be processed or the focus ring made of silicon is grounded,
And plasma etching the plasma-etched substrate periphery while applying high-frequency power from the high-frequency power source. The plasma processing method according to claim 2, wherein
The plasma processing method is characterized in that the step of plasma etching the peripheral portion of the substrate to be processed is a step of removing a deposited film adhering to an end portion of the plasma-etched substrate to be processed.

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