JP2534534C - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]   The present invention relates to a method for transmitting a digital signal from an encoding station (encoding station) to a decoding station (decoding station).
The present invention relates to a television system that transmits a television signal that has been converted to a television. Further details
In other words, the present invention provides an encoding method in which an encoding circuit for performing transform encoding is provided.
For a television system having a station, the transform coding comprises a plurality of groups of images.
The signal sample values (sample values) are converted into corresponding coefficient groups, and these coefficient groups are decoded.
Transferred to the station. In order to recover the original television signal sample values, the decoding station
Has a decoding circuit that performs an inverse transform on each group of coefficients.   This type of system can form part of a television broadcast system
You. In such a case, the coding station is provided in the television broadcast transmitter and
The bureau is provided in the television receiver. In this case, the television channel
Are used to transfer digitized television signals.   As another example, such a system may form part of a video recorder.
Can also be. In this case, for example, a video tape or the like is used to transfer data from the encoding station to the decoding station.
Used to transfer digital television signals. [Conventional technology]   As is well known, those skilled in the art will recognize many of the basics of encoding many digital television signals.
The method is known. Examples of them are (a) predictive coding, abbreviated as PC, (b) transform coding, abbreviated as TC, There is.   To perform each of these methods, the television signal is first
It is sampled (sampled) at twice the highest frequency. This sampling frequency is
, For a television signal having a bandwidth of about 5 MHz, this is equal to about 10 MHz.
Each sample value obtained in this way is converted to an 8-bit PCM by pulse code modulation.
Converted to codeword. The result is a bit rate of about 80 Mbit / s. this
The bit rate is unacceptably high in reality. In fact, this bit rate is about
It requires a transport channel with a bandwidth of 40 MHz, but such a bandwidth is
It does not exist on television broadcast channels nor on video tapes.   This bit rate is greatly reduced by applying predictive coding to PCM code words
You can do it. As is well known (for example, Proceedings of the IEEE, Vol.
68, No. 3, March 1980, pp. 366-406, Picture Coding: A Review 3
The predicted words are subtracted from each PCM code word and the resulting
The difference obtained is subjected to pulse code modulation again. Usually, four differences are used to represent these differences.
The bit rate is reduced by 50% because the code word of the bit is sufficient.   Instead of such predictive coding, it is also possible to apply transform coding to PCM code words.
(For example, Pro-ceedings of the IEEE, Vol. 68, No. 3, March 1980, 366)
Pp. 390-396, Picture Coding: A Review, pp. 406). Well-known
In this case, the television image is divided into sub-images of NXN pixels.
It is. Each sub-image has a plurality of orthogonal relations, each with its own weighting factor y (i, k).
It is regarded as the sum of the basic images B (i, k) (where i, K = 1, 2,... N).
These weighting coefficients y (i, k) are called coefficients, as is usually done. And this
These coefficients are transferred to the decoding station.   In order to transfer these coefficients to the decoding station at the lowest bit rate possible,
The coefficients are first subjected to adaptive coding (see, for example, US Pat. No. 4,398,217).
. When coding these coefficients, assign more bits to the more important coefficients
, Assign less bits to less important coefficients and all bits to less important coefficients
Ku Do not assign bits. In other words, the less important coefficients are sent to the decoding office.
Does not forward.   A television signal represents only one quantity that changes with time, namely luminance.
In such a monochrome television, the basic image B (1,1) has the average luminance of the sub-image.
And the coefficient y (1,1) represents its amplitude. This coefficient y (1,1) is usually the most important and
It must therefore be encoded very accurately. For this, in practice,
Eight or nine bits may be sufficient. Other factors are usually 5
What is necessary is just to encode with less than bits.   By selecting an appropriate transform, the bit rate is lower than with predictive coding.
Can be done. In this case, the most commonly used conversion method is
Hotelling, Fourier, Haar, or discrete
There is a scattered cosine transform.   Each sub-picture contains pixels from both the odd and even fields of the television picture.
May be created as needed. Transformation of such sub-images is often done using intra-frame transformations.
It is called. Alternatively, substitute the sub-images, all of which are television images,
Pixel in either the even or odd field of the
Can also be created from Such sub-images are often referred to as intra-field transforms.
Be called. [Problems to be solved by the invention]   In general, bit rate reduction, which is of primary concern, is to improve image quality by intra-frame conversion.
It seems that this can be achieved with a very slight reduction in
, This reduction in bit rate is only noticeable when the transferred image is a still image
I know. For video, intra-field conversion is better than intra-frame conversion
It turned out to be efficient.   Therefore, it is an object of the present invention that transform coding is used and is of primary interest
Provide a television system that can reduce bit rate even for moving images.
To provide. [Means and Actions for Solving the Problems]   The television system according to the present invention comprises:   In the coding circuit in the coding station,   Conversion with both intra-field and intra-frame conversion modes
Circuit and   With the image signal supplied, within two successive fields of the image,
Whether there is any displacement of the object in the image that can be detected in the image signal sample value group to be converted
A motion detector that outputs an instruction signal indicating whether or not   If there is the above displacement based on the above indication signal, it is converted in the field
Is selected and transferred to the decoding station, while the above displacement is
If not, select the coefficient obtained by intra-frame conversion and transfer it to the decoding station
Means to It is characterized by having.   Further, in the television system according to the present invention, the decoding station   The coefficients are supplied and the in-field and
An inverse conversion circuit that operates on   Reproducing the instruction signal and responding to the reproduction instruction signal,
Based on the image signal sample values obtained based on the inverse inversion
Means for selecting the obtained image signal sample values, It is characterized by having.   The present invention is based on the following recognition. Now, the object in the image
Suppose things are separated by vertical lines. If this line moves horizontally
And the portion displayed in the field with the line is the field immediately before the line
Is slightly shifted from the portion indicated in the figure. For such images,
If only intra-frame conversion is performed, higher-order coefficients are considered compared to the case without motion.
You need to take this into account. In fact, not a straight line, but a wavy line caused by movement,
Only when the higher order coefficients are transferred will they be correctly reproduced at the decoding station.   The effects of such movements are inconspicuous in the field,
It does not appear even if you use a transformation. In this case, the image is a still image and Do not take into account higher order coefficients than would be required with intra-frame transformations.
You don't have to. Compared to when only intra-frame conversion is used
Thus, a very satisfactory bit rate reduction is achieved by using the measures according to the invention.
Achieved.   Here, it is important to note that intra-frame conversion in still images leads to the lowest bit rate.
It should be noted that In fact, for intra-frame conversions,
In addition to the correlation between different pixels (two-dimensional correlation),
The correlation between cells (three-dimensional correlation) is also taken into account.   In the television system described above, the data must be transferred to a decoding station.
The choice of the coefficients is made by the motion detector. This detector has a slight
In case of motion, the coefficient obtained by intra-field conversion is selected.
Then, it may be adjusted. This depends on the number of coefficients to be transferred and therefore the bit rate
At times, it has been found to have adverse effects. If you get by intra-field conversion
A certain amount of movement in the image is allowed before the coefficients to be selected are selected.
If so, the increase in the number of coefficients will be less. To further reduce the number of coefficients to transfer
The encoding circuit according to another embodiment of the television system includes a television for encoding an image.
Includes a filter device that performs median filtering on signal samples,
Only force samples undergo intraframe transformation.   Such a filter device is available, for example, from J. Wiley and Sons in A Wiley-inter
Digital ImageProce by W.K.Pratt published as science publication
It is generally known as mentioned in ssing. [Example] Schematic configuration of television system   FIG. 1 shows a video recorder provided with a television system according to the present invention.
Shown conceptually. This video recorder comprises an encoding station I and a decoding station II.
I have. The coding station I receives the analog image signal x (t) supplied from the image signal source 2
Receive via terminal 1. Further, the coding station I uses the write head 3 to
It is connected to the air tape 4. The decoding station II also receives the magnetic data via the read head 5. It is connected to the tape 4. The decoding station II receives the analog signal supplied to the monitor 7
The image signal x ′ (t) is output from the output terminal 6 thereof.   The coding station I has a coding circuit 8 to which the analog signal x (t) is supplied.
The encoding circuit 8 records on the magnetic tape 4 via the modulation circuit 9 and the write head 3.
Pulse train z (j) to be supplied.   Correspondingly, the decoding station II has a decoding circuit 10, and this decoding circuit 10
The signal read from the magnetic tape 4 by the read head 5 is demodulated by the demodulator 11.
A pulse train z '(j) obtained by demodulation is supplied.   In the encoding circuit 8, the analog image signal x (t) is first selected appropriately.
It is sampled in a sampling circuit 81 having a sampling frequency of about 10 MHz.
Thus, a series of image signal sample values, that is, pixels are obtained. These pixels
, An analog-to-digital converter (A / D converter) 82 with an 8-bit PCM code word x (
n) and supplied to a conversion circuit 83 as described below. In this regard
, The conversion circuit 83 converts the block of N XN pixels x (i, k) into the same large each time.
N x N coefficient y (i, k) blocks and indication bits MD
You should be careful. That is, a block of pixels x (i, k) is
Or undergo intra-frame conversion. The indication bit MD is a block of the coefficient.
Indicates which conversion mode was used. These coefficients and indicator bits are
Determine which of a number of criteria is satisfied by a block of coefficients
To the adaptive encoder 84. Then, the number of bits is
Assigned. The number of bits depends on the criteria that are met. Finally, each coefficient
Is encoded based on the number of bits assigned to it. Adaptive encoder 84
Is one or more classification bits that indicate which criteria have been met by the coefficient block.
Also output kl. Many embodiments of such adaptive encoders have already been described in the literature.
Have been. Specific examples are described in detail, for example, in U.S. Patent No. 4,398,217.
Have been   The encoded coefficients, the classification bits kl and, in this embodiment, further indication bits
Are supplied to the magnetic tape 4 separately or in a time-division multiplex format. the latter
In such a case, the time-division multiplexer circuit 85 is necessary. The multiplexer circuit can be constructed in a conventional manner and the multiplexer
The circuit outputs a pulse train z (j) from its output terminal.   In the decoding circuit 10, the pulse train z '(j) supplied from the demodulator 11 is demultiplexed.
The demultiplexer circuit supplies the multiplexed coefficient to the multiplexor circuit 101.
The block, the instruction bit MD, and the classification bit kl are separated. This coefficient block
, The classification bit kl and, in this embodiment, the indication bit MD,
This decoder supplies a transform circuit 83 for each received coefficient block.
Block of coefficient y '(i, k) corresponding to the block of coefficient y (i, k) created by
Output. These coefficients y '(i, k) together with the associated indication bits MD
03, and the inverse conversion circuit performs a block of coefficient y ′ (i, k) according to the instruction bit MD.
Performs an in-field or in-frame inverse on the lock. As a result,
The conversion circuit 103 outputs image signal sample values x '(n), and these sample values are
The signal is supplied to a series connection of a D / A converter 104 and a low-pass filter 105.
Thus, an analog image signal x '(t) is obtained and displayed on the monitor 7. Conversion circuit   As described above, the conversion circuit 83 converts the field into a block of N.times.N pixels.
Perform intra-conversion or intra-frame conversion. An embodiment of such a conversion circuit is illustrated in FIG.
Is shown.   This embodiment assumes that a block of N X N pixels x (i, j) is considered a matrix X.
And each basic image         B (i, k) = A_ikA^T              --- (1) It is based on the known concept of satisfying In the above relationship, A is
Represents a transformation matrix, A_iIs such that each column is equal to the ith column of the transformation matrix A.
Represents a matrix, Ak^TIs a matrix whose rows (rows) are equal to the k-th row of the transformation matrix A
Is represented. If the coefficients y (i, k) form a matrix Y, then         Y = A^TXA --- (2) Holds. In the above, A^TRepresents the transpose of matrix A.   To calculate the coefficient based on the above relation (2) Is the original transformation matrix A and its transpose A^TYou need both. However, on
The writing relation (2) is         Y^T= (XA)^TA --- (3) Is equivalent to To perform this matrix multiplication, only the transformation matrix A is required. You
That is, the product matrix P = XA is first calculated, then P is transposed, Finally Y^T= P^TA is determined.   The embodiment shown in FIG. 2 has an input terminal 8301 to which a pixel x (n) is supplied, and a coefficient y (i,
k) from which an output terminal 8302 is obtained. The input terminal 8301 has two images
The memories 8303 (1) and 8303 (2) are connected. These memories are addressable
It has a storage location, and two images can be stored by the write / read commands RW1 and RW2.
The visible pixel value of the visible row of successive fields of is stored in one of these two memories
At the same time as writing, there are two pixels in the rows of the two fields of the preceding image
Is controlled to be read from the other of the memories. These image memories 8303 (1), 8
Address information ADD1 and ADD2 supplied to the address input terminal of 303 (2) correspond
Memory location to store the pixel in, or read
Decide whether to run out.   More specifically, the received visible pixels of a visible row of the image are converted from row to row.
Is written to the image memory 8303. In this case, the odd rows of pixels are
And then the even rows of pixels are stored. All visible pipes in the visible row of one image
After the cell has been received, the image memory 8303 is stored, for example, as indicated by the dots in FIG.
Such a pixel will be stored. In FIG. 3, the visible pic
The number LN of the row of the image memory in which the cell is written is shown vertically, and
The column number PN of the image memory in which the visible pixel of the row is written is indicated in the horizontal direction.
Have been. When reading the contents of the above image memory 8303, each image is NXN
Is divided into a plurality of blocks X of pixels x (i, k). Such a case when N = 8
FIG. 3 shows the concept conceptually.   The pixels of each such block X are supplied to the converter 8304 from row to row.
You. This block X is multiplied there by a fixed transformation matrix A. This place
In this case, the transform matrix A is a discrete cosine transform (hereinafter abbreviated as DCT) of 8
An X8 matrix is preferred. As a result, a product matrix P = XA having matrix elements p (i, k) is obtained.
Can be   Two memories 8305 (1) and 8305 (2) are connected to the output terminal of the converter 8304.
ing. Similarly to the image memory 8303, the memories 8305 (1) and 8305 (2) specify the address.
It has a possible storage location, and these are written by write / read commands RW3 and RW4.
Each matrix element of the product matrix P is written to one of the two memories, and at the same time,
The matrix elements of the product matrix P are controlled to be read from the other of the two memories. You
That is, the matrix elements P (i, k) are written into the memory 8305 from row to row. this
In this case, the storage location where the matrix element p (i, k) is written is
Address information, as determined by the address information ADD3 or ADD4.
It is supplied to the address input terminal of the corresponding memory. This address information is stored in the memory
Also determines in which order the matrix elements p (i, k) stored in are read out.   The output terminal of each memory 8305 (1), 8305 (2) is connected to the switching device shown symbolically in the figure.
8306 is connected to the input terminal. This switching device 8306 includes a memory 83
05 (1), all matrix elements of the product matrix read from 8305 (2) to the converter 8307 or 8308
Supply. The former is the case where the conversion circuit 83 is in the intra-frame conversion mode,
The intra-frame conversion is performed, and the latter is performed when the conversion circuit 83 is in the intra-field conversion mode.
Therefore, an intra-field conversion is performed. Of two transducers 8307 and 8308
The output terminals are connected to separate input terminals of another switching device 8309, shown symbolically.
Has been continued. The output terminal of the switching device 8309 is connected to the output terminal of the conversion circuit 83.
It is connected to a terminal 8302, where a desired conversion coefficient y (i, k) is obtained.   The switching devices 8306 and 8309 are provided with switches supplied from the motion detector 8310.
It is controlled by a timing signal MD (corresponding to the indication bit). This motion detector
The input terminal of 8310 is in this case connected to the input terminal of converter 8304. This dynamic
The detector 8310 determines that the object in the image is between two consecutive fields. Whether it has moved within the period, and if any of this movement is a block of 8 x 8 pixels
Decide if you can perceive it in the pocket. If the latter is not satisfied, the signal MD is
0, and the conversion circuit 83 enters the intra-frame conversion mode. In this case,
The product matrix element p (i, k) written to row 8305 from row to row is read from column to column.
Thus, the product matrix P is transposed. The product matrix element p (i,
k) is supplied to a converter 8307. This converter 8307 has the same configuration as the converter 8304.
And an 8 × 8 DCT matrix in the 8 × 8 matrix P supplied from the memory 8305.
Matrix A again. As a result, the product matrix Y^T= P^TA is obtained, and its matrix element y (i, k) represents a desired coefficient.
Will be. Here, the name of this mode, the intra-frame conversion mode, is referred to as the conversion mode.
The 8 × 8 matrix of product matrix elements supplied to the
Note that it is based on the fact that it is created from a file.   If the signal MD is 1, ie for the time between two consecutive fields,
If the movement of the object is detectable within a block of 8 x 8 pixels,
The conversion circuit 83 is set to the intra-field conversion mode. In this mode, the product
The matrix elements p (i, k) are read out in a completely different order than in the intraframe transformation.
You. If motion is detected within a block of 8 × 8 pixels, the product
The matrix P is divided as shown in FIG. More specifically, the converter 8304
The product matrix P supplied from the memory 8305 and stored in the memory 8305 is as shown in I of FIG.
. The product matrix P is composed of odd-numbered product matrix elements as shown in II of FIG.
A 4 × 8 matrix composed of a 4 × 8 matrix and an even-numbered product matrix element as shown in III of FIG.
Is virtually divided into matrices. These 4 × 8 matrices are then, in order, and
From column to column, it is provided to a transformer 8308 where a 4 × 4 DCT matrix A ′
Is combined with A 4 × 4 DCT matrix for each of the two 4 × 8 subproduct matrices
By multiplying A ′, two coefficient groups, each of 32 coefficients, are obtained,
Are supplied to an output terminal 8302 via a switching device 8309. Obvious from above
In this case, two fields in one block are separately converted.
Therefore, it is called an intra-field conversion. The value of the coefficient obtained in this way
Are not affected by the effects of motion in the image. As a result, 8 X 8 The product matrix P of the 64 coefficients to which the pixel of
Less coefficients need to be transferred than in the case where
You.   Next, the control circuit 8311 of FIG. 2 is provided to control the conversion circuit 83 shown in FIG.
Have been. This control circuit has a clock pulse generator 8312,
The generator generates a clock pulse S (rT) at a repetition frequency fs, while
As a pulling pulse to the sampling circuit 81 (FIG. 1) and on the other hand a pixel
It is supplied to the counter 8313. This pixel counter counts from zero to the image
It varies within a range equal to the number of pixels that make up the whole. New image processing
At the beginning, the pixel counter 8313 is supplied from the image signal source 2 (FIG. 1).
Reset by the frame reset pulse FRS. Pixel counter 83
The 13 counting positions are supplied as address information to two memories 8314 (1) and 8314 (2).
You. Each of these memories 8314 is composed of a ROM. More specifically, the memory 8314
(1) is address information in the order of reading pixels from the image memory 8303, that is,
Supply read address information. On the other hand, the memory 8314 (2) has the image memory 8303.
Address information in the order in which pixels are written to, ie, write address information
Is supplied.   The address information supplied by these memories 8314 includes AND gates 8315 and
The data is supplied to an address input terminal of the image memory 8303 via an OR gate 8316. new
Each time an image is read, the read and write address information supplied to the image memory 8303 is stored.
The frame reset pulse FRS is set to a T-type flip-flop so that the
Supplied to the top 8317. The Q output terminal of this flip-flop is Is output. These read / write commands are also supplied to ANDATE 8315
You.   Generates read and write address information for memories 8305 (1) and 8305 (2).
For this purpose, the clock pulse S (rT) is supplied to the counting circuit 831 of the modulo 64 counter, for example.
8 is also supplied. The counting position of this counting circuit is stored in a memory 8319 (1) composed of a ROM.
And 8319 (2). Other addresses in memory 8319 (1) The signal MD output from the motion detector 8310 is supplied to the input terminal. Note
The memory 8319 (1) outputs read address information for the memory 8305, and the memory 8319 (2)
Output write address information. When the signal MD is 0 (when no motion is detected)
A series of address information supplied by the memory 8319 (1) to the
Is different from the sequence of address information supplied when the motion is detected.
You.   These read / write address information are stored in AND gate 8320 and OR gate.
It is supplied to the address input terminal of the memory 8305 via the 8321. Memory 8305-64
Every time the product matrix elements are read or every time 64 product matrix elements are written
The read address information and the write address information supplied to the memory 8305 are input.
Alternatively, the counting position of counting circuit 8318 is provided to encoding network 8322
. This network outputs a pulse each time the counting circuit 8318 indicates a zero counting position.
. This pulse is supplied to a T-type flip-flop 8323. This flip-flop
The Q output terminal of the loop outputs a read / write command RW3,   The converters 8304, 8307 and 8308 may be configured in a manner known in the art.
However, it can be constructed in a manner as described in detail in Japanese Patent Application Laid-Open No. 62-269519 by the present applicant.
It is desirable to carry out.   FIG. 5 shows an example of the motion detector 8310. Source of operation of this detector
The theory is based on a vertical frequency measurement, which is illustrated in FIG.
It is shown to be a measure of Has a vertical orientation, for example a tree trunk
The image supplied when the video camera is pointed at the object is shown in FIG.
You. When the camera moves remarkably in the horizontal direction, it has a line structure as shown in II in FIG.
An image is obtained. Such a structure is such that first the odd rows of the image are scanned and then the even rows.
It happens because a few rows are scanned. Such line structures can cause local details in the image
However, it can be perceived even in an 8 × 8 pixel sub-image.   The high vertical frequency provided by such a line structure will result in a Fourier
It can be measured by performing d conversion. However, this sub-image
It is easier to do a Hadamard transform, in which case the presence of high vertical frequencies Is determined by the value of the coefficient y (1,8) indicating the degree of contribution of the basic image B (1,8) shown in III of FIG.
expressed. As can be easily derived from the relationships (2) and (3) above, the coefficient y (1,8)
Is obtained from the following relationship. In order to determine these coefficients, the image memories 8303 (1) and 8303 (2) (in FIG. 5, reference numeral 8303 (
The pixel value read from the.) Is directly or passed to the inverter stage 8310.1.
The polarity is reversed and supplied to the symbolically indicated switching device 8310.2.
It is supplied to the accumulator 310.3 via the switching device. This accumulator calculates the coefficient y
It outputs (1,8) and has an adder 8310.4 and a delay element 8310.5 as is known.
ing. The motion detector 8310 reads from the memory 8314 (1) (see FIG. 2).
It further has an encoding network 8310.6 for receiving the output address information. This d
Encoding network 8310.6 outputs two signals, Sign and Res, which are switches.
A switching device 8310.2 and a delay element 8310.5 are provided. The signal Res is
Except when the address information indicates the start of reading of the pixels of the new sub-image.
It is zero. At the time of the above exception, the signal Res is 1 and thus the delay element
8310.5 is reset. The signal Sign alternates between values of zero and one. Signal Si
When gn is 1, the inverted pixel value is supplied to the accumulator 8310.3 and the signal
If Sign is 0, the pixel value is provided directly to accumulator 8310.3. That is,
In the case of the read address information of the pixels in the odd-numbered rows of the sub-image, the signal Sign becomes 0.
In the case of the read address information of the pixels of the even-numbered rows of the sub-image, the signal Sign is 1
Becomes   The coefficient y (1,8) obtained in this manner is compared with the threshold value
This is compared with a threshold value Thr supplied from 8310.8. Therefore, this comparison circuit 8310.7
Is 0 when the above coefficient is smaller than the threshold, and 1 when the coefficient is opposite.
And outputs such a signal MD.   In the conversion circuit 83 shown in FIG. 2, how the motion detector 8310
Indicates what should be handled. In other words, this detector uses pixel blocks
Indicates whether to undergo intra-system or intra-field conversion. In order to prevent a lack of motion, the motion detector 8310 must be highly sensitive.
No. This means that, for example, in the motion detector shown in FIG.
This means that the threshold value Thr of 10.8 must be low. As a result,
The decision to perform an intra-field conversion may be made more rapidly than desired in terms of efficiency.
There is. To prevent this, read from image memory 8303 (1), 8303 (2).
The pixel value obtained is, as shown in FIG. 7, a so-called median filter 8.
Via 324 and switching device 8325 (shown symbolically) or delay circuit 8326
And the switching device 8325 to the converter 8304. Delay circuit 83
The delay time τ of 26 is equal to the time delay introduced by the median filter 8324.   The switching device 8325 can be used when there is no or very little image motion.
Is the output signal of the median filter 8324 is supplied to the converter 8304, and if the motion is large,
The output of the motion detector 8310 is set so that the output signal of the delay circuit 8326 is supplied to the converter 8304.
Controlled by the force signal MD.   Median filters are very well known in the art. Its general
Explanation from J. Willeyand Sons as A Willy-interscience publication
See pages 330 to 333 of Digital Image Processing by W.K.
And its implementation is described in detail in EP-A-0192292.
It is described in detail. In this regard, note the following. You
That is, for example, for the three pixels vertically overlapping in the sub-image,
The filter uses the pixel with the value closest to the average of these three pixels at its output.
Supply. Thus, this median filter is applied to successive fields of one image.
And do midline filtering. In other words, the median filter is an image that displays a still image.
Is output. The pixels supplied by this median filter are therefore
Only the intra-system conversion is performed.   When the image signal source 2 supplies an image signal obtained by scanning a film image,
Special situations arise. In this case, each group of two consecutive fields
It does not show the effect of any movement. This means that the motion detector 8
310 would detect motion only in one of two consecutive fields Means In this special case, this conversion circuit 83 is
Set to internal conversion mode or automatically set to this mode
do it. Adaptive encoder   The adaptive encoder 84 shown in FIG. 1 can take various forms. Very favorable implementation
An example is described in detail in U.S. Pat. No. 4,398,217, but FIG.
It will be described based on. The adaptive encoder 84 in FIG. 8 receives the coefficient y (i, k) of each block.
It is assumed that these coefficients occur from one to the next. this
The coefficients are supplied to a variable word length encoder 8402, which converts each coefficient to the appropriate
Convert to a word-length codeword. This word length is input via the control input terminal 8403.
Bit allocation element b supplied to encoder 8402_jIt is determined by (i, k). This
As described above, the variable word length encoder 8402 converts a code word having a variable word length into the adaptive encoding
To the output terminal 8404 of the power supply 84.   The coefficient y (i, k) is calculated not only by the variable word length encoder 8402 but also by the comparison / classification circuit 8.
It is also supplied to 405. A plurality of memories 8406 are connected to the comparison / classification circuit 8405.
ing. That is, the memory 8406 (j) of the ordinal number j stores the classification element c_jClassification with (i, k)
Group C_jI remember. These memories 8406 are divided into two groups. You
That is, the first group has memories 8406 (1) to 8406 (R), and the second group
Have memories 8406 (R + 1) to 8406 (R + M). Memory 8406 (1) to 8406 (R)
Is only when motion is detected in the sub-image, that is, the indication bit (switch
Signal) can be read out only when MD is 1, and memory 8406 (R + 1) to 8406
The content of (R + M) is only when no motion is detected in the sub-image,
It can be read out only when the value of MD is 0. For this purpose, the indication bit MD
Is received at the input terminal 8407 of the adaptive encoder 84, and the memories 8406 (1) to 8406 (
R) is directly supplied to the read permission terminal of
The data are supplied to the read permission terminals of the memory cells 8406 (R + 1) to 8406 (R + M).   Classification county C₁Or C_RHave (NXN) / 2 = 32 classification elements, and_{R + 1} Or C_{R + M}Have N XN = 64 classification elements each. Preferably, taxon C_j
Classification element C in_j(i, k) is the classification county C_{J + 1}Corresponding classification element C_{j + 1}less than (i, k)
No.   In the comparison / classification circuit 8405, each classification element C_j(i, k) is the coefficient block pair
Taxonomic groups larger than the corresponding coefficient y (i, k) are determined. In this case,
Is the classification element C in the j-th taxon in which the coordinates i, k of the coefficient y (i, k) are compared_j
That is, it is equal to the coordinates of (i, k). The comparison / classification circuit 8405 is the corresponding taxonomy
Is output as a classification word kl (j) corresponding to the classification bits described above.   The classification word kl (j) is supplied to the output terminal 8409 of the adaptive encoder 84.
, And the logic circuit 8410. Multiple memories 8412 are also connected to this logic circuit 8410
Have been. Each of these memories 8412 stores a bit allocation group. sand
That is, the bit allocation element b is stored in the memory 8412 (j) of the ordinal number j._jBit assignment with (i, k)
Group B_jIs stored.   These memories 8412 are also divided into two groups. That is, the first group
Have memory 8412 (1) through 8412 (R), and the second group is memory 8412 (R + 1).
It has a chair 8412 (R + M). The contents of the memory 8412 (1) to 8412 (R) are
Can be read out only when the MD is 1. Memory 8412 (R + 1) to 8412 (R + M)
Can be read out only when the instruction bit MD is 0.   Bit allocation group B₁Or B_REach have (NXN) / 2 = 32 bit allocation elements,
Bit allocation group B_{R + 1}Or B_{R + M}Have (NXN) = 64 bit allocation elements each
I have.   In the logic circuit 8410, the classification group Cl (j)_jTo
Corresponding bit allocation group B₁Is selected, and the element b of this bit allocation group_j(i, k)
Next, it is supplied to the variable word length encoder 8402.   As is clear from the above, the classification word kl (j) is obtained by the switch supplied from the motion detector 8310.
It is implicitly indicated whether the switching signal MD is 1 or 0. Therefore,
Need not necessarily be transferred to the decoding station II. Inversion circuit   In order to reproduce the sample values of the original image signal, the decoding circuit 10 (FIG. 1)
Inverse conversion circuit 103 using in-field conversion mode and in-frame conversion mode is provided.
Have been. This inverse transformation circuit receives each group of coefficients supplied from the encoding circuit 8 and
, Are subjected to an intra-field inverse transformation and / or an intra-frame inverse transformation. And
, Image signal samples obtained based on the in-field inverse transform to perform image display
Values or image signal sample values obtained based on the
It is selected according to the switching signal MD.   An embodiment of such an inverse conversion circuit is used for the signal conversion in the conversion circuit 83 shown in FIG.
Reverse the direction, delete the motion detector 8310, and read and write each memory
It can be obtained by replacing the command.   If the switching signal MD is not transferred, the classification word k is stored in the decoding station II.
l (j) is the taxon C₁Or C_ROutput a signal MD that is 1 if one of the
Synonym kl (j) is taxon C_{R + 1}Or C_{R + M}A signal MD that is 0 if it corresponds to one of
By providing a comparison circuit that outputs the signal, the signal MD can be generated.
Wear.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a schematic configuration of a video recorder to which an embodiment of a television system using transform coding according to the present invention is applied, and FIG. FIG. 3 is a block diagram showing an example of a conversion circuit in the television system of FIG. 3, FIG. 3 is an explanatory diagram showing an example of an image constituted by pixels and an example of a divided sub-image thereof, and FIG. FIG. 5 is an explanatory diagram showing an example of a product matrix and its divided subproduct matrix in FIG. 5, FIG. 5 is a block diagram showing an example of a motion detector used in the conversion circuit in FIG. 2, and FIG. FIG. 7 is an explanatory diagram showing some examples of an image and a sub-image for explaining the operation of the motion detector shown in FIG. 7. FIG. 7 shows a case where a median filter of the conversion circuit shown in FIG. 2 is used. FIG. 8 is a block diagram showing another example, FIG. Is a block diagram showing an example of an adaptive encoder for use in the indicated coding circuit. I: coding station, II: decoding station, 2: image signal source, 8: coding circuit, 9: modulation circuit, 10: decoding circuit, 11: demodulator, 81: sampling circuit, 83: conversion circuit, 84 ... Adaptive encoder, 85 ... Time division multiplexer circuit, 101 ... Demultiplexer circuit, 1
02 ... Adaptive decoder, 103 ... Inverse conversion circuit, 105 ... Low-pass filter, 8303 (.) ... Image memory, 8304 ... Converter, 8305 (.) ... Memory, 8307 ... Converter, 8308 ... Converter, 8310
... Motion detector, 8311 ... Control circuit, 8324 ... Median filter.

Claims (1)

Claims: 1. A digitized television signal is transferred from a coding station to a decoding station, to which an image signal is supplied and a sampled value of the image signal. An encoding circuit for performing two-dimensional transform encoding such as transforming a two-dimensional block into each group of coefficients to be transferred to the decoding station is provided, and the encoding station is provided with each block of the received coefficient. A television system in which an encoding circuit for performing an inverse transformation for transforming each coefficient group into a block of image signal sample values corresponding to each original group of the image signal sample values is provided. The conversion circuit comprises an intra-field conversion mode in which blocks of successive fields of the image are transmitted individually and an intra-frame conversion mode in which said blocks of successive fields are combined into a single two-dimensional block. A conversion circuit having both modes of operation, wherein said image signal is supplied and an object in said image is detected within one group of image signal sample values to be converted between two successive fields of the image. A motion detector that generates an indication signal indicating whether or not the displacement has been performed, and based on the indication signal, when there is such a displacement, a coefficient obtained in the intra-field conversion mode is used. Means for selecting, and when there is no displacement as described above, means for selecting a coefficient obtained by the intra-frame conversion, and decoding the coefficient selected by the selecting means and an auxiliary signal representing the instruction signal. Means for transferring to a station, wherein the decoding circuit is provided with the received coefficients and an intra-field inverse transform mode in which blocks of successive fields of the image are individually obtained; An inverse conversion circuit having both operation modes of an in-frame inverse conversion mode in which a single block having the block of the continuous field is obtained; and reproducing the instruction signal based on the auxiliary signal and displaying an image. Means for selecting an image signal sample value obtained in the intra-field inverse transform mode or an image signal sample value obtained by the intra-frame inverse transform based on the instruction signal. Television system. 2. An encoding station for use in a television system according to claim 1, wherein an image signal is supplied and each group of image signal sample values is transferred to a decoding station. In an encoding station having an encoding circuit for converting into a group, the encoding circuit comprises: a conversion circuit having both an intra-field conversion mode and an intra-frame conversion mode; and A motion detector for generating an indication signal indicating whether an object in the image has undergone a detectable displacement within one group of image signal samples to be converted between two consecutive fields; Based on the instruction signal, if there is such a displacement, select the coefficient obtained in the intra-field conversion mode and transfer it to the decoding station; if there is no such displacement, The frame Means for selecting coefficients obtained by intra-frame conversion and transferring the coefficients to the decoding station. 3. The encoding station according to claim 2, wherein said encoding circuit further comprises a filter device for applying a median filter to image signal sample values of two consecutive fields of the image. An encoding station, wherein only the intra-frame conversion is performed on output sample values. 4. A decoding station for use in a television system according to claim 1, or a decoding station for receiving a coefficient group supplied from an encoding station according to claim 2 or 3. And a decoding circuit for performing an inverse transform on each group of the received coefficients to convert each of the coefficient groups into an image signal sample value group corresponding to the original image signal sample value group. In the station, the decoding circuit is supplied with the received coefficient group, and operates using both an in-field inversion mode and an in-frame inversion mode, and an inversion circuit for reproducing the instruction signal. Means for selecting an image signal sample value obtained in the in-field inverse transform mode or an image signal sample value obtained by the in-frame inverse transform based on the instruction signal in order to perform image display. Decoding station, characterized in that it comprises a.