JP2020038960A - Solid-state imaging element - Google Patents

Abstract

To provide a solid-state imaging element capable of improving efficiency of focusing on a photoelectric conversion section.SOLUTION: A solid-state imaging element 100 includes: a semiconductor substrate 10; a photoelectric conversion unit 11 provided on the semiconductor substrate 10; a laminated body 20 that is positioned above the semiconductor substrate 10 and includes a plurality of wiring layers 21 and an interlayer insulating film 22 positioned between the plurality of wiring layers 21; and a waveguide 30 that penetrates at least part of the laminated body 20 and introduces light into the photoelectric conversion section 11. A diameter of the waveguide 30 increases as a distance from the photoelectric conversion unit 11 in a stacking direction increases. An enlargement ratio of a diameter of a first waveguide portion 31 in the waveguide 30 is larger than that of the diameter of a second waveguide portion 32 in the waveguide 30 closer to the photoelectric conversion portion 11 than the first waveguide portion 31.SELECTED DRAWING: Figure 1

Description

  The present disclosure relates to a solid-state imaging device, and in particular, to a solid-state imaging device having a charge storage unit and a waveguide in a unit pixel.

  In recent years, as one of photodetectors for detecting weak light, a photon-counting photodetector using an avalanche photodiode has been developed. Patent Document 1 discloses a technique related to a photodiode.

JP 2013-207321 A

  The present disclosure provides a solid-state imaging device that can improve the efficiency of light collection on a photoelectric conversion unit.

  A solid-state imaging device according to an embodiment of the present disclosure includes a semiconductor substrate, a photoelectric conversion unit provided on the semiconductor substrate, and a position located above the semiconductor substrate, between a plurality of wiring layers and the plurality of wiring layers. A stacked body including an interlayer insulating film located therein, and a waveguide for penetrating at least a part of the stacked body, for introducing light into the photoelectric conversion unit; and a diameter of the waveguide in the stacking direction. The larger the distance from the photoelectric conversion unit, the larger the expansion rate of the diameter of the first waveguide portion of the waveguide, the second waveguide portion of the waveguide closer to the photoelectric conversion portion than the first waveguide portion. It is larger than the enlargement ratio of the diameter in.

  According to the present disclosure, a solid-state imaging device in which the efficiency of light collection on the photoelectric conversion unit is improved is realized.

FIG. 1 is a sectional view of the solid-state imaging device according to the first embodiment. FIG. 2A is a first cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 2B is a second cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 2C is a third sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 2D is a fourth sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 2E is a fifth sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 2F is a sixth sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 1. FIG. 3 is a cross-sectional view of a solid-state imaging device according to a first modification of the first embodiment. FIG. 4 is a cross-sectional view of a solid-state imaging device according to a second modification of the first embodiment. FIG. 5A is a first cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to Modification 2 of Embodiment 1. FIG. 5B is a second sectional view illustrating the method for manufacturing the solid-state imaging device according to Modification 2 of Embodiment 1. FIG. 5C is a third sectional view illustrating the method for manufacturing the solid-state imaging device according to Modification 2 of Embodiment 1. FIG. 5D is a fourth sectional view illustrating the method for manufacturing the solid-state imaging device according to Modification 2 of Embodiment 1. FIG. 5E is a fifth sectional view showing the method for manufacturing the solid-state imaging device according to Modification 2 of Embodiment 1. FIG. 6 is a cross-sectional view of the solid-state imaging device according to the second embodiment. FIG. 7A is a first cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 2. FIG. 7B is a second cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 2. FIG. 7C is a third sectional view illustrating the method for manufacturing the solid-state imaging device according to Embodiment 2. FIG. 8 is a cross-sectional view of a solid-state imaging device according to a modification of the second embodiment. FIG. 9A is a first cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to the modification of the second embodiment. FIG. 9B is a second cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to the modification of the second embodiment. FIG. 9C is a third cross-sectional view illustrating the method for manufacturing the solid-state imaging device according to the modification of the second embodiment. FIG. 9D is a fourth sectional view illustrating the method for manufacturing the solid-state imaging device according to the modified example of the second embodiment.

(Knowledge underlying the present disclosure)
In recent years, as one of photodetectors that detect weak light, a photon-count photodetector using an avalanche photodiode (APD) has been developed. The APD is a photodiode whose photocurrent is multiplied when a predetermined reverse voltage is applied. In a solid-state imaging device including a photodiode such as an APD as a photoelectric conversion unit, an issue is to increase the efficiency of light collection to the photoelectric conversion unit.

  In the APD, in the Geiger multiplication mode, when one photon causes photoelectric conversion, avalanche breakdown occurs, and the output current increases rapidly. For this reason, a charge storage unit for storing the signal charges multiplied by the avalanche breakdown is required.

  However, the charge storage section having a sufficiently large capacitance value has a large occupied area. Then, as a result, the area occupied by the charge storage unit increases, and the area of the APD may decrease. Therefore, in the solid-state imaging device, there is room for study on the arrangement of the charge storage unit.

  Hereinafter, embodiments of a solid-state imaging device invented in view of these problems will be described with reference to the drawings. Each of the embodiments described below shows a comprehensive or specific example. Numerical values, shapes, materials, constituent elements, arrangement positions of constituent elements, connection forms, and the like shown in the following embodiments are examples, and do not limit the present disclosure. In addition, among the components in the following embodiments, components not described in the independent claims indicating the highest concept are described as arbitrary components.

  Each drawing is a schematic diagram, and is not necessarily strictly illustrated. In each of the drawings, substantially the same components are denoted by the same reference numerals, and duplicate description may be omitted or simplified.

  In the drawings used in the following embodiments, coordinate axes may be shown. The Z-axis direction of the coordinate axes is, for example, a vertical direction, the + Z-axis side is expressed as an upper side (upper), and the −Z-axis side is expressed as a lower side (lower). In other words, the Z-axis direction is a direction perpendicular to the main surface of the semiconductor substrate, and is also expressed as a laminating direction or a thickness direction of the semiconductor substrate. The X-axis direction and the Y-axis direction are directions orthogonal to each other on a plane (horizontal plane) perpendicular to the Z-axis direction. The X-axis direction is also expressed as a horizontal direction or a horizontal direction, and the Y-axis direction is expressed as a vertical direction or a vertical direction. In the following embodiments, “plan view” means viewing from the Z-axis direction. Further, the present disclosure does not exclude a structure in which the conductivity type is reversed, which is described in the following embodiments.

(Embodiment 1)
[Constitution]
Hereinafter, the configuration of the solid-state imaging device according to the first embodiment will be described with reference to the drawings. FIG. 1 is a sectional view of the solid-state imaging device according to the first embodiment. FIG. 1 is a cross-sectional view of a portion corresponding to a unit pixel in the solid-state imaging device 100.

  As shown in FIG. 1, the solid-state imaging device 100 according to the first embodiment includes a semiconductor substrate 10, a stacked body 20, and a waveguide 30.

  The semiconductor substrate 10 is formed of, for example, silicon (Si). The conductivity type of the semiconductor substrate 10 may be p-type or n-type. In the following first embodiment, the upper main surface of the semiconductor substrate 10 is also described as a light incident surface or a light receiving surface.

  The photoelectric conversion unit 11 and the floating diffusion unit 12 are provided inside the semiconductor substrate 10. The floating diffusion unit is, in other words, a floating diffusion unit or an FD (Floating Diffusion) unit.

  The photoelectric conversion unit 11 is located relatively above the inside of the semiconductor substrate 10. The photoelectric conversion unit 11 is formed by a photodiode. The photodiode here includes an avalanche photodiode.

  The floating diffusion unit 12 temporarily stores one of the charges (electrons and holes) generated in the photoelectric conversion unit 11 when light enters the photoelectric conversion unit 11. The floating diffusion unit 12 is disposed relatively above the inside of the semiconductor substrate 10 with a gap from the photoelectric conversion unit 11.

  On the upper main surface of the semiconductor substrate 10, a stacked body 20 is arranged. The stacked body 20 includes a plurality of wiring layers 21, a plurality of interlayer insulating films 22, a plurality of liner layers 23, a plurality of vias 24, and a charge storage unit 25. The height h of the stacked body 20 (that is, the length from the main surface of the semiconductor substrate 10 to the upper surface of the stacked body 20) is, for example, 1.6 μm.

  Note that the laminate 20 includes a first laminate 26 located around the first waveguide 31 (in other words, a side) and a second laminate 27 located around the second waveguide 32. Including.

  The wiring layer 21 is a layer on which wiring forming a circuit included in the solid-state imaging device 100 is formed. The wiring layer 21 is formed of, for example, copper (Cu). The wiring layer 21 may be formed of another metal such as aluminum (Al) or tungsten (W).

The interlayer insulating film 22 is located between the wiring layers 21 and insulates the wiring layers 21. The interlayer insulating film 22 is formed of, for example, silicon oxide (SiO _x ).

  The liner layer 23 is a layer located between the plurality of interlayer insulating films 22. The liner layer 23 is formed of, for example, silicon oxynitride (SiON) or silicon carbonitride (SiCN).

  The via 24 is a connection hole for electrically connecting the plurality of wiring layers 21. The via 24 is formed of, for example, copper. The via 24 may be formed of another metal such as aluminum or tungsten.

  The charge storage unit 25 is a capacitive element that is located inside the multilayer body 20 and on the side of the first waveguide unit 31 and stores the charge generated in the photoelectric conversion unit 11. The charge generated in the photoelectric conversion unit 11 is stored in the charge storage unit 25 via the floating diffusion unit 12.

  The charge storage unit 25 has an upper electrode, a lower electrode, and a capacitance film located between the upper electrode and the lower electrode. Each of the upper electrode and the lower electrode is formed of, for example, titanium nitride (TiN), tantalum nitride (TaN), titanium (Ti), tantalum (Ta), or the like. In other words, the capacitance film is a dielectric film, and is formed of, for example, a high dielectric film (High-k) such as silicon nitride (SiN), hafnium oxide (HfO), or zirconium oxide (ZrO).

  The waveguide 30 is a waveguide that penetrates at least a part of the stacked body 20 and that introduces light to the photoelectric conversion unit 11. In the example of FIG. 1, the interlayer insulating film 22 is located between the waveguide 30 and the semiconductor substrate 10, but the waveguide 30 may reach the main surface of the semiconductor substrate 10. The three-dimensional shape of the waveguide 30 is substantially a truncated quadrangular pyramid.

  The waveguide 30 is formed of an insulating material having a high refractive index. Specifically, the waveguide 30 is formed of, for example, silicon nitride (SiN), silicon oxynitride, or silicon nitride such as silicon carbonitride. If silicon nitride is used among these materials, the refractive index of the waveguide 30 can be increased.

  The diameter (in other words, the width) of the waveguide 33 in the cross-sectional view increases as the distance from the photoelectric conversion unit 11 increases in the stacking direction. For example, the diameter W3 of the waveguide 33 at the lowermost part closest to the photoelectric conversion unit 11 is about 4.8 μm, and the diameter W2 of the waveguide 33 at the middle part is about 4.9 μm. The diameter W1 of the waveguide 30 at the farthest uppermost portion is 5.84 μm.

  The waveguide 30 includes a first waveguide 31 and a second waveguide 32 located between the first waveguide 31 and the semiconductor substrate 10 and closer to the photoelectric conversion unit 11 than the first waveguide 31 is. including. The expansion rate of the diameter in the first waveguide section 31 is larger than the expansion rate of the diameter in the second waveguide section 32. The “enlargement ratio of the diameter of the waveguide 30” refers to the diameter of the waveguide 30 with respect to the displacement of the waveguide 30 in the upward direction in the stacking direction (in other words, the displacement of the waveguide 30 in the direction away from the photoelectric conversion unit 11). It means the rate of change. The enlargement ratio of the diameter of the waveguide 30 indicates, for example, how much the diameter increases when the position in the stacking direction changes upward by 1 μm.

  In the cross-sectional view of FIG. 1, the magnification is expressed by an angle θ of the side surface of the waveguide 30 with respect to the main surface of the semiconductor substrate 10 (that is, a plane perpendicular to the stacking direction). When the rate of expansion of the diameter of the first waveguide 31 is greater than the rate of expansion of the diameter of the second waveguide 32, the angle θ1 of the side surface of the first waveguide 31 is Is smaller than the angle θ2. The angle θ1 is, for example, about 60 °, and the angle θ2 is, for example, about 80 °. The enlargement ratio of the diameter of the waveguide 30 is usually larger than 0 (that is, θ1, θ2 <90 °), but the enlargement ratio of the diameter of the second waveguide portion 32 is 0 or very close to 0 (that is, θ2 ≒ 90 °). In this case, in the cross-sectional view, the shape of the second waveguide 32 is a shape close to a rectangle or a square.

  As described above, the diameter of the waveguide 30 increases as the distance from the photoelectric conversion unit 11 increases in the stacking direction as a whole, and further increases more steeply in the first waveguide 31 than in the second waveguide 32. Thus, the space of the wiring layer 21 for forming a circuit on the semiconductor substrate 10 is ensured below the solid-state imaging device 100 because the diameter of the waveguide 30 is relatively small. Since the diameter of the waveguide 30 is relatively large above the solid-state imaging device 100, a frontage for taking in light is secured, and the efficiency of light collection to the photoelectric conversion unit 11 is increased.

  For example, in the solid-state imaging device 100, a part of the charge storage unit 25 overlaps the first waveguide unit 31 in a plan view. In other words, the charge storage unit 25 and the first waveguide unit 31 cross three-dimensionally. As described above, if the charge accumulation unit 25 is arranged on the side of the region where the diameter of the waveguide 30 is relatively small, the size of the solid-state imaging device can be reduced.

  Note that the charge storage unit 25 may be arranged anywhere inside the stacked body 20. As in the solid-state imaging device 100, the charge storage unit 25 is located immediately above the floating diffusion unit 12, and if a part of the charge storage unit 25 overlaps with the floating diffusion unit 12 in a plan view, the floating diffusion unit 12 and the charge It is possible to shorten an electrical connection path (a path formed by the wiring and the via 24) between the storage units 25.

[Production method]
Next, a method for manufacturing the solid-state imaging device 100 will be described with reference to FIGS. 2A to 2F. 2A to 2F are cross-sectional views illustrating a method for manufacturing the solid-state imaging device 100.

  First, as shown in FIG. 2A, the photoelectric conversion unit 11 and the floating diffusion unit 12 are formed on the semiconductor substrate 10, and the second stacked body 27 is formed on the semiconductor substrate 10.

  The ion implantation method is used for forming the photoelectric conversion unit 11 and the floating diffusion unit 12. By performing ion implantation from the main surface side of the semiconductor substrate 10 formed of silicon, the photoelectric conversion unit 11 and the floating diffusion unit 12 are formed relatively inside the semiconductor substrate 10.

  The second laminate 27 is formed by the following procedure. First, a Cu multilayer wiring structure is formed on the main surface of the semiconductor substrate 10 on which the photoelectric conversion unit 11 and the floating diffusion unit 12 are formed by a dual damascene method.

  In the dual damascene method, after forming an original wiring layer, a liner layer 23 and an interlayer insulating film 22 are deposited by a chemical vapor deposition (CVD) method.

  Subsequently, wiring trenches and vias are patterned by lithography. Thereafter, a trench and a via are formed inside the interlayer insulating film 22 by a dry etching method. Subsequently, a barrier film for suppressing the diffusion of Cu and a Cu seed layer for flowing a current during electrolytic plating are formed on the inner wall surfaces of the trenches and vias by physical vapor deposition (PVD). Is deposited. Thereafter, a Cu film is embedded in the trench and the via by the Cu electrolytic plating method.

  Further, the surplus Cu film and the barrier film on the surface of the wiring layer are removed by a chemical mechanical polishing (CMP) method, so that the final wiring layer 21 is formed. By repeatedly performing this process, a Cu multilayer wiring structure having a desired number of wiring layers 21 can be obtained. That is, the second laminated body 27 is formed by the dual damascene method.

  Next, as shown in FIG. 2B, a hole 42 for the second waveguide 32 is formed. The hole 42 is formed in the following procedure.

  A resist film (not shown) for forming the hole 42 is deposited on the uppermost interlayer insulating film 22 of the second stacked body 27 by lithography, and dry etching is performed using the deposited resist film as a mask. Is performed. Thereby, a hole 42 is formed in the second stacked body 27. At this time, the etching conditions are determined so that the inclination angle of the side surface of the hole 42 is about 80 °. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. Thereafter, the resist film is removed by performing ashing.

  Next, as shown in FIG. 2C, the second waveguide 32 is formed. First, an insulating material having a high refractive index is deposited in the hole 42 by the CVD method. The insulating material having a high refractive index is, for example, silicon nitride, silicon oxynitride, silicon carbonitride, or the like. If silicon nitride is used among these materials, the refractive index of the waveguide 30 can be increased. Thereafter, the surface of the deposited high-refractive-index insulating film is planarized by the CMP method. As a result, the second waveguide 32 is formed.

  Next, as shown in FIG. 2D, the first laminate 26 is formed. First, the charge storage portion 25 located inside the first stacked body 26 is formed by the following procedure.

By using the PVD method and the CVD method, an electrode film and a capacitance film that are the source of the charge storage unit 25 are deposited. Subsequently, the charge storage unit 25 is formed by lithography and dry etching. For example, a chlorine (Cl ₂ ) -based etching gas is used for etching the electrode film, and a fluorine (F) -based etching gas is used for etching the capacitance film, for example. Thereafter, the resist film is removed by performing ashing. After that, similarly to the second stacked body 27, the first stacked body 26 is formed by the dual damascene method.

  Next, as shown in FIG. 2E, a hole 41 for the first waveguide 31 is formed. The hole 41 is formed in the following procedure.

  A resist film (not shown) for forming the hole 41 is deposited on the top liner layer 23 of the first stacked body 26 by lithography, and dry etching is performed using the deposited resist film as a mask. Done. Thereby, the hole 41 is formed in the first laminate 26. At this time, the etching conditions are determined so that the inclination angle of the side surface of the hole 41 is about 60 °. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. Thereafter, the resist film is removed by performing ashing.

  Next, as shown in FIG. 2F, the first waveguide unit 31 is formed. First, an insulating material having a high refractive index is deposited in the hole 41 by the CVD method. The insulating material having a high refractive index is, for example, silicon nitride, silicon oxynitride, silicon carbonitride, or the like. If silicon nitride is used among these materials, the refractive index of the waveguide 30 can be increased. Thereafter, the surface of the deposited high-refractive-index insulating material is planarized by the CMP method. As a result, the first waveguide 31 is formed.

  According to the manufacturing method as described above, by forming the waveguide 30 in two stages, the enlargement ratio of the diameter of the first waveguide portion 31 and the enlargement ratio of the diameter of the second waveguide portion 32 are improved. Can be different. That is, the angle θ1 of the side surface of the first waveguide 31 and the angle θ2 of the side surface of the second waveguide 32 can be made different.

[Modification 1]
In the solid-state imaging device 100, the first waveguide portion 31 and the second waveguide portion 32 are formed of the same insulating material, but the first waveguide portion 31 and the second waveguide portion 32 have different insulating properties. It may be formed by a material. FIG. 3 is a cross-sectional view of the solid-state imaging device according to the first modification of the first embodiment. The following description of the solid-state imaging device 100a according to the first modification of the first embodiment focuses on the differences from the solid-state imaging device 100, and the same configuration as the solid-state imaging device 100 will be described in detail. Description is omitted.

  The waveguide 30a provided in the solid-state imaging device 100a illustrated in FIG. 3 includes a first waveguide 31 and a second waveguide 32a closer to the photoelectric conversion unit 11 than the first waveguide 31.

  Similarly to the solid-state imaging device 100, the first waveguide portion 31 included in the solid-state imaging device 100 is formed of a high-refractive-index insulating material such as silicon nitride, silicon oxynitride, or silicon carbonitride. On the other hand, the second waveguide 32a is formed of an insulating material having a low refractive index. The insulating material having a low refractive index is, for example, tetraethyl orthosilicate (TEOS).

  When the entire waveguide 30 is formed of a high-refractive-index insulating material as in the solid-state imaging device 100, the stacked body 20 may be damaged due to a stress-induced voiding phenomenon (Stress Induced Phenomena) or the like. In the solid-state imaging device 100a, since the internal stress is small in a part of the waveguide 30a and a low-refractive insulating material capable of reducing the stress load on the multilayer body 20 is used, the multilayer body 20 is formed by the stress-induced void phenomenon. Can be prevented from being damaged.

  In the solid-state imaging device 100, an insulating material having a low refractive index may be used for the first waveguide 31 and an insulating material having a high refractive index may be used for the second waveguide 32. However, by using a low-refractive-index insulating material for the second waveguide portion 32a, which is considered to have a small contribution to light collection like the solid-state imaging device 100a, it is possible to suppress a decrease in light collection efficiency. Can be.

[Modification 2]
The boundary between the first waveguide unit 31 and the second waveguide unit 32 is not limited to the position as in the solid-state imaging device 100. FIG. 4 is a cross-sectional view of a solid-state imaging device according to a second modification of the first embodiment. In the following description of the solid-state imaging device 100d according to the second modification of the first embodiment, description will be made focusing on differences from the solid-state imaging device 100, and the same configuration as the solid-state imaging device 100 will be described in detail. Description is omitted.

  In the solid-state imaging device 100d illustrated in FIG. 4, the boundary between the first waveguide 31 and the second waveguide 32 is such that the entire first waveguide 31 is located above the charge storage unit 25. Stipulated. 5A and 5B are cross-sectional views illustrating a method for manufacturing the solid-state imaging device 100d.

  First, as shown in FIG. 5A, the second stacked body 27 and a part of the first stacked body 26 are formed by a dual damascene method. At this time, the charge storage section 25 is completed. Next, a hole 42 is formed as shown in FIG. 5B, and a second waveguide 32 is formed as shown in FIG. 5C. The method of forming the hole 42 and the second waveguide 32 is the same as that of the solid-state imaging device 100.

  Next, as shown in FIG. 5D, the remaining portion of the first stacked body 26 is formed by a dual damascene method. Then, as shown in FIG. 5E, a hole 41 is formed, and as shown in FIG. 4, the first waveguide 31 is formed. The method of forming the hole 41 and the first waveguide 31 is the same as that of the solid-state imaging device 100.

  The method for manufacturing the solid-state imaging device 100d as described above can be more simplified in terms of process than the method for manufacturing the solid-state imaging device 100. That is, the solid-state imaging device 100d can be manufactured by a simpler manufacturing process than the solid-state imaging device 100.

[Effects]
As described above, the solid-state imaging device 100 includes the semiconductor substrate 10, the photoelectric conversion unit 11 provided on the semiconductor substrate 10, and the plurality of wiring layers 21 and the plurality of wiring layers 21 located above the semiconductor substrate 10. A laminate 20 including an interlayer insulating film 22 located therebetween and a waveguide 30 penetrating at least a part of the laminate 20 for introducing light into the photoelectric conversion unit 11. The diameter of the waveguide 30 increases as the distance from the photoelectric conversion unit 11 increases in the stacking direction. The expansion ratio of the diameter of the first waveguide 31 of the waveguide 30 is larger than the expansion ratio of the diameter of the second waveguide 32 closer to the photoelectric conversion unit 11 than the first waveguide 31 of the waveguide 30. large.

  In such a solid-state imaging device 100, the space of the wiring layer 21 for configuring a circuit included in the solid-state imaging device 100 is secured because the diameter of the waveguide 30 is relatively small in the vicinity of the photoelectric conversion unit 11. Since the diameter of the waveguide 30 is relatively large at a position distant from the photoelectric conversion unit 11, an opening for taking in light is secured, and the efficiency of light collection on the photoelectric conversion unit 11 is increased.

  In addition, for example, a charge storage unit 25 that is located inside the stacked body 20 and on the side of the first waveguide unit 31 and stores charges generated in the photoelectric conversion unit 11 is provided.

  Such a solid-state imaging device 100 can accumulate the charge generated in the photoelectric conversion unit 11 in the charge accumulation unit 25 located on the side of the first waveguide unit 31.

  In addition, for example, a part of the charge storage unit 25 overlaps the first waveguide unit 31 in a plan view.

  As described above, if the charge storage unit 25 and the first waveguide unit 31 intersect three-dimensionally, the size of the solid-state imaging device 100 can be reduced.

  Further, for example, the solid-state imaging device 100 further includes a floating diffusion unit 12 provided on the semiconductor substrate 10. The charge generated in the photoelectric conversion unit 11 is stored in the charge storage unit 25 via the floating diffusion unit 12. In plan view, a part of the charge storage unit 25 overlaps with the floating diffusion unit 12.

  As described above, when the charge storage unit 25 and the floating diffusion unit 12 intersect three-dimensionally, an electrical connection path between the floating diffusion unit 12 and the charge storage unit 25 can be shortened.

  In addition, for example, the first waveguide 31 and the second waveguide 32 are formed of the same material.

  Thereby, since the refractive index does not change at the boundary between the first waveguide portion 31 and the second waveguide portion 32, it is possible to suppress the reflection of light at the boundary. Therefore, the efficiency of light collection on the photoelectric conversion unit 11 is improved.

  Further, for example, the first waveguide portion 31 and the second waveguide portion 32 are formed of silicon nitride.

  In such a solid-state imaging device 100, the efficiency of light collection on the photoelectric conversion unit 11 can be improved by the waveguide 30 formed of silicon nitride.

  In the solid-state imaging device 100a, the first waveguide 31 and the second waveguide 32a are formed of different materials.

  Thereby, when a strong internal stress is generated in the waveguide 30 formed of a single material, the internal stress can be relaxed and the damage of the stacked body 20 can be suppressed.

  The refractive index of the first waveguide 31 is larger than the refractive index of the second waveguide 32a.

  Accordingly, when a strong internal stress is generated in the waveguide 30 formed of a single material having a high refractive index, the internal stress can be relaxed and the damage to the stacked body 20 can be suppressed.

  In addition, for example, the first waveguide 31 is formed of silicon nitride, and the second waveguide 32a is formed of tetraethyl orthosilicate.

  In such a solid-state imaging device 100a, the efficiency of light collection on the photoelectric conversion unit 11 can be improved by the waveguide 30a formed of silicon nitride and tetraethyl orthosilicate.

  Further, in the solid-state imaging device 100d, the entire first waveguide section 31 is located above the charge storage section 25.

  Such a solid-state imaging device 100d can be manufactured by a simpler manufacturing process than the solid-state imaging device 100.

(Embodiment 2)
[Constitution]
Hereinafter, the configuration of the solid-state imaging device according to the second embodiment will be described with reference to the drawings. FIG. 6 is a cross-sectional view of the solid-state imaging device according to the second embodiment. FIG. 6 is a cross-sectional view of a portion corresponding to a unit pixel in the solid-state imaging device 100b according to the second embodiment. In the following, the second embodiment will be described focusing on differences from the first embodiment, and a detailed description of already-explained items will be omitted.

  As shown in FIG. 6, the solid-state imaging device 100b includes a semiconductor substrate 10, a stacked body 20, a waveguide 30b, and a sidewall 50b. That is, the solid-state imaging device 100b is different from the solid-state imaging device 100 and the solid-state imaging device 100a mainly in including the sidewall portion 50b.

  The side wall part 50b is located between the first waveguide part 31b and the laminated body 20, and surrounds the first waveguide part 31b from the side. The sidewall portion 50b has a structure for introducing light into the waveguide 30b. The sidewall portion 50b is formed of a low-refractive-index insulating material. The insulating material having a low refractive index is, for example, tetraethyl orthosilicate or the like.

  According to such a sidewall portion 50b, since light is guided to the waveguide 30b by reflection at the sidewall portion 50b, scattering of the light and incidence on the stacked body 20 is suppressed. That is, the efficiency of light collection on the photoelectric conversion unit 11 is improved.

  In addition, if the high refractive index insulating material used for the waveguide 30b is reduced by the sidewall portion 50b, it is possible to suppress the laminate 20 from being damaged by the stress-induced void phenomenon.

  In the cross-sectional view of the solid-state imaging device 100b, the side wall of the first waveguide portion 31b is curved, but also in this case, the waveguide 30b and the first waveguide portion 31b are steeper than the second waveguide portion 32. It can be said that it is expanding. That is, the expansion ratio of the diameter of the first waveguide portion 31b is larger than the expansion ratio of the diameter of the second waveguide portion 32.

[Production method]
Next, a method for manufacturing the solid-state imaging device 100b will be described with reference to FIGS. 7A to 7C. 7A to 7C are cross-sectional views illustrating a method for manufacturing the solid-state imaging device 100b.

  Steps until the first stacked body 26 is formed are the same as the steps described with reference to FIGS. 2A to 2D. After the first stacked body 26 is formed, a hole 41b is formed as shown in FIG. 7A. The hole 41b is formed by the following procedure.

  A resist film (not shown) for forming the hole 41b is deposited on the top liner layer 23 of the first laminate 26 by lithography, and dry etching is performed using the deposited resist film as a mask. Done. Thereby, the hole 41b is formed in the first laminate 26. In the manufacture of the solid-state imaging device 100b, the inclination angle of the side surface of the hole 41b does not need to be smaller than the inclination angle of the side surface of the second waveguide 32. Therefore, the etching conditions are determined so that the inclination angle of the side surface of the hole 41b is approximately 80 °, similarly to the inclination angle of the side surface of the second waveguide portion 32. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. Thereafter, the resist film is removed by performing ashing.

  Next, as shown in FIG. 7B, a sidewall forming film 50 is deposited on the uppermost surface of the first stacked body 26 and the surface of the first stacked body 26 where the holes 41b are formed by using the CVD method. . As the sidewall forming film 50, for example, tetraethyl orthosilicate is used.

  Next, as shown in FIG. 7C, a portion of the sidewall forming film 50 located on the uppermost surface of the first stacked body 26 and a portion located on the second waveguide 32 are formed by dry etching. Completely removed. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. As a result, a sidewall portion 50b is formed on the side of the hole 41b.

  Next, the first waveguide portion 31b is formed. First, an insulating material having a high refractive index is deposited in the hole 41b by the CVD method. The insulating material having a high refractive index is, for example, silicon nitride, silicon oxynitride, silicon carbonitride, or the like. If silicon nitride is used among these materials, the refractive index of the waveguide 30b can be increased. Thereafter, the surface of the deposited high-refractive-index insulating material is planarized by the CMP method. As a result, as shown in FIG. 6, the first waveguide 31b is formed.

  According to the manufacturing method described above, by forming the waveguide 30b in two stages, the sidewall 50b can be formed on the side of the first waveguide 31b. According to the side wall portion 50b, since light is guided to the waveguide 30b by reflection at the side wall portion 50b, scattering of light and incidence on the stacked body 20 is suppressed. That is, the efficiency of light collection on the photoelectric conversion unit 11 is improved.

  Further, in the manufacturing method of the second embodiment, it is not necessary to make the inclination angle of the side surface of the hole 41b smaller than the inclination angle of the side surface of the second waveguide portion 32, so that the dry etching process can be simplified. .

[Modification]
In the solid-state imaging device 100b, the side wall portion 50b is provided only between the first waveguide portion 31b and the stacked body 20. However, the sidewall portion 50b may be located between the first waveguide portion 31b and the stacked body 20 and between the second waveguide portion 32 and the stacked body 20. FIG. 8 is a cross-sectional view of a solid-state imaging device according to a modification of the second embodiment. In the following description of the solid-state imaging device 100c according to the modification of the second embodiment, a description will be given focusing on differences from the solid-state imaging device 100b, and the same configuration as the solid-state imaging device 100b will be described in detail. Is omitted.

  The side wall portion 50c included in the solid-state imaging device 100a illustrated in FIG. 3 is located across the side of the first waveguide 31b and the side of the second waveguide 32. 9A to 9D are cross-sectional views illustrating a method for manufacturing the solid-state imaging device 100c.

  First, as shown in FIG. 9A, the laminated body 20 (the first laminated body 26 and the second laminated body 27 is formed by a dual damascene method. Next, as shown in FIG. 9B, a hole 40c is formed. The hole 40c is formed by the following procedure.

  A resist film (not shown) for forming the hole 40c is deposited on the top liner layer 23 of the stacked body 20 by lithography, and dry etching is performed using the deposited resist film as a mask. . Thereby, a hole 40c is formed in the laminate 20. For example, the etching conditions are determined so that the inclination angle of the side surface of the hole 40c is about 80 °. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. Thereafter, the resist film is removed by performing ashing.

  Next, as shown in FIG. 9C, the sidewall forming film 50 is deposited on the upper surface of the stacked body 20 and the surface of the stacked body 20 where the holes 40c are formed by using the CVD method. As the sidewall forming film 50, for example, tetraethyl orthosilicate is used.

  Next, as shown in FIG. 9D, a portion of the sidewall forming film 50 located on the uppermost surface of the stacked body 20 and a portion located on the bottom surface forming the bottom of the hole 40c are formed by dry etching. Completely removed. As the etching gas, for example, a fluorocarbon (CF) -based gas is used. As a result, a sidewall portion 50c is formed on the side of the hole 40c.

  Next, the waveguide 30b is formed. First, an insulating material having a high refractive index is deposited in the hole 40c by the CVD method. The insulating material having a high refractive index is, for example, silicon nitride, silicon oxynitride, silicon carbonitride, or the like. If silicon nitride is used among these materials, the refractive index of the waveguide 30b can be increased. Thereafter, the surface of the deposited high-refractive-index insulating material is planarized by the CMP method. As a result, a waveguide 30b is formed as shown in FIG.

[Effects]
As described above, the solid-state imaging device 100b further includes the sidewall portion 50b located between the first waveguide portion 31b and the stacked body 20 for introducing light into the waveguide 30b.

  According to such a sidewall portion 50b, since light is guided to the waveguide 30b by reflection at the sidewall portion 50b, scattering of the light and incidence on the stacked body 20 is suppressed. That is, the efficiency of light collection on the photoelectric conversion unit 11 is improved.

  In the solid-state imaging device 100c, the sidewall portion 50c is located between the first waveguide portion 31b and the multilayer body 20 and between the second waveguide portion 32 and the multilayer body 20.

  According to such a sidewall portion 50c, since light is guided to the waveguide 30b by reflection at the sidewall portion 50c, scattering of the light and incidence on the stacked body 20 is suppressed. That is, the efficiency of light collection on the photoelectric conversion unit 11 is improved.

  Further, the side wall portion 50b (or the side wall portion 50c) is formed of tetraethyl orthosilicate.

  In such a solid-state imaging device 100b (or the solid-state imaging device 100c), the efficiency of light collection on the photoelectric conversion unit 11 is improved by the sidewall portion 50b (or the sidewall portion 50c) formed of tetraethyl orthosilicate. be able to.

(Other embodiments)
As described above, the solid-state imaging device according to the embodiment has been described, but the present disclosure is not limited to the embodiment.

  For example, the numerals used in the description of the above embodiments are merely examples for specifically describing the present disclosure, and the present disclosure is not limited to the exemplified numbers.

  Further, the first embodiment, the first modification of the first embodiment, the second modification of the first embodiment, the second embodiment, and the modification of the second embodiment may be arbitrarily combined.

  Further, in the above-described embodiment, the main materials forming each layer of the stacked structure of the solid-state imaging device are illustrated. However, each layer of the stacked structure of the solid-state imaging device has the same structure as that of the above-described embodiment. Other materials may be included as long as the above function can be realized. In addition, in the drawings, the corners and sides of each component are described linearly, but those having rounded corners and sides due to manufacturing reasons and the like are also included in the present disclosure.

  In addition, a form obtained by applying various modifications that can be conceived by those skilled in the art to each embodiment, or realized by arbitrarily combining components and functions in each embodiment without departing from the spirit of the present disclosure. Embodiments are also included in the present disclosure. For example, the present disclosure may be realized as a method for manufacturing a solid-state imaging device.

  The solid-state imaging device according to the present disclosure can be used as a solid-state imaging device having high light-receiving sensitivity.

DESCRIPTION OF SYMBOLS 10 Semiconductor substrate 11 Photoelectric conversion part 12 Floating diffusion part 20 Laminated body 21 Wiring layer 22 Interlayer insulating film 23 Liner layer 24 Via 25 Charge storage part 26 First laminated body 27 Second laminated body 30, 30a, 30b Waveguide 31, 31b First waveguide part 32, 32a Second waveguide part 33 Waveguide 40c, 41, 41b, 42 Hole 50 Sidewall forming film 50b, 50c Sidewall part 100, 100a, 100b, 100c, 100d Solid-state imaging device

Claims (13)

A semiconductor substrate;
A photoelectric conversion unit provided on the semiconductor substrate,
A stacked body that is located above the semiconductor substrate and includes a plurality of wiring layers and an interlayer insulating film located between the plurality of wiring layers;
A waveguide for penetrating at least a part of the laminate, for introducing light into the photoelectric conversion unit,
The diameter of the waveguide increases as the distance from the photoelectric conversion unit increases in the stacking direction,
The expansion ratio of the diameter of the first waveguide portion of the waveguide is larger than the expansion ratio of the diameter of the second waveguide portion closer to the photoelectric conversion portion than the first waveguide portion of the waveguide. Imaging device. The solid-state imaging device according to claim 1, further comprising: a charge storage unit that is located inside the stacked body and on a side of the first waveguide unit and that stores charges generated in the photoelectric conversion unit. The solid-state imaging device according to claim 2, wherein a part of the charge storage unit overlaps the first waveguide unit in a plan view. A floating diffusion portion provided on the semiconductor substrate;
The charge generated in the photoelectric conversion unit is stored in the charge storage unit via the floating diffusion unit,
The solid-state imaging device according to claim 2, wherein a part of the charge accumulation unit overlaps with the floating diffusion unit in a plan view. The solid-state imaging device according to claim 2, wherein the entire first waveguide is located above the charge storage unit. The solid-state imaging device according to claim 1, wherein the first waveguide and the second waveguide are formed of the same material. The solid-state imaging device according to claim 6, wherein the first waveguide and the second waveguide are formed of silicon nitride. The solid-state imaging device according to claim 1, wherein the first waveguide and the second waveguide are formed of different materials. The solid-state imaging device according to claim 8, wherein a refractive index of the first waveguide is larger than a refractive index of the second waveguide. The first waveguide is formed of silicon nitride,
The solid-state imaging device according to claim 8, wherein the second waveguide is formed of tetraethyl orthosilicate. The solid-state imaging device according to any one of claims 1 to 10, further comprising: a sidewall portion, which is located between the first waveguide portion and the stacked body, for introducing light into the waveguide. The solid-state imaging device according to claim 11, wherein the sidewall portion is located between the first waveguide and the stacked body and between the second waveguide and the stacked body. The solid-state imaging device according to claim 11, wherein the sidewall portion is formed of tetraethyl orthosilicate.

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