JP2020061462A - Wafer processing method - Google Patents

Abstract

To provide a wafer processing method capable of performing plasma etching while holding down costs.SOLUTION: A wafer processing method comprises a protection member arranging step (ST1), a cutting step (ST2), a plasma etching step (ST3), a functional layer altering step (ST4), and a functional layer fracturing step (ST5). The protection member arranging step arranges an adhesive tape on a functional layer side on a surface of the wafer. The cutting step forms a cut groove on a rear surface of the wafer along division schedule lines. The plasma etching step supplies a plasmatized etching gas to the rear surface side of the wafer and divides the substrate. The functional layer altering step alters the functional layer exposed at a bottom of a division groove by irradiating the functional layer with a laser beam from the rear surface side. The functional layer fracturing step expands the functional layer by expanding the adhesive tape and fractures the functional layer with an alteration region as a fracture starting point. In the functional layer altering step (ST4), a condensing point of a laser beam is set above the function layer, and the functional layer is irradiated with the laser beam reflected on an inner side surface of the division groove.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a wafer processing method, and more particularly to plasma dicing.

  It is known that a semiconductor wafer made of a silicon substrate or the like is divided into individual device chips, and thus a processing method using a cutting blade or a laser beam is applied. In these processing methods, the planned dividing lines (streets) are processed one by one to divide the wafer into device chips. Due to the recent miniaturization of electronic devices, lighter, thinner, shorter, and smaller device chips, and cost reductions have progressed, and many device chips with a size of 2 mm or less have been produced from device chips with a size of more than 10 mm as in the past. . When manufacturing a small-sized device chip, the number of lines to be divided into a single wafer is drastically increased, and processing time for each line becomes long.

  Therefore, a technique called plasma dicing has been developed in which all the planned dividing lines of the wafer are collectively processed (for example, refer to Patent Document 1). In the plasma dicing shown in Patent Document 1, the area other than the area shielded by the mask is removed by plasma etching and processing is performed on a wafer-by-wafer basis, so that the processing time is dramatically increased even if the number of planned division lines increases. The effect is that it will not be long.

  However, in the plasma dicing shown in Patent Document 1, it is necessary to prepare a precise mask that matches the planned dividing line of each wafer in order to accurately expose only the region to be removed by etching (for example, Patent Document 1). Reference 2 and Patent Reference 3).

JP, 2006-114825, A JP, 2013-055120, A JP, 2014-199833, A

  However, in particular, the masks disclosed in Patent Documents 2 and 3 have a higher cost and a higher degree of difficulty than cutting processes, such as the suppression of manufacturing cost and the number of manufacturing steps, and the establishment of a technique for aligning the mask. Was left.

  The present invention has been made in view of the above problems, and an object thereof is to provide a wafer processing method capable of performing plasma etching while suppressing costs.

  In order to solve the above-mentioned problems and to achieve the object, a wafer processing method of the present invention is a wafer in which a functional layer is laminated on a surface of a substrate to divide a wafer into a plurality of devices. A method of processing a wafer to be divided along a predetermined line, a protective member disposing step of disposing a protective member on the functional layer side of the front surface of the wafer, and a cutting blade cut into the back surface of the wafer, A cutting step in which a cutting groove having a depth not reaching the functional layer is formed on the substrate along the dividing line, and a gas in a plasma state is supplied to the back surface side of the wafer and remains at the bottom of the cutting groove. A plasma etching step of removing the substrate by etching and dividing the substrate by dividing grooves along the dividing lines, and irradiating a laser beam from the back surface side of the wafer along the dividing grooves. After the functional layer alteration step of heating and altering the functional layer exposed at the bottom of the groove, and after the functional layer alteration step, the protective member is extended and expanded, and the altered region is used as a fracture starting point to form the functional layer. And a step of breaking the functional layer along the planned dividing line, wherein the step of modifying the functional layer sets the focal point of the laser beam above the functional layer and reflects the side surface of the dividing groove. It is characterized in that the propagated laser beam is applied to the functional layer.

  The wafer processing method may further include, after the plasma etching step, a finish grinding step of grinding the back surface of the wafer to a finished thickness of the wafer.

  The wafer processing method may further include a preliminary grinding step of previously grinding the back surface of the wafer before the plasma etching step.

  The wafer processing method of the present invention has an effect that plasma etching can be performed while suppressing cost.

FIG. 1 is a perspective view showing an example of a wafer to be processed by the wafer processing method according to the first embodiment. FIG. 2 is a flowchart showing the flow of the wafer processing method according to the first embodiment. FIG. 3 is a side view showing a partial cross section of a cutting step of the method for processing the wafer shown in FIG. FIG. 4 is a cross-sectional view of the essential part of the wafer after the cutting step of the wafer processing method shown in FIG. FIG. 5 is a sectional view showing the structure of an etching apparatus used in the plasma etching step of the wafer processing method shown in FIG. FIG. 6 is a cross-sectional view of an essential part of the wafer after the plasma etching step of the wafer processing method shown in FIG. FIG. 7 is a sectional view showing a functional layer alteration step of the wafer processing method shown in FIG. FIG. 8 is a cross-sectional view showing a state in which the wafer is held in the breaking device in the functional layer breaking step of the wafer processing method shown in FIG. FIG. 9 is a cross-sectional view showing a state in which the functional layer is broken for each device in the functional layer breaking step of the wafer processing method shown in FIG. FIG. 10 is a side sectional view showing a finish grinding step of the method for processing the wafer shown in FIG. FIG. 11 is a cross-sectional view showing a die attach film attaching step of the wafer processing method shown in FIG. FIG. 12 is a cross-sectional view showing a die attach film dividing step of the wafer processing method shown in FIG. FIG. 13 is a cross-sectional view of an essential part of the wafer after the die attach film dividing step of the wafer processing method shown in FIG. FIG. 14 is a flowchart showing the flow of the wafer processing method according to the second embodiment. FIG. 15 is a side sectional view showing a pre-grinding step of the wafer processing method shown in FIG. FIG. 16 is a cross-sectional view of the essential part of the wafer after the pre-grinding step of the wafer processing method shown in FIG.

  Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the embodiments below. Further, the constituent elements described below include those that can be easily conceived by those skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be appropriately combined. Further, various omissions, substitutions, or changes in the configuration can be made without departing from the scope of the present invention.

[Embodiment 1]
A wafer processing method according to Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing an example of a wafer to be processed by the wafer processing method according to the first embodiment. FIG. 2 is a flowchart showing the flow of the wafer processing method according to the first embodiment.

  The wafer processing method according to the first embodiment is the wafer 1 processing method shown in FIG. In the first embodiment, the wafer 1 is a disk-shaped semiconductor wafer or optical device wafer having the substrate 2 made of silicon, sapphire, gallium arsenide, or the like. In the wafer 1, as shown in FIG. 1, a functional layer 4 is laminated on a surface 3 of a substrate 2 and a plurality of devices 5 are formed. The functional layer 4 includes a low dielectric constant insulating film (Low-k film) made of an inorganic film such as SiOF or BSG (SiOB) or an organic film such as a polyimide or parylene polymer film. The functional layer 4 is laminated on the surface 3 of the substrate 2.

  The device 5 is formed in each area of the surface 3 which is divided by a plurality of planned dividing lines 6. That is, the planned dividing line 6 divides the plurality of devices 5. The circuit forming the device 5 is formed by the functional layer 4. In the first embodiment, the device 5 is smaller than the device divided from the wafer 1 by cutting, and has a size of, for example, about 1 mm × 1 mm, and is individually processed by plasma etching (also referred to as plasma dicing). It is suitable for being divided. At least one of a metal film (not shown) and a TEG (Test Element Group) is formed on the functional layer 4 side in at least a part of the planned dividing line 6 of the wafer 1. The TEG is an evaluation element for finding a design or manufacturing problem that occurs in the device 5.

  The wafer processing method according to the first embodiment is a method of dividing the wafer 1 into individual devices 5 along the dividing line 6 and thinning the devices 5 to a finished thickness of 100. As shown in FIG. 2, the wafer processing method includes a protective member disposing step ST1, a cutting step ST2, a plasma etching step ST3, a functional layer alteration step ST4, a functional layer breaking step ST5, and a finish grinding step ST6. And a die attach film attaching step ST7 and a die attach film dividing step ST8.

(Protection member installation step)
The protective member disposing step ST1 is a step of disposing the adhesive tape 200 as a protective member on the surface 3 of the substrate 2 of the wafer 1 on the side of the functional layer 4. In the first embodiment, in the protection member disposing step ST1, as shown in FIG. 1, an adhesive tape 200 having a diameter larger than that of the wafer 1 is attached to the functional layer 4 side, and the annular frame 201 is provided on the outer peripheral edge of the adhesive tape 200. Affix. Although the adhesive tape 200 is used as the protective member in the first embodiment, the protective member is not limited to the adhesive tape 200 in the present invention. The processing method of the wafer proceeds to the cutting step ST2 when the adhesive tape 200 is attached to the functional layer 4 side of the wafer 1.

(Cutting step)
FIG. 3 is a side view showing a partial cross section of a cutting step of the method for processing the wafer shown in FIG. FIG. 4 is a cross-sectional view of the essential part of the wafer after the cutting step of the wafer processing method shown in FIG.

  In the cutting step ST2, the cutting blade 12 of the cutting device 10 shown in FIG. 3 is cut into the back surface 7 of the substrate 2 of the wafer 1, and the cutting groove 300 having a depth not reaching the functional layer 4 is cut along the dividing line 6. This is a step of forming on the substrate 2. In the first embodiment, in the cutting step ST2, as shown in FIG. 3, the functional layer 4 of the wafer 1 is provided on the holding surface 14 of the chuck table 13 of the cutting device 10 having one cutting unit 11 via the adhesive tape 200. Hold the side by suction. In the cutting step ST2, an infrared camera (not shown) of the cutting device 10 images the back surface 7 of the wafer 1 to detect the planned dividing line 6, and performs alignment for aligning the wafer 1 and the cutting blade 12 of the cutting unit 11. To do.

  In the cutting step ST2, the cutting device 10 causes the cutting blade 12 to cut from the back surface 7 while relatively moving the wafer 1 and the cutting blade 12 of the cutting unit 11 along the planned dividing line 6, and A cutting groove 300 having a depth that does not reach the functional layer 4 is formed on the back surface 7 side.

  In the cutting step ST2, the cutting device 10 forms a cutting groove 300 having a depth that does not reach the functional layer 4 on the back surface 7 side of the wafer 1 and leaves the substrate 2 at the bottom 301 of the cutting groove 300. As shown in FIG. 4, the wafer processing method proceeds to plasma etching step ST3 when the cutting grooves 300 are formed on the back surface 7 side of all the planned dividing lines 6 of the wafer 1.

(Plasma etching step)
FIG. 5 is a sectional view showing the structure of an etching apparatus used in the plasma etching step of the wafer processing method shown in FIG. FIG. 6 is a cross-sectional view of an essential part of the wafer after the plasma etching step of the wafer processing method shown in FIG.

  In the plasma etching step ST3, the etching gas in the plasma state is supplied to the back surface 7 side of the wafer 1 holding the adhesive tape 200 side by the chuck table 21 in the plasma etching chamber 25 of the etching apparatus 20 shown in FIG. The substrate 2 remaining on the bottom 301 (shown in FIG. 4) of the substrate is removed by etching, and the substrate 2 is divided by the dividing groove 310 (shown in FIG. 6) along the dividing line 6. The plasma etching step ST3 is a step of plasma dicing the substrate 2 of the wafer 1.

  In the plasma etching step ST3, the control unit 22 of the etching apparatus 20 operates the gate operating unit 23 to move the gate 24 downward in FIG. 5, and opens the opening 26 of the plasma etching chamber 25. Next, the wafer 1 on which the cutting step ST2 has been performed by the loading / unloading means (not shown) is transferred to the closed space 27 in the plasma etching chamber 25 through the opening 26, and the chuck table of the workpiece holder 29 that constitutes the lower electrode 28. The functional layer 4 side of the wafer 1 is placed on 21 (electrostatic chuck, ESC: Electrostatic chuck) via the adhesive tape 200. At this time, the control unit 22 operates the lift drive unit 30 to raise the upper electrode 31. The control unit 22 applies electric power to the electrodes 32 and 33 provided in the workpiece holder 29 to suck and hold the wafer 1 on the chuck table 21.

  The control unit 22 operates the gate operating unit 23 to move the gate 24 upward, and closes the opening 26 of the plasma etching chamber 25. The control unit 22 operates the elevating and lowering drive unit 30 to lower the upper electrode 31, thereby lowering the lower surface of the gas ejection portion 34 forming the upper electrode 31 and the wafer 1 held on the chuck table 21 forming the lower electrode 28. The distance between them is set to a predetermined electrode distance suitable for the plasma etching process.

  The control unit 22 operates the gas discharge unit 35 to evacuate the closed space 27 in the plasma etching chamber 25 to maintain the pressure of the closed space 27 at a predetermined pressure and to operate the coolant supply unit 36. Helium gas, which is a coolant, is circulated in the coolant introduction passage 37, the cooling passage 38, and the coolant discharge passage 39 provided in the lower electrode 28 to suppress abnormal temperature rise of the lower electrode 28.

  Next, the control unit 22 operates the gas supply unit 40 to eject the etching gas from the plurality of ejection ports 41 of the upper electrode 31 toward the wafer 1 held on the chuck table 21 of the lower electrode 28 and perform etching. With the gas supplied, high frequency power for generating and maintaining plasma is applied from the high frequency power supply 42 to the upper electrode 31, and high frequency power for attracting ions to the lower electrode 28 is applied from the high frequency power supply 42. As a result, an etching gas in a plasma state is generated in the space between the lower electrode 28 and the upper electrode 31, the etching gas in the plasma state is drawn into the wafer 1, and the back surface 7 of the wafer 1 and the inner surface of the cutting groove 300 are drawn. The bottom 301 is etched and the cutting groove 300 is advanced toward the surface 3 of the substrate 2.

In the first embodiment, when the substrate 2 is made of silicon, SF ₆ , C ₄ F ₈ or CF ₄ is used as the etching gas, but the etching gas is not limited to these.

  In the plasma etching step ST3, the control unit 22 presets a predetermined time for plasma etching the wafer 1 according to the depth of the cutting groove 300 and the thickness of the wafer 1. In the plasma etching step ST3, as shown in FIG. 6, the entire back surface 7 of the wafer 1 that has been plasma-etched for a predetermined time is etched and thinned by a thickness of 101. Further, as shown in FIG. 6, the substrate 1 remaining on the bottom 301 of the cutting groove 300 is etched and removed from the wafer 1 plasma-etched for a predetermined time, and the cutting groove 300 reaches the functional layer 4 and is cut. The groove 300 serves as a dividing groove 310 that divides the substrate 2. In the wafer 1, the substrate 2 is divided by the dividing grooves 310, the functional layers 4 are exposed in the dividing grooves 310, and the functional layers 4 remain on the bottoms of the dividing grooves 310.

  In the wafer processing method, after performing plasma etching for a predetermined time in plasma etching step ST3, the process proceeds to functional layer alteration step ST4. Note that FIG. 6 shows an example in which the substrate 2 at the bottom of the dividing groove 310 is removed from the wafer 1 after the plasma etching step ST3, but in the present invention, the substrate 2 is slightly left at the bottom 301 of the cutting groove 300. May remain. Further, in the wafer processing method of the present invention, in the plasma etching step ST3, an etching step of etching the entire back surface 7 of the wafer 1 and advancing the cutting grooves 300 toward the front surface 3 of the substrate 2 is performed. The wafer 1 may be plasma-etched by a so-called Bosch method in which a coating film deposition step of depositing a coating film on the back surface 7 of 1, the inner surface of the cutting groove 300 and the bottom 301 is alternately repeated.

(Functional layer alteration step)
FIG. 7 is a sectional view showing a functional layer alteration step of the wafer processing method shown in FIG. In the functional layer alteration step ST4, after the plasma etching step ST3 is performed, the laser beam 51 having a wavelength that the laser processing apparatus 50 shown in FIG. Is a step of heating the functional layer 4 exposed at the bottom of the dividing groove 310 to change the quality thereof.

  In the functional layer alteration step ST4, the laser processing device 50 holds the functional layer 4 side of the wafer 1 on the chuck table via the adhesive tape 200, and divides the laser beam irradiation unit 52 and the chuck table as shown in FIG. A functional layer in which a condensing point 51-1 of a laser beam 51 having a wavelength (for example, 355 nm) having an absorptivity for the functional layer 4 from the laser beam irradiation unit 52 is exposed at the bottom while relatively moving along the planned line 6. The laser beam 51 is applied to the functional layer 4 by setting the laser beam 51 above 4. In the first embodiment, the condensing point 51-1 is set inside the dividing groove 310. In the functional layer alteration step ST4, the laser beam 51 is reflected by the inner side surface 311 of the dividing groove 310 and propagates toward the functional layer 4 at a position closer to the functional layer 4 than the converging point 51-1 as shown in FIG. Then, the functional layer 4 exposed at the bottom of the dividing groove 310 is irradiated.

  In the functional layer alteration step ST4, the functional layer 4 is irradiated with the laser beam 51 at a position beyond the converging point 51-1. Therefore, the functional layer 4 exposed at the bottom of the dividing groove 310 is not ablated (that is, The functional layer 4 exposed at the bottom of the dividing groove 310 is heated without being cut) with a laser beam 51 to form a portion of the functional layer 4 irradiated with the laser beam 51 in an altered region 4-1 which is an altered region. . The altered area 4-1 means an area in which mechanical strength and other physical characteristics are different from those of the surrounding area. In the first embodiment, the mechanical strength is around the functional layer 4. Means a region lower than the mechanical strength of.

In the functional layer alteration step ST4, the conditions of the laser beam 51 irradiated by the laser processing device 50 are set so that the output and the like are lower than when performing the ablation process. In the first embodiment, for example, the following settings are made. There is.
YVO ₄ (neodymium: yttrium / vanadium tetroxide) pulsed laser wavelength: 355 nm
Average output: 1W
Repetition frequency: 100kHz
Spot diameter of condensing point 51-1: 10 μm
Processing feed rate: 500 mm / sec

  In the wafer processing method, when the altered region 4-1 is formed in the functional layer 4 exposed at the bottoms of the dividing grooves 310 in all the planned dividing lines 6, the process proceeds to the functional layer breaking step ST5.

(Functional layer breaking step)
FIG. 8 is a cross-sectional view showing a state in which the wafer is held in the breaking device in the functional layer breaking step of the wafer processing method shown in FIG. FIG. 9 is a cross-sectional view showing a state in which the functional layer is broken for each device in the functional layer breaking step of the wafer processing method shown in FIG. The functional layer breaking step ST5 is a step of, after the functional layer alteration step ST4, stretching and expanding the adhesive tape 200, and breaking the functional layer 4 along the planned dividing line 6 with the alteration region 4-1 as a fracture starting point. .

  In the functional layer breaking step ST5, as shown in FIG. 8, the breaking device 90 sandwiches the annular frame 201 with the clamp portion 91 with the back surface 7 side facing upward, and the wafer 1 after the functional layer alteration step ST4. To fix. At this time, as shown in FIG. 8, the breaking device 90 brings the cylindrical expansion drum 92 into contact with the region of the adhesive tape 200 between the wafer 1 and the annular frame 201. The expansion drum 92 has an inner diameter and an outer diameter smaller than the inner diameter of the annular frame 201 and larger than the outer diameter of the wafer 1, and is arranged at a position coaxial with the annular frame 201 fixed by the clamp portion 91.

  In the first embodiment, in the functional layer breaking step ST5, the breaking device 90 lowers the clamp portion 91 as shown in FIG. Then, since the adhesive tape 200 is in contact with the expansion drum 92, the adhesive tape 200 is expanded in the surface direction. In the functional layer breaking step ST5, a radial tensile force acts on the adhesive tape 200 as a result of the expansion. When a tensile force is radially applied to the adhesive tape 200 attached to the functional layer 4 side of the wafer 1 as described above, the wafer 1 is exposed to the functional layer 4 exposed at the bottom of the dividing groove 310 in the functional layer alteration step ST4. Since the altered region 4-1 with reduced mechanical strength is formed, the tensile force concentrates on the altered region 4-1 of the functional layer 4 exposed at the bottom of the dividing groove 310. Then, the altered region 4-1 is broken and the wafer 1 is divided into individual devices 5.

  In the first embodiment, in the functional layer breaking step ST5, the clamp portion 91 is lowered to expand the adhesive tape 200, but the present invention is not limited to this, and the expansion drum 92 may be raised. In short, it suffices to raise the extension drum 92 relative to the clamp portion 91 and lower the clamp portion 91 relative to the extension drum 92. Further, in the present invention, in the wafer processing method, in the functional layer breaking step ST5, the so-called cool expanding technique is utilized to expand the adhesive tape 200 while cooling the functional layer 4 to transform the functional layer 4 into the altered region 4 You may fracture | rupture from -1 as a starting point. In the functional layer breaking step ST5, the metal film and TEG formed on the division line 6 (not shown) are also divided. When the functional layer 4 is broken, the wafer processing method proceeds to finish grinding step ST6.

(Finishing grinding step)
FIG. 10 is a side sectional view showing a finish grinding step of the method for processing the wafer shown in FIG. The finishing grinding step ST6 is a step in which the back surface 7 of the wafer 1 is ground after the plasma etching step ST3, the functional layer alteration step ST4 and the functional layer breaking step ST5 so that the wafer 1 has a finished thickness of 100.

  In the finish grinding step ST6, the grinding device 60 sucks and holds the functional layer 4 side of the wafer 1 on the holding surface 62 of the chuck table 61 via the adhesive tape 200. In the finish grinding step ST6, as shown in FIG. 10, while the spindle 63 rotates the grinding wheel 64 for finish grinding and the chuck table 61 is rotated about the axis, the grinding water is supplied and the grinding stone 65 for finish grinding is used. Is brought closer to the chuck table 61 at a predetermined feeding speed, and the grinding wheel 65 for finish grinding finishes the wafer 1 or the back surface 7 of the device 5. In the finish grinding step ST6, the wafer 1, that is, the device 5 is ground until the finished thickness is 100. In the wafer processing method, when the wafer 1 or the device 5 is thinned to a finished thickness 100, the process proceeds to a die attach film attaching step ST7.

(Step of attaching die attach film)
FIG. 11 is a cross-sectional view showing a die attach film attaching step of the wafer processing method shown in FIG. The die attach film attaching step ST7 is a step of attaching the die attach film 202 to the back surface 7 of the wafer 1 after the plasma etching step ST3, the functional layer alteration step ST4, the functional layer breaking step ST5 and the finish grinding step ST6. .

  In the die-attach film attaching step ST7, the die-attach film 202 for attaching the device 5 is attached to the back surface 7 of the wafer 1 that is finish-ground in the finish-grinding step ST6, that is, the device 5. In the die attach film attaching step ST7, as shown in FIG. 11, the annular frame 204 is attached to the outer peripheral edge, and the die attach film 202 laminated on the dicing tape 203 is attached to the back surface 7 of the wafer 1 to function. The adhesive tape 200 is peeled off from the layer 4. In the wafer processing method, when the adhesive tape 200 is peeled from the functional layer 4, the process proceeds to a die attach film dividing step ST8.

(Die attach film dividing step)
FIG. 12 is a cross-sectional view showing a die attach film dividing step of the wafer processing method shown in FIG. FIG. 13 is a cross-sectional view of an essential part of the wafer after the die attach film dividing step of the wafer processing method shown in FIG. The die-attach film dividing step ST8 is a step of dividing the die-attach film 202 by irradiating the die-attach film 202 with the laser beam 71 along the dividing groove 310 with the laser beam processing device 70 shown in FIG.

  In the die attach film dividing step ST8, the laser processing device 70 holds the back surface 7 side of the wafer 1 on the chuck table via the dicing tape 203, and divides the laser beam irradiation unit 72 and the chuck table as shown in FIG. A laser beam 71 having a wavelength (for example, 355 nm) having an absorptivity for the die attach film 202 from the laser beam irradiation unit 72 is relatively moved along the planned line 6 to the die attach film 202 exposed in the dividing groove 310. Irradiate. In the die-attach film dividing step ST8, the die-attach film 202 exposed in the dividing groove 310 is ablated in each division line 6 to divide the die-attach film 202 exposed in the dividing groove 310. As shown in FIG. 13, the wafer processing method ends when the die attach film 202 exposed in the dividing grooves 310 is divided in all the dividing lines 6 to be divided. In addition, after that, the device 5 is picked up from the dicing tape 203 by a not-shown pickup for each die attach film 202.

  In the wafer processing method according to the first embodiment, after the cutting groove 300 is formed from the back surface 7 along the planned dividing line 6 in the cutting step ST2, plasma cutting is performed from the back surface 7 side in the plasma etching step ST3. Since the wafer 1 is divided by advancing 300 toward the front surface 3 of the substrate 2, the cutting groove 300 etches to the back surface 7 earlier than other regions, and realizes plasma dicing without a mask. You can For this reason, since the wafer processing method is smaller than the device divided by the cutting process, the wafer 1 provided with the device 5 suitable for the plasma etching does not require an expensive mask. . As a result, the wafer processing method can divide the wafer 1 into individual devices 5 by performing plasma etching on the wafer 1 while suppressing costs.

  In the wafer processing method, the adhesive tape 200 is attached to the functional layer 4 side in the protective member disposing step ST1 before the cutting step ST2 and the finish grinding step ST6. For this reason, it is possible to suppress the contamination generated in the cutting step ST2 and the finish grinding step ST6 from adhering to the device 5.

  Further, the wafer processing method is such that in the functional layer alteration step ST4, the functional layer 4 remaining on the bottom of the dividing groove 310 is irradiated with the laser beam 51 to form the altered region 4-1. The tape 200 is expanded to break the functional layer 4 from the altered region 4-1 as a starting point. Therefore, even if the functional layer 4 including the resin such as the Low-k film remains at the bottom of the dividing groove 310 after the plasma etching step ST3, the method for processing the wafer does not remove the functional layer 4 such as the Low-k film. The stacked wafers 1 can be efficiently divided into individual devices 5.

  Further, the wafer processing method is that in the functional layer alteration step ST4, the condensing point 51-1 of the laser beam 51 is set above the functional layer 4 exposed at the bottom of the dividing groove 310, and the condensing point 51-1 is obtained. The laser beam 51 is reflected by the inner side surface 311 closer to the functional layer 4 and irradiated on the functional layer 4. Therefore, in the wafer processing method, in the functional layer alteration step ST4, the functional layer 4 can be heated without being ablated by the laser beam 51, and the generation of debris can be suppressed. Further, in the wafer processing method, adjustment of the position (height, depth) of the condensing point 51-1 becomes easy.

  Further, in the wafer processing method, in the plasma etching step ST3, in order to divide the substrate 2 along the dividing line 6, the side surfaces of the individually divided devices 5 are removed by plasma etching. For this reason, the wafer processing method also has an effect that the chip 5 due to cutting does not remain on the side surface of the individually divided device 5, and the device 5 having high bending strength can be manufactured.

  Moreover, since the wafer processing method includes the die attach film attaching step ST7 and the die attach film dividing step ST8, the device 5 that can be fixed to the substrate or the like can be obtained.

[Embodiment 2]
A wafer processing method according to a second embodiment of the present invention will be described with reference to the drawings. FIG. 14 is a flowchart showing the flow of the wafer processing method according to the second embodiment. FIG. 15 is a side sectional view showing a pre-grinding step of the wafer processing method shown in FIG. FIG. 16 is a cross-sectional view of the essential part of the wafer after the pre-grinding step of the wafer processing method shown in FIG. In addition, in FIG. 14, FIG. 15 and FIG. 16, the same parts as those of the first embodiment are denoted by the same reference numerals and the description thereof will be omitted.

  The wafer processing method according to the second embodiment is the same as that of the first embodiment except that a preliminary grinding step ST10 is provided as shown in FIG. The preliminary grinding step ST10 is a step of previously grinding the back surface 7 of the wafer 1 before the plasma etching step ST3. In the second embodiment, the wafer processing method performs the preliminary grinding step ST10 after the protection member disposing step ST1 and before the cutting step ST2, but in the present invention, if it is before the plasma etching step ST3, It may be performed before the protection member disposing step ST1 or after the cutting step ST2.

  In the preliminary grinding step ST10, the grinding device 80 sucks and holds the functional layer 4 side of the wafer 1 on the holding surface 82 of the chuck table 81 via the adhesive tape 200. In the pre-grinding step ST10, as shown in FIG. 15, while the spindle 83 rotates the grinding wheel 84 for pre-grinding and the chuck table 81 is rotated about the axis, the grinding water is supplied and the grindstone 85 for pre-grinding is used. Is brought closer to the chuck table 81 at a predetermined feed speed, so that the back surface 7 of the wafer 1 is roughly ground by the pregrinding grindstone 85. The pregrinding grindstone 85 is a grinding grindstone having larger abrasive grains than the finish grinding grindstone 65.

  In the preliminary grinding step ST10, as shown in FIG. 16, the wafer 1 is ground until the finished thickness 100 and the thickness 101 removed in the plasma etching step ST3 are equal to or more than the combined thickness. In the second embodiment, the wafer processing method proceeds to the plasma etching step ST3 when the wafer 1 is ground until the finished thickness 100 and the thickness 101 removed in the plasma etching step ST3 are equal to or more than the total thickness. In the present invention, in the preliminary grinding step ST10, the finished thickness 100, the thickness 101 removed in the plasma etching step ST3, and the thickness removed in the finish grinding step ST6 are set to be approximately equal to the total thickness. The wafer 1 may be thinned.

  In the wafer processing method according to the second embodiment, after the cutting groove 300 is formed from the back surface 7 along the planned dividing line 6 in the cutting step ST2, the plasma etching is performed from the back surface 7 side in the plasma etching step ST3. In this case, the etching progresses to the back surface 7 earlier than other regions, and plasma dicing without a mask can be realized. As a result, the wafer processing method can divide the wafer 1 into individual devices 5 by performing plasma etching on the wafer 1 while suppressing the cost, as in the first embodiment.

  Further, in the wafer processing method according to the second embodiment, since the wafer 1 is thinned by performing the preliminary grinding step ST10 before the plasma etching step ST3, the removal amount of the substrate 2 of the wafer 1 at the plasma etching step ST3. Can be reduced. As a result, the wafer processing method according to the second embodiment can reduce the amount of so-called outgas generated in the plasma etching step ST3 and the processing time.

  Further, in the wafer processing method according to the second embodiment, the backside 7 of the wafer 1 is ground by performing the preliminary grinding step ST10 before the cutting step ST2. Even on the satin surface (the surface having fine irregularities), the back surface 7 can be flattened before the cutting step ST2. As a result, in the wafer processing method according to the second embodiment, in the cutting step ST2, it is possible to take an image with the infrared camera, and the cutting blade 12 and the planned dividing line when the alignment is performed based on the taken image of the surface of the wafer 1. Positioning with 6 is possible.

[Embodiment 3]
A wafer processing method according to the third embodiment of the present invention will be described. In the method for processing a wafer according to the third embodiment, in the plasma etching step ST3, high-frequency power is not applied to the electrodes to plasma the etching gas or the like in the closed space, but the etching gas in the plasma state is used in the plasma etching chamber. A remote plasma type plasma etching apparatus for introducing into a closed space is used.

  Since the wafer processing method according to the third embodiment uses the remote plasma type etching apparatus in the plasma etching step ST3, in the etching apparatus, the ions mixed in the etching gas in the plasma state collide with the inner surface of the supply pipe to perform the plasma etching. Since it is possible to suppress the reaching of the closed space in the chamber and to supply the etching gas with a high concentration of radicals, the substrate 2 can be divided for each device 5 even if the cutting groove 300 has a narrower width.

  The wafer processing method according to the third embodiment may perform the preliminary grinding step ST10 as in the second embodiment.

  The present invention is not limited to the above embodiment. That is, various modifications can be made without departing from the gist of the present invention. For example, in the present invention, the functional layer 4, the metal film and the TEG formed on the planned dividing line 6 may be removed by ablation by irradiating a laser beam from the surface before the cutting step ST2. Further, in the present invention, when an oxide film is formed on the back surface 7 of the wafer 1 in advance, plasma etching may be performed using the oxide film as a mask in the plasma etching step ST3. Further, in the present invention, in both the finish grinding step ST6 and the pre-grinding step ST10, after the back surface 7 of the wafer 1 is roughly ground using the pre-grinding grindstone 85, the finish grinding having smaller abrasive grains than the pre-grinding grindstone 85 is performed. The back surface 7 of the wafer 1 may be finish ground by the grinding wheel 65, the back surface 7 of the wafer 1 may be only rough ground, or the back surface 7 of the wafer 1 may be only finish ground. Further, the present invention is not limited to the size of the device 5 described in the above embodiment.

1 wafer 2 substrate 3 surface 4 functional layer 4-1 altered region (altered region)
5 device 6 planned dividing line 7 back surface 12 cutting blade 51 laser beam 51-1 focusing point 100 finished thickness 200 adhesive tape (protective member)
300 cutting groove 301 bottom 310 dividing groove 311 inner side surface (side surface)
ST1 Protective member disposing step ST2 Cutting step ST3 Plasma etching step ST4 Functional layer alteration step ST5 Functional layer breaking step ST6 Finish grinding step ST10 Preliminary grinding step

Claims (3)

A wafer processing method of dividing a wafer having a plurality of devices formed by laminating a functional layer on a surface of a substrate, along a division line that divides the plurality of devices,
A protective member disposing step of disposing a protective member on the functional layer side of the surface of the wafer;
A cutting step of cutting a back surface of the wafer with a cutting blade to form a cutting groove having a depth not reaching the functional layer on the substrate along the dividing line;
A plasma etching step of supplying a gas in a plasma state to the back surface side of the wafer, etching and removing the substrate remaining at the bottom of the cutting groove, and dividing the substrate by dividing grooves along the dividing lines.
Irradiating a laser beam along the dividing groove from the back surface side of the wafer, and heating the functional layer exposed at the bottom of the dividing groove to change the quality of the functional layer,
After the functional layer alteration step, the protective member is stretched and expanded, and the functional layer is fractured along the division line with the altered region as a fracture starting point, and a functional layer fracture step is provided,
The functional layer alteration step is a method for processing a wafer, in which the focal point of the laser beam is set above the functional layer and the laser beam reflected and propagated on the side surface of the dividing groove is applied to the functional layer.   The method of processing a wafer according to claim 1, further comprising a finish grinding step of grinding the back surface of the wafer to a finished thickness of the wafer after the plasma etching step.   3. The wafer processing method according to claim 1, further comprising a pre-grinding step of previously grinding the back surface of the wafer before the plasma etching step.

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