JP2004087865A

JP2004087865A - Method for manufacturing semiconductor device

Info

Publication number: JP2004087865A
Application number: JP2002247966A
Authority: JP
Inventors: Taro Ogawa; 小川　太郎; Masaru Izawa; 伊澤　勝; Naoshi Itabashi; 板橋　直志; Katanobu Yokogawa; 横川　賢悦
Original assignee: Hitachi Ltd
Current assignee: Hitachi Ltd
Priority date: 2002-08-28
Filing date: 2002-08-28
Publication date: 2004-03-18

Abstract

【課題】本発明の目的は、Ｓｉ（半導体）基板表面に形成したゲート絶縁膜用の極薄ＳｉＯ_２膜に対し、膜中のＮ原子含有率が２５％以上で、含有量の面内分布も±５％未満、さらにＳｉ／ＳｉＯ_２界面へのＮ原子の析出も無視できるレベルと、Ｎ原子含有率ならびにその面内均一性が高く、かつ、急峻なＮ原子濃度分布の形成を可能にすることにある。
【解決手段】本発明によれば、半導体基板を絶縁膜中に含有されたＮ原子の拡散長が窒化処理中に絶縁膜厚を超えない程度の温度に保持するとともに、前記基板に上記窒化を行う際に、外部から基板に対して印加されるバイアス電圧値を、該バイアス電圧によって加速されるイオン成分で絶縁膜の再スパッタが生じない程度の領域に制御し、該イオン成分の照射によって基板表面近傍のみを高温に加熱することを特徴とする。
【選択図】　図１An object of the present invention is to provide an ultrathin SiO ₂ film for a gate insulating film formed on the surface of a Si (semiconductor) substrate, wherein the N atom content in the film is 25% or more, and the in-plane distribution of the content. Less than ± 5%, and a level at which the precipitation of N atoms on the Si / SiO ₂ interface is negligible, the N atom content and the in-plane uniformity thereof are high, and a sharp N atom concentration distribution can be formed. Is to do.
According to the present invention, a semiconductor substrate is maintained at a temperature at which the diffusion length of N atoms contained in an insulating film does not exceed an insulating film thickness during a nitriding treatment, and the nitriding is performed on the substrate. When performing this, the bias voltage value applied to the substrate from the outside is controlled to a region where re-sputtering of the insulating film does not occur with an ion component accelerated by the bias voltage, and the substrate is irradiated by the ion component. It is characterized in that only the vicinity of the surface is heated to a high temperature.
[Selection diagram] Fig. 1

Description

【０００１】
【発明の属する技術分野】
本発明は半導体装置の製造技術に係わり、特にＭＯＳトランジスタのゲート絶縁膜の窒化方法に関する。
【０００２】
【従来の技術】
ＬＳＩあるいは超ＬＳＩと呼ばれる半導体装置の基本的な製造工程の一つに、素子分離領域形成後にシリコン（Ｓｉ）基板表面にゲート絶縁膜の形成工程がある。
一般に、ゲート絶縁膜にはＳｉ基板のドライ酸化によって形成されたシリコン酸化膜（ＳｉＯ_２）が用いられるが、半導体集積回路素子の極微細化に伴ってその極薄膜化が進み、１００ｎｍノード以降の素子では、１．５ｎｍ以下の膜厚が要求されることとなる。
【０００３】
ＳｉＯ_２膜の極薄化に伴って検討が進んでいるのが、ゲートリーク電流の低減や上層ポリシリコンゲート電極からのボロン（Ｂ）突き抜け防止、さらに誘電率の向上を目的として、ＳｉＯ_２膜表層に窒素（Ｎ）原子を含有させる窒化処理である。ＳｉＯ_２膜の窒化処理として、例えばアイトリプルイー・トランサクション・オン・エレクトロン・デバイス、４１巻、９号（１９９４年）１６０８頁（公知例１）に記載されたように、一酸化窒素（ＮＯ）ないしは亜酸化窒素（Ｎ_２Ｏ）ガスの雰囲気中でアニールする方法が検討されている。しかし、本方法ではプロセス温度が６００℃から９００℃と高温なため、ＳｉＯ_２膜中でＮ原子の拡散が生じ、Ｓｉ／ＳｉＯ_２界面に析出して素子特性を劣化させることから、ＳｉＯ_２膜中のＮ原子含有率が制限され、上記課題に対して充分な効果を得ることが困難であった。
【０００４】
これに対し、例えば特開２００１−２７４１４８号公報（公知例２）に記載されたように、例えば２．４５ＧＨｚのマイクロ波で励起したＮプラズマ雰囲気中にＳｉＯ_２膜を曝し、ＳｉＯ_２膜中の酸素（Ｏ）原子とプラズマ中のＮラジカルとを置換することによって、ＳｉＯ_２膜中に高濃度でＮ原子を含有させるプラズマ窒化方法が検討されている。
【０００５】
【発明が解決しようとする課題】
上記公知例２に記載のプラズマ窒化方法によれば、ＮＯないしＮ_２Ｏアニールによる窒化方法と比べて、ＳｉＯ_２膜中に急峻なＮ原子濃度分布を形成できる。しかし、プラズマ雰囲気と基板が離されたいわゆるリモートプラズマ条件下でＮ原子含有量を増大させるためには、基板温度を２５０℃以上に保持する必要があった。
この結果、ＳｉＯ_２膜中でＮ原子の拡散が生じ、Ｓｉ／ＳｉＯ_２界面にＮ原子が析出するため、例えばＳｉＯ_２膜が１．５ｎｍと極薄になると、膜中のＮ原子含有率を２０％以上に高めることが困難であった。
また、チャンバ内でのプラズマ密度の不均一性から、例えば直径３００ｍｍのＳｉウェハ上のＳｉＯ_２膜でのＮ原子含有量分布も±５％以上と、不充分であった。
【０００６】
本発明の目的は、半導体（Ｓｉ）基板表面に形成したゲート絶縁膜用の酸化膜（ＳｉＯ_２）に対し、膜中のＮ原子含有率が２５％以上で、含有量の面内分布も±５％未満、さらにＳｉ／ＳｉＯ_２界面へのＮ原子の析出も無視できるレベルと、Ｎ原子含有率ならびにその面内均一性が高く、かつ、急峻なＮ原子濃度分布の形成を可能にすることにある。
【０００７】
【課題を解決するための手段】
本発明によれば、半導体基板を絶縁膜中に含有されたＮ原子の拡散長が窒化処理中に絶縁膜厚を超えない程度の温度に保持するとともに、前記基板に上記窒化を行う際に、外部から基板に対して印加されるバイアス電圧値を、該バイアス電圧によって加速されるイオン成分で絶縁膜の再スパッタが生じない程度の領域に制御し、該イオン成分の照射によって基板表面近傍のみを高温に加熱することを特徴とする。
この結果、プラズマ中のＮラジカルとＳｉＯ_２膜中のＯ原子の置換反応は、低エネルギーのイオン成分が到達可能な、表層から０．５ｎｍ以内の浅い領域のみで促進させることが可能となる。
また、基板をＮ原子の拡散長が窒化処理中に絶縁膜厚を超えない程度の温度に保持することによって、Ｎラジカルの失活反応が促進されると共に、置換後のＮ原子拡散を抑制することが可能となる。この結果、極薄のＳｉＯ_２膜の深さ方向に急峻なＮ原子濃度分布を形成することが可能となる。
【０００８】
また、プラズマを励起する高周波に波長３００ｍｍ以上、周波数１０００ＭＨｚ以下と、直径３００ｍｍ以上のウェハ対応チャンバと波長が同程度な帯域を用いることによって、数ＧＨｚオーダの高周波数帯域を用いる場合に問題となる、高次モードの定在波によるプラズマの局所的な不均一性を解消できる。一方、周波数に１００ＭＨｚ以上の高周波を用いることによって、プラズマ中のＲＦ自己バイアス電圧に起因するチャンバ内壁や基板へのイオン照射ダメージを低減することが可能となる。
さらに、マイクロ波を供給するアンテナあるいはチャンバに永久磁石を取り付け、プラズマに磁場を印加することによって、プラズマの安定性や密度均一性が向上する。この結果、大口径のＳｉウェハ面内でのＮ原子濃度の均一性向上が可能となる。
【０００９】
【発明の実施の形態】
（実施の形態１）
以下、図１、図２、図３、図４、図５、図６を用いて、本発明の実施の形態を説明する。図１は本発明のプラズマ窒化方法を実施するための装置構成を示す。図１において、１はチャンバ、２はターボ分子ポンプ等の排気手段によるチャンバの排気、３はマイクロストリップ型のアンテナ、４はアンテナ埋め込まれた永久磁石、５は周波数が１００ＭＨｚから１０００ＭＨｚ、より具体的には４５０ＭＨｚであるＵＨＦ帯域の高周波電源、６は石英板、７はシャワープレート、８、９はマスフローコントローラ、バルブ等から構成されるガス導入経路、１０、１１は反応ガス、１２は反応ガスのプラズマ、１３は前記アンテナに対して対向配置された試料台、１４は試料台上に取り付けられた静電チャック、１５は試料台内を循環する冷媒、１６はゲート絶縁膜としてドライ酸化によりＳｉＯ_２膜を形成した直径３００ｍｍのＳｉウェハ（試料）、１７はコンデンサ、１８は周波数が１３．５６ＭＨｚであるＲＦ帯域の高周波電源（ＲＦバイアス）である。
【００１０】
まずはじめに、１０ｎｍ膜厚を有するゲートＳｉＯ_２膜の窒化処理について説明する。
図１において、チャンバ１内に１０ｎｍ膜厚のＳｉＯ_２膜を形成したＳｉウェハ１６を搬送し、試料台１３上に固定した後、冷媒１５を循環させてＳｉウェハ１６を１０℃に保った。Ｓｉウェハ１６は、図１０に示すように、Ｓｉ基板５００表面にＭＯＳトランジスタが形成される領域（活性領域）５０１を区画するように、素子分離領域５０２が形成されている。この素子分離領域５０２は浅溝分離構造（Ｓｈａｌｌｏｗ　ｔｒｅｎｃｈ　ｉｓｏｌａｔｉｏｎ　ｓｔｒｕｃｔｕｒｅ）によって構成されている。そして、活性領域５０１表面にはゲートＳｉＯ_２膜５０３が形成されている。
次に、ガス経路８からＮ_２ガス１０を２００ミリリットル／毎分（ｍｌ／ｍｉｎ）の流量で導入し、チャンバ内の圧力を４Ｐａに保った。次に、静電チャック１４に１ｋＶの電圧を印加するとともに、出力が１．２ｋＷの高周波５を印加した結果、Ｎ_２ガス１０がラジカル化、イオン化し、プラズマ１２が生成された。
【００１１】
図２（ａ）（ｂ）に、プラズマ１２中でそれぞれ３０秒間、６０秒間プラズマ窒化処理を行った該ＳｉＯ_２膜について、Ｎ原子％の深さ方向分布を二次イオン質量分析法（ＳＩＭＳ）、ならびにラザフォード後方散乱法（ＲＢＳ）で実測した結果をそれぞれ示す。最初の３０秒間の処理でＳｉＯ_２膜表面がほぼ窒化シリコン（ＳｉＮ）化したため、その後の窒化はＮラジカルならびにＮ_２ラジカルの拡散、さらにセルフバイアスによるＮ^＋イオンのノックオン効果によって進行し、３０秒間の処理によって等濃度界面は約０．１５ｎｍ移動したため、本窒化処理による拡散長は０．１５ｎｍと見積もられることが判明した。
【００１２】
ここで、ＳｉＯ_２膜中でのＮ原子の拡散長の温度依存性は、以下の式から得ることができる。
【００１３】
【数１】

【数２】

ただし、Ｌ：拡散長、ｔ：窒化処理時間、Ｄ：拡散係数、Ｄ_０：拡散定数、Ｅ：活性化エネルギー、ｋ：ボルツマン定数、Ｔ：プロセス温度（Ｋ）。
【００１４】
上記検討において、窒化処理時間ｔが３０秒間の場合に拡散長Ｌが０．１５ｎｍであったことから（１）式を用いて拡散係数Ｄを求め、次に、（２）式においてプロセス温度Ｔが１０℃（≒２８３Ｋ）の場合に拡散反応の活性化エネルギーＥを２．５ｅＶ、２ｅＶ、１．５ｅＶ、１ｅＶと仮定して各々の活性化エネルギーＥに対する拡散係数Ｄ_０を求め、さらに、各々のＥ、Ｄ_０に対し（１）、（２）式から窒化処理を２０秒間行った場合における、拡散長Ｌの基板温度依存性を求めた。その結果を図３に示す。拡散長は活性化エネルギーに依存するものの、基板低温化によって低減し、例えば、フラッシュメモリ用の１０ｎｍ膜厚程度のＳｉＯ_２トンネル絶縁膜では１００℃以下、ＭＯＳゲート形成膜用の２ｎｍ膜厚程度のＳｉＯ_２ゲート絶縁膜では約３０℃以下の処理温度とすることによって、Ｎ原子の拡散をＳｉＯ_２膜厚未満に抑制可能なことが判明した。
【００１５】
一方、基板温度制御に加えて、基板に弱バイアス電圧を印加することによって、プラズマ中のイオン成分を照射して基板表面近傍のみを高温に加熱し、ＳｉＯ_２膜極表面でのＮ原子置換を促進することが可能となる。ここで、弱バイアス電圧とは、バイアス電圧によって加速されるイオン成分が、ＳｉＯ_２膜の再スパッタを生じない程度の電圧を示す。例えばアプライド・フィジクス・レターズ、５０巻、２１号（１９８７年）１５０６頁（公知例３）ないしはアプライド・フィジクス・レターズ、５２巻、５号（１９８８年）３６５頁（公知例４）によれば、アルゴン（Ａｒ）イオンをＳｉＯ_２膜に照射した場合、加速電圧が５０Ｖ未満になるとＳｉＯ_２膜の再スパッタが生じないか、あるいは、Ａｒイオンに対する再スパッタ原子の収率が１／１０以下に低減することが指摘されている。
【００１６】
したがって、バイアス電圧を０Ｖから５０Ｖ程度の範囲で制御することによって、低エネルギーイオンが到達可能な表層から０．５ｎｍ以内の浅い領域のみで、再スパッタをほとんど生じさせることなく、プラズマ中のＮラジカルとＳｉＯ_２膜中のＯ原子の置換反応を促進させるとともに、基板温度を１００℃以下の低温に保つことによってＮラジカルの失活が促進され、置換後のＮ原子拡散も抑制される結果、極薄のＳｉＯ_２膜の深さ方向に急峻なＮ原子濃度分布を形成することが可能となる。
【００１７】
上記の窒化処理がなされた後、ポリシリコン膜が堆積される。そして、図１１に示すように、ポリシリコン膜がホトリゾグラフィ技術によりパターニングされ、ゲート電極５０４が形成される。なお、ゲート電極５０４は、ポリシリコン膜上にＷの如き高融点金属膜が積層され低抵抗化を図った、ポリ・メタルゲート電極の適用も可能である。
つづいて、ゲート電極５０４が形成されていない活性領域５０１の表面に所定の不純物イオン（例えば、砒素イオン）が自己整合的に打ち込まれる。そして熱処理することにより、図１２に示すように、ソース領域５０５ｓおよびドレイン領域５０５ｄが形成される。
【００１８】
次に、１．２ｎｍ膜厚を有するゲートＳｉＯ_２膜の窒化処理について説明する。
図１において、チャンバ１内に１．２ｎｍ膜厚のＳｉＯ_２膜を形成したＳｉウェハ１６を搬送し、試料台１３上に固定した後、冷媒１５を循環させてＳｉウェハ１６を−２０℃の低温に保った。次に、ガス経路８からＮ_２ガス１０を２００ミリリットル／毎分（ｍｌ／ｍｉｎ）、ガス経路９からヘリウム（Ｈｅ）ガス１１を１００ｍｌ／ｍｉｎの流量で導入し、チャンバ内の圧力を５Ｐａに保った。次に、静電チャック１４に１ｋＶの電圧を印加するとともに、出力が８００Ｗの高周波５、５０Ｗの高周波１８をそれぞれ印加した結果、Ｎ_２ガス１０、Ｈｅガス１１の混合ガスがラジカル化、イオン化し、プラズマ１２が生成された。
【００１９】
図４にＳｉＯ_２膜表面近傍でのプラズマ窒化の反応模式図を示す。図４において、１００はＳｉ原子、１０１はＯ原子、１０２はＮ原子、１０３はＨｅ原子、１０４はＳｉウェハ表面近傍のＳｉ原子層、１０５はゲート絶縁膜としてドライ酸化により形成したＳｉＯ_２膜、１０６はＮ_２ラジカル、１０７はＨｅイオン、１０８はＮＯ基、１０９はＮラジカル、１１０はＮイオンである。この結果、図４に示すようにプラズマ１２中で特に質量数の小さいＨｅイオン１０７が約５０Ｖのバイアス電圧でＳｉＯ_２膜１０５の表面に照射され、Ｈｅイオン１０７が侵入できる表面から深さ０．５ｎｍ程度までの領域で、イオンアシストによるＮ_２ラジカル１０６中のＮ原子１０２とＳｉＯ_２膜１０５中のＯ原子１０１が置換され、ＮＯ基１０８が生成する反応が促進された。また、基板低温化によって、ＳｉＯ_２膜１０５中でのＮ原子１０２の拡散が抑制されることとなった。
【００２０】
図５に１．２ｎｍ膜厚のＳｉＯ_２膜について上記処理を３６秒間施した後、膜中に含まれるＮ原子％の深さ方向分布をＳＩＭＳ、ならびにＲＢＳで実測した結果を示す。図５に示すように、ＳｉＯ_２膜中で、Ｎ原子含有率がピーク値で３０％以上になるとともに、ＳｉＯ_２／Ｓｉ界面でＮ原子の析出が無い、急峻なＮ原子濃度分布が形成されることが確認された。また、エリプソメータを用いて、直径３００ｍｍのＳｉウェハ１５上で本窒化処理前後でのＳｉＯ_２膜厚分布を１００点に渡って測定した結果、窒化処理による膜厚増加分の変動はピーク・ツウ・ヴァレイ（ｐ−ｖ）値で０．０３ｎｍ以下、Ｎ原子濃度分布換算で±３％以下と、良好な面内均一性が得られた。
【００２１】
さらに、図６に膜厚が１ｎｍ、１．２ｎｍ、１．３ｎｍのＳｉＯ_２膜について、上記処理をそれぞれ３０秒間、３６秒間、４０秒間施した後、水素（Ｈ_２）雰囲気中でアニールを施し、さらにポリシリコンゲート電極を堆積させてＭＯＳトランジスタ構造を形成して１Ｖの動作電圧に対するリーク電流を測定した結果を示す。各膜厚のＳｉＯ_２膜に対して、リーク電流を約１／１００以下に低減可能なことが確認された。
【００２２】
本実施の形態では、Ｎ_２ガス１０にＨｅガス１１を添加し、Ｈｅイオン１０７によるイオン照射効果によって、プラズマ中のＮ_２ラジカル１０６とＳｉＯ_２膜１０５中のＯ原子１０１の置換反応を促進させたが、Ｈｅガスをネオン（Ｎｅ）、アルゴン（Ａｒ）、クリプトン（Ｋｒ）、キセノン（Ｘｅ）等、他の不活性ガスに変えても、同様な傾向の効果が得られた。また、不活性ガスを添加しない場合でも、図４に示すように、プラズマ中のＮイオン１１０の照射効果によって、Ｎラジカル１０９とＳｉＯ_２膜１０５中のＯ原子１０１との置換反応を誘起することが可能であった。また、基板温度を−２０℃としたが、液体窒素で冷却可能な−２００℃までの温度領域で、同様な傾向の効果が認められた。さらに、基板に対して高周波１８によって外部バイアス電圧を印加したが、ＳｉＯ_２表面の極近傍のみを窒化する場合、外部バイアス電圧を低減するか、外部バイアス電圧を印加せず、プラズマの自己バイアスのみでイオン照射を行っても、上記置換反応を誘起することが可能であった。
【００２３】
本実施の形態では、ドライ酸化により形成したＭＯＳトランジスタ用ゲート絶縁膜用ＳｉＯ_２膜に対してプラズマ窒化処理を施したが、層間絶縁膜や素子分離領域の形成、トップゲート型もしくはボトムゲート型薄膜トランジスタのゲート絶縁膜の形成、フラッシュメモリ用のトンネル絶縁膜の形成、さらには三酸化アルミニウム（Ａｌ_２Ｏ_３）、ＳｉＯ_２にジルコニウム（Ｚｒ）やハフニウム（Ｈｆ）を添加したシリケート、二酸化ジルコニウム（ＺｒＯ_２）、二酸化ハフニウム（ＨｆＯ_２）等のいわゆるＨｉｇｈ−ｋ材料膜の形成にも本方法が可能である。
（実施の形態２）
図１に示したプラズマ処理装置を用いてプラズマ窒化を行うとともに、反応ガスにアンモニア（ＮＨ_３）ガスを導入した場合の実施の形態について述べる。
図７にＳｉＯ_２膜表面近傍でのプラズマ窒化の反応模式図を示す。図７において２００は水素（Ｈ）原子、２０１はＮＨ_３ガスから生じたＮＨラジカル、２０２はＯＨ基、２０３はＮＨ_３ガスから生じたＮＨ_２ラジカル、２０４はＨ_２Ｏ分子である。
【００２４】
図１において、チャンバ１内にＳｉウェハ１６を搬送し、試料台１３上に固定した後、冷媒１５を循環させてＳｉウェハ１６を−２０℃の低温に保った。次に、ガス経路８からＮＨ_３ガス１０を２００ｍｌ／ｍｉｎ、ガス経路９からＨｅガス１１を１００ｍｌ／ｍｉｎの流量で導入し、チャンバ内の圧力を５Ｐａに保った。次に、静電チャック１４に１ｋＶの電圧を印加するとともに、出力が８００Ｗの高周波５、５０Ｗの高周波１８をそれぞれ印加した結果、ＮＨ_３ガス１０、Ｈｅガス１１の混合ガスがラジカル化、イオン化し、プラズマ１２が生成された。
【００２５】
この結果、図７に示すようにプラズマ１２中で、特に質量数の小さいＨｅイオン１０７が約５０Ｖのバイアス電圧でＳｉＯ_２膜１０５の表面に照射され、Ｈｅイオンが侵入できる表面から深さ０．５ｎｍ程度までの領域で、イオンアシストによるＮＨラジカル２０１中のＮ原子１０２とＳｉＯ_２膜１０５中のＯ原子１０１が置換され、ＯＨ基２０２が生成する反応、ないしはＮＨ_２ラジカル２０３中のＮ原子１０２とＳｉＯ_２膜１０５中のＯ原子１０１が置換され、Ｈ_２Ｏ分子２０４が生成する反応が促進された。また、基板低温化によって、ＳｉＯ_２膜１０５中でのＮ原子１０２の拡散が抑制されることとなった。
【００２６】
上記処理を膜厚が１．２ｎｍのＳｉＯ_２膜について２５秒間施した後、膜中のＮ原子％の深さ方向分布をＳＩＭＳ、ならびにＲＢＳで実測した結果、Ｎ原子含有率が３０％以上になるとともに、ＳｉＯ_２／Ｓｉ界面でＮ原子の析出が無い、急峻なＮ原子濃度分布が形成されていることが確認された。また、エリプソメータを用いて、直径３００ｍｍのＳｉウェハ１６上で本窒化処理前後でのＳｉＯ_２膜厚分布を１００点（ｐｏｉｎｔｓ）に渡って測定した結果、窒化処理による膜厚増加分の変動はｐ−ｖ値で０．０３ｎｍ以下、Ｎ原子濃度分布換算で±３％以下と、良好な面内均一性が得られた。なお、基板に対して高周波１８によって外部バイアス電圧を印加したが、ＳｉＯ_２表面の極近傍のみを窒化する場合、外部バイアス電圧を低減するか、外部バイアス電圧を印加せず、プラズマの自己バイアスのみでイオン照射を行っても、上記置換反応を誘起することが可能であった。
【００２７】
さらに、膜厚が１ｎｍ、１．２ｎｍ、１．３ｎｍのＳｉＯ_２膜について、上記処理をそれぞれ２０秒間、２５秒間、３０秒間施した後、Ｈ_２雰囲気中でアニールを施し、さらにポリシリコンゲート電極を堆積させてＭＯＳトランジスタ構造を形成して１Ｖの動作電圧に対するリーク電流を測定した結果、各膜厚のＳｉＯ_２膜に対して、リーク電流を約１／１００以下に低減可能なことが確認された。
（実施の形態３）
同一チャンバ内ないしはクラスターチャンバ内でプラズマ酸化によるＳｉＯ_２膜形成と、ＳｉＯ_２膜のプラズマ窒化を行った場合の実施の形態について、図８および図９を参照し、述べる。
図８において、３００はＳｉウェハ、３０１は窒化アルミニウム製の静電チャック、３０２は静電チャック３０１に組み込まれたタングステン製のヒータ、３０３はヒータ３０２に印加された直流電圧である。また、図９において４００はウェハ投入部、４０１はウェハ搬出部、４０２はウェハ搬送部、４０３はウェハ搬送機構、４０４はプラズマ酸化用チャンバ、４０５はプラズマ窒化用チャンバである。
なお、Ｓｉウェハ３００は直径３００ｍｍを有する。そして、このＳｉウェハ３００は、チャンバ１内への搬送に先立つて、水酸化アンモニウム（ＮＨ_４ＯＨ）／過酸化水素（Ｈ_２Ｏ_２）水溶液で洗浄し、さらに、塩酸（ＨＣｌ）／過酸化水素（Ｈ_２Ｏ_２）水溶液を用いた洗浄により、自然酸化膜や金属汚染が除去される。
【００２８】
図８において、チャンバ１内にＳｉウェハ３００を搬送し、試料台１３の静電チャック３０１上に固定した。次にヒータ３０２に直流電圧３０３を印加し、Ｓｉウェハ３００の表面温度を６００℃に保った。次に、ガス経路８からＯ_２ガス１０を２０００ｍｌ／ｍｉｎの流量で導入し、チャンバ内の圧力を５０Ｐａに保った。次に静電チャック３０１に１ｋＶの電圧を印加するとともに、出力が１ｋＷの高周波５を１２０秒間印加した結果、Ｏ_２ガスがプラズマ１１中でラジカル化してＳｉウェハ１５表面のラジカル酸化が促進され、膜厚１．２ｎｍのＳｉＯ_２膜が形成された。なお、透過型電子顕微鏡によるこのＳｉＯ_２膜の断面観察結果から、ＳｉＯ_２／Ｓｉ界面の粗さは０．１ｎｍ　ｒｍｓと良好なことが確認された。また、Ｏ_２ガス１０へのＨｅ、Ａｒ等の不活性ガス添加、ないしは高周波１８の印加により、酸化速度を制御することが可能であった。
【００２９】
次に、試料台１３内に冷媒１５を循環させてＳｉウェハを−２０℃の低温に保った。次に、ガス経路９から、Ｎ_２ガスとＨｅガスを２：１の割合で混合したガス１１を３００ｍｌ／ｍｉｎの流量で導入し、チャンバ内の圧力を５Ｐａに保った。次に、静電チャック２００に１ｋＶの電圧を印加するとともに、出力が８００Ｗの高周波５、５０Ｗの高周波１８を印加した結果、Ｎ_２とＨｅの混合ガス１０がラジカル化、イオン化し、プラズマ１２が生成された。
【００３０】
この結果、図４に示すようにプラズマ１１中で特に質量数の小さいＨｅイオン１０７が約５０Ｖのバイアス電圧でＳｉＯ_２膜１０５の表面に照射され、Ｈｅイオンが侵入できる表面から深さ０．５ｎｍ程度までの領域で、イオンアシストによるＮ_２ラジカル１０６ないしＮラジカル１０９中のＮ原子と、ＳｉＯ_２膜１０５中のＯ原子１０１の置換反応が促進された。また、基板低温化によってＮ原子１０２のＳｉＯ_２膜１０５中での拡散が抑制されることとなった。
【００３１】
本処理を３０秒間施した後、膜中に含まれるＮ原子％の深さ方向分布をＳＩＭＳ、ならびにＲＢＳで実測した結果、Ｎ原子含有率が３０％以上になるとともに、ＳｉＯ_２／Ｓｉ界面でＮ原子の析出が無い、急峻なＮ原子濃度分布が形成されていることが確認された。また、エリプソメータを用いて、直径３００ｍｍのＳｉウェハ３００上で本窒化処理前後でのＳｉＯ_２膜厚分布を１００点に渡って測定した結果、窒化処理による膜厚増加分の変動はｐ−ｖ値で０．０３ｎｍ以下、Ｎ原子濃度分布換算で±３％以下と、良好な面内均一性が得られた。なお、基板に対して高周波１８によって外部バイアス電圧を印加したが、ＳｉＯ_２表面の極近傍のみを窒化する場合、外部バイアス電圧を低減するか、外部バイアス電圧を印加せず、プラズマの自己バイアスのみでイオン照射を行っても、上記置換反応を誘起することが可能であった。
【００３２】
さらに、本処理を行ったＳｉＯ_２膜にＨ_２雰囲気中でアニールを施し、さらにポリシリコンゲート電極を堆積させてＭＯＳトランジスタ構造を形成して１Ｖの動作電圧に対するリーク電流を測定した結果、リーク電流を約１／１００以下に低減可能なことが確認された。
【００３３】
本実施の形態では、Ｎ_２とＨｅの混合ガスを反応ガス１１に用い、Ｈｅイオン１０７によるイオン照射効果によって、プラズマ中のＮラジカル１０６とＳｉＯ_２膜１０５中のＯ原子１００の置換反応を促進させたが、Ｈｅガスを添加しない場合でも、図４に示すように、プラズマ中のＮイオン１０９の照射効果によって上記置換反応を誘起することが可能であった。また、基板に対して外部から５０Ｖのバイアス電圧を印加したが、ＳｉＯ_２膜１０５表面極近傍のみを窒化する場合、外部からバイアス電圧を印加せず、プラズマ電位のみの加速でイオン照射を行い、上記置換反応を誘起することが可能であった。さらに、反応ガス１１にＮＨ_３とＨｅの混合ガスを用いても、実施の形態２と同様に、ＳｉＯ_２膜１０５を効率よく窒化させることが可能であった。
【００３４】
以上、本実施の形態に示すようにチャンバ１内での一貫処理によって、通常の熱酸化工程と比べて低温で、ゲート絶縁膜用ＳｉＯ_２膜の堆積、ならびにその窒化処理が可能である。
（実施の形態４）
本実施の形態は、図９に示すように、プラズマ酸化用チャンバ４０４とプラズマ窒化用チャンバ４０５とを分離、独立してクラスターチャンバ化させたプラズマ処理装置である。図９において、ウェハ投入部（ローダ）４００から投入したウェハを、搬送室４０２内のウエハ搬送用のハンドラ４０３を用いてチャンバ４０４に搬送してプラズマ酸化処理を行い、さらにチャンバ４０５に搬送してプラズマ窒化処理を行う。そして、プラズマ処理後、ウェハをウェハ搬出部（アンローダ）４０１へ格納させる。すなわち、本実施の形態によるプラズマ処理装置は、プラズマ酸化処理室（プラズマ酸化用チャンバ４０４）と、前記プラズマ酸化処理室内に設けられた前記半導体基板を設置するための試料台（図８、試料台１３）と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナ（図８、アンテナ３）と、前記試料台に設けられたヒータ（図８、ヒータ３０２）とから成る第１処理装置と、プラズマ窒化処理室（プラズマ窒化用チャンバ４０５）と、前記プラズマ窒化処理室内に設けられた前記半導体基板を設置するための試料台（図１、試料台１３）と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナ（図１、アンテナ３）と、前記試料台に設けられた冷媒循環手段（図１、パイプ１５ａ）とから成る第２処理装置と、ハンドラ４０３が設置された搬送室４０２と、から成ることを特徴とする。
本実施の形態のように、プラズマ酸化処理とプラズマ窒化処理とを別チャンバで実行しているため、それら処理による基板温度制御を独立して行うことができ、スループットが向上する。
以上、本発明の実施の形態を述べたが、これらの実施の形態およびその変更例から導き出され、特許請求の範囲に記載していない本発明の特徴事項を以下に列挙する。
（１）主面に酸化膜を有する半導体基板に対しプラズマ窒化処理するための処理室（チャンバ）と、前記処理室内に設けられた前記半導体基板を設置するための試料台と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナと、窒素ないしは窒素化合物を含んだ反応ガスを前記処理室内に導入するためのガス導入部と、前記試料台に設けられた冷媒循環手段とから成り、前記冷媒循環手段により前記半導体基板を１００℃以下の低温に保つようにしたことを特徴とするプラズマ処理装置。
（２）前記（１）において、前記前記冷媒循環手段は前記試料台内部に設けられたパイプよりなることを特徴とするプラズマ処理装置。
（３）前記（１）において、前記ＵＨＦ帯域は１００ＭＨｚから１０００ＭＨｚであることを特徴とするプラズマ処理装置。
（４）前記（２）において、前記パイプ内に循環される冷媒は液化窒素が用いられることを特徴とするプラズマ処理装置。
（５）前記（１）において、前記試料台にはＲＦバイアスが印加されることを特徴とするプラズマ処理装置。
（６）処理室（チャンバ）と、前記処理室内に設けられた前記半導体基板を設置するための試料台と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナと、窒素ないしは窒素化合物を含んだ反応ガスを前記処理室内に導入するためのガス導入部と、前記試料台に設けられた冷媒循環手段と、前記試料台に設けられたヒータとから成り、前記半導体基板主面に酸化膜を形成する段階で前記ヒータにより前記半導体基板を加熱し、前記酸化膜の窒化処理する段階で、前記冷媒循環手段により前記半導体基板を１００℃以下の低温に保つようにしたことを特徴とするプラズマ処理装置。
（７）プラズマ酸化処理室と、前記第１のプラズマ酸化処理室内に設けられた前記半導体基板を設置するための試料台と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナと、前記試料台に設けられたヒータとから成る第１処理装置と、
プラズマ窒化処理室と、前記第１のプラズマ酸化処理室内に設けられた前記半導体基板を設置するための試料台と、前記試料台に対向して配置され、ＵＨＦ帯域の高周波を供給するためのアンテナと、前記試料台に設けられた冷媒循環手段とから成る第２処理装置と、
ハンドラが設置された搬送室と、
から成ることを特徴とするプラズマ処理装置。
【００３５】
【発明の効果】
本発明によれば、大口径Ｓｉウェハ上に形成したゲート絶縁膜用の極薄ＳｉＯ_２膜に対し、膜中のＮ原子含有率が２５％以上で、含有量の面内分布も±５％未満、さらにＳｉ／ＳｉＯ_２界面へのＮ原子の析出も無視できるレベルと、Ｎ原子含有率ならびにその面内均一性が高く、かつ、急峻なＮ原子濃度分布形成が可能なプラズマ窒化方法ならびに窒化装置を提供することが可能になる。
【図面の簡単な説明】
【図１】本発明のプラズマ窒化方法を実施するための窒化処理装置の概念図である。
【図２】本発明の実施の形態１に係わるＮ原子％の深さ方向分布を示す特性図である。
【図３】図２の実験結果に基づき、基板温度依存性を計算から求めた特性図である。
【図４】本発明の実施の形態１に係わるＳｉＯ_２膜表面近傍での反応模式図である。
【図５】本発明の実施の形態１に係わるＮ原子％の深さ方向分布を示す特性図である。
【図６】本発明の実施の形態１に係わるＳｉＯ_２膜のゲートリーク電流を示す特性図である。
【図７】本発明の実施の形態２に係わるＳｉＯ_２膜表面近傍での反応模式図である。
【図８】本発明の実施の形態３に係わるプラズマ処理装置の概念図である。
【図９】本発明の実施の形態４に係わるプラズマ処理装置の概念図である。
【図１０】本発明の実施の形態１に係わる半導体装置の製造過程を示す断面図である。
【図１１】本発明の実施の形態１に係わる半導体装置の製造過程を示す断面図である。
【図１２】本発明の実施の形態１に係わる半導体装置の製造過程を示す断面図である。
【符号の説明】
１…チャンバ、２…チャンバの排気、３…アンテナ、４…永久磁石、５…周波数４５０ＭＨｚのＵＨＦ帯高周波、６…石英板、７…シャワープレート、８、９…反応ガス導入経路、１０…反応ガス、１１…反応ガス、１２…反応ガスのプラズマ、１３…試料台、１４…静電チャック、１５…冷媒、１６…Ｓｉウェハ、１７…コンデンサ、１８…周波数１３．５６ＭＨｚのＨＦ帯高周波、
１００…Ｓｉ原子、１０１…Ｏ原子、１０２…Ｎ原子、１０３…Ｈｅ原子、１０４…Ｓｉ原子層、１０５…ＳｉＯ_２膜、１０６…Ｎ_２ラジカル、１０７…Ｈｅイオン、１０８…ＮＯ基、１０９…Ｎラジカル、１１０…Ｎイオン、
２００…Ｈ原子、２０１…ＮＨラジカル、２０２…ＯＨ基、２０３…ＮＨ_２ラジカル、２０４…Ｈ_２Ｏ分子、
３００…Ｓｉウェハ、３０１…窒化アルミニウム製の静電チャック、３０２…ヒータ、３０３…ヒータ３０２に印加された直流電圧、
４００…ウェハ投入部、４０１…ウェハ搬出部、４０２…ウェハ搬送部、４０３…ハンドラ、４０４…プラズマ酸化用チャンバ、４０５…プラズマ窒化用チャンバ
５００…Ｓｉ基板、５０１…活性領域、５０２…素子分離領域、５０３…ゲート酸化膜、５０４…ゲート電極、５０５ｓ…ソース領域、５０５ｄ…ドレイン領域。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device manufacturing technique, and more particularly to a method for nitriding a gate insulating film of a MOS transistor.
[0002]
[Prior art]
One of the basic manufacturing processes of a semiconductor device called an LSI or a super LSI includes a process of forming a gate insulating film on the surface of a silicon (Si) substrate after forming an element isolation region.
Generally, a silicon oxide film (SiO 2) formed by dry oxidation of a Si substrate is used as a gate insulating film. ₂ ) Is used. However, as the semiconductor integrated circuit device becomes extremely fine, its thickness becomes extremely thin, and a device having a thickness of 1.5 nm or less is required for devices of 100 nm node or later.
[0003]
SiO ₂ As the thickness of the film becomes extremely thin, studies are proceeding with the aim of reducing gate leakage current, preventing boron (B) from penetrating through the upper polysilicon gate electrode, and improving the dielectric constant. ₂ This is a nitriding treatment in which nitrogen (N) atoms are contained in the film surface layer. SiO ₂ As the nitridation treatment of the film, as described in, for example, itriple E Transaction on Electron Device, Vol. 41, No. 9, (1994), p. 1608 (known example 1), nitric oxide (NO) or Nitrous oxide (N ₂ O) A method of annealing in an atmosphere of gas has been studied. However, in this method, the process temperature is as high as 600 ° C. to 900 ° C. ₂ Diffusion of N atoms occurs in the film, and Si / SiO ₂ Since it precipitates at the interface and degrades the device characteristics, ₂ The N atom content in the film was limited, and it was difficult to obtain a sufficient effect on the above problem.
[0004]
On the other hand, as described in, for example, Japanese Patent Application Laid-Open No. 2001-274148 (known example 2), for example, SiO 2 is introduced in an N plasma atmosphere excited by a microwave of 2.45 GHz. ₂ Exposing the film, SiO ₂ By replacing oxygen (O) atoms in the film with N radicals in the plasma, SiO ₂ A plasma nitridation method for containing a high concentration of N atoms in a film has been studied.
[0005]
[Problems to be solved by the invention]
According to the plasma nitriding method described in the above-mentioned known example 2, NO or N ₂ Compared to the nitridation method by O annealing, SiO ₂ A sharp N atom concentration distribution can be formed in the film. However, in order to increase the N atom content under a so-called remote plasma condition in which the substrate is separated from the plasma atmosphere, it is necessary to maintain the substrate temperature at 250 ° C. or higher.
As a result, SiO ₂ Diffusion of N atoms occurs in the film, and Si / SiO ₂ Since N atoms precipitate at the interface, for example, SiO ₂ When the film was as thin as 1.5 nm, it was difficult to increase the N atom content in the film to 20% or more.
In addition, due to the non-uniformity of the plasma density in the chamber, for example, SiO 2 on a 300 mm diameter Si wafer ₂ The N atom content distribution in the film was also insufficient at ± 5% or more.
[0006]
An object of the present invention is to provide an oxide film (SiO 2) for a gate insulating film formed on the surface of a semiconductor (Si) substrate. ₂ ), The N atom content in the film is 25% or more, the in-plane distribution of the content is less than ± 5%, and the Si / SiO ₂ The object is to enable the formation of a sharp N-atom concentration distribution with a high N-atom content and in-plane uniformity at a level where n-atom precipitation at the interface is negligible.
[0007]
[Means for Solving the Problems]
According to the present invention, while maintaining the semiconductor substrate at a temperature at which the diffusion length of N atoms contained in the insulating film does not exceed the insulating film thickness during the nitriding treatment, and performing the nitriding on the substrate, The bias voltage value applied to the substrate from the outside is controlled in a region where the ion component accelerated by the bias voltage does not cause re-sputtering of the insulating film, and only the vicinity of the substrate surface is irradiated by the ion component. It is characterized by heating to a high temperature.
As a result, N radicals in the plasma and SiO ₂ The substitution reaction of O atoms in the film can be promoted only in a shallow region within 0.5 nm from the surface layer, where low-energy ion components can reach.
Further, by maintaining the substrate at a temperature at which the diffusion length of N atoms does not exceed the thickness of the insulating film during the nitriding treatment, the deactivation reaction of N radicals is promoted and the diffusion of N atoms after substitution is suppressed. It becomes possible. As a result, extremely thin SiO ₂ It is possible to form a sharp N atom concentration distribution in the depth direction of the film.
[0008]
In addition, a problem arises when a high frequency band on the order of several GHz is used by using a band having a wavelength of 300 mm or more and a frequency of 1000 MHz or less as a high frequency for exciting the plasma, and a wavelength similar to that of a wafer-compatible chamber having a diameter of 300 mm or more. In addition, local non-uniformity of plasma due to higher-order mode standing waves can be eliminated. On the other hand, by using a high frequency of 100 MHz or more, ion irradiation damage to the chamber inner wall and the substrate due to the RF self-bias voltage in the plasma can be reduced.
Further, by attaching a permanent magnet to an antenna or a chamber that supplies microwaves and applying a magnetic field to the plasma, the stability and density uniformity of the plasma are improved. As a result, it is possible to improve the uniformity of the N atom concentration in the surface of the large-diameter Si wafer.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
(Embodiment 1)
Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1, 2, 3, 4, 5, and 6. FIG. FIG. 1 shows an apparatus configuration for performing the plasma nitriding method of the present invention. In FIG. 1, reference numeral 1 denotes a chamber, 2 denotes exhaust of a chamber by an exhaust means such as a turbo molecular pump, 3 denotes a microstrip antenna, 4 denotes a permanent magnet embedded with an antenna, 5 denotes a frequency of 100 MHz to 1000 MHz, and more specifically. , A high frequency power supply in the UHF band of 450 MHz, 6 is a quartz plate, 7 is a shower plate, 8 and 9 are gas introduction paths composed of mass flow controllers, valves, etc., 10 and 11 are reaction gases, and 12 is a reaction gas. Plasma, 13 is a sample stage opposed to the antenna, 14 is an electrostatic chuck mounted on the sample stage, 15 is a coolant circulating in the sample stage, 16 is a gate insulating film formed of SiO by dry oxidation. ₂ A 300 mm diameter Si wafer (sample) on which a film is formed, 17 is a capacitor, and 18 is a high frequency power supply (RF bias) in the RF band having a frequency of 13.56 MHz.
[0010]
First, a gate SiO having a thickness of 10 nm is formed. ₂ The nitriding of the film will be described.
In FIG. 1, a 10 nm thick SiO ₂ After transporting the Si wafer 16 on which the film was formed and fixing it on the sample stage 13, the coolant 15 was circulated to keep the Si wafer 16 at 10 ° C. As shown in FIG. 10, the element isolation region 502 is formed on the surface of the Si substrate 500 of the Si wafer 16 so as to divide the region (active region) 501 where the MOS transistor is formed. The element isolation region 502 is configured by a shallow trench isolation structure. Then, a gate SiO 2 is formed on the surface of the active region 501. ₂ A film 503 is formed.
Next, N ₂ Gas 10 was introduced at a flow rate of 200 ml / min (ml / min), and the pressure in the chamber was maintained at 4 Pa. Next, while applying a voltage of 1 kV to the electrostatic chuck 14 and applying a high frequency 5 having an output of 1.2 kW, N ₂ The gas 10 was radicalized and ionized, and a plasma 12 was generated.
[0011]
FIGS. 2 (a) and 2 (b) show that the plasma nitridation of the SiO 2 was performed in the plasma 12 for 30 seconds and 60 seconds, respectively. ₂ The results obtained by actually measuring the distribution of N atom% in the depth direction of the film by secondary ion mass spectrometry (SIMS) and Rutherford backscattering (RBS) are shown. SiO for the first 30 seconds ₂ Since the film surface was almost changed to silicon nitride (SiN), subsequent nitridation was performed using N radicals and N ₂ Radical diffusion and N by self-bias ⁺ It was found that the diffusion length due to the main nitriding treatment was estimated to be 0.15 nm because the ion concentration progressed due to the ion knock-on effect and the interface of equal concentration moved by about 0.15 nm by the treatment for 30 seconds.
[0012]
Where SiO ₂ The temperature dependence of the diffusion length of N atoms in the film can be obtained from the following equation.
[0013]
(Equation 1)

(Equation 2)

Here, L: diffusion length, t: nitriding time, D: diffusion coefficient, D ₀ : Diffusion constant, E: activation energy, k: Boltzmann constant, T: process temperature (K).
[0014]
In the above study, since the diffusion length L was 0.15 nm when the nitriding time t was 30 seconds, the diffusion coefficient D was obtained using the equation (1). Is 10 ° C. (≒ 283 K), the diffusion coefficient D for each activation energy E is assumed assuming that the activation energy E of the diffusion reaction is 2.5 eV, 2 eV, 1.5 eV, and 1 eV. ₀ , And E, D ₀ On the other hand, the dependence of the diffusion length L on the substrate temperature when the nitriding treatment was performed for 20 seconds was obtained from the equations (1) and (2). The result is shown in FIG. Although the diffusion length depends on the activation energy, the diffusion length is reduced by lowering the temperature of the substrate. ₂ In a tunnel insulating film, a SiO 2 film having a thickness of about 2 nm or less for a MOS gate forming film at 100 ° C. or less. ₂ By setting the processing temperature of the gate insulating film to about 30 ° C. or less, the diffusion of N ₂ It was found that the thickness can be suppressed to less than the film thickness.
[0015]
On the other hand, in addition to controlling the substrate temperature, a weak bias voltage is applied to the substrate to irradiate ion components in the plasma to heat only the vicinity of the substrate surface to a high temperature. ₂ It becomes possible to promote the substitution of N atoms on the surface of the film electrode. Here, the weak bias voltage means that the ion component accelerated by the bias voltage is SiO 2 ₂ This indicates a voltage that does not cause re-sputtering of the film. For example, according to Applied Physics Letters, Vol. 50, No. 21, (1987), p. 1506 (Known Example 3) or Applied Physics Letters, Vol. 52, No. 5, (1988), p. 365 (Known Example 4), Argon (Ar) ions are converted to SiO ₂ When the film is irradiated, if the accelerating voltage becomes less than 50 V, SiO ₂ It is pointed out that resputtering of the film does not occur or the yield of resputtered atoms with respect to Ar ions is reduced to 1/10 or less.
[0016]
Therefore, by controlling the bias voltage in the range of about 0 V to about 50 V, N radicals in the plasma are hardly generated only in a shallow region within 0.5 nm from the surface layer where low energy ions can reach, without causing re-sputtering. And SiO ₂ While promoting the substitution reaction of O atoms in the film and maintaining the substrate temperature at a low temperature of 100 ° C. or less, deactivation of N radicals is promoted and diffusion of N atoms after substitution is suppressed. ₂ It is possible to form a sharp N atom concentration distribution in the depth direction of the film.
[0017]
After the above-described nitriding process, a polysilicon film is deposited. Then, as shown in FIG. 11, the polysilicon film is patterned by photolithography to form a gate electrode 504. As the gate electrode 504, a polymetal gate electrode in which a high-melting-point metal film such as W is laminated on a polysilicon film to reduce the resistance can be used.
Subsequently, predetermined impurity ions (for example, arsenic ions) are implanted in a self-aligned manner on the surface of the active region 501 where the gate electrode 504 is not formed. By performing the heat treatment, a source region 505s and a drain region 505d are formed as shown in FIG.
[0018]
Next, a gate SiO having a thickness of 1.2 nm is formed. ₂ The nitriding of the film will be described.
In FIG. 1, a 1.2-nm thick SiO ₂ After transporting the Si wafer 16 on which the film was formed and fixing it on the sample stage 13, the coolant 15 was circulated to keep the Si wafer 16 at a low temperature of −20 ° C. Next, N ₂ Helium (He) gas 11 was introduced at a flow rate of 200 ml / min (100 ml / min) from the gas path 9 with the gas 10 at 200 ml / min (ml / min), and the pressure in the chamber was maintained at 5 Pa. Next, while applying a voltage of 1 kV to the electrostatic chuck 14 and applying a high frequency 5 of 800 W output and a high frequency 18 of 50 W respectively, ₂ The mixed gas of the gas 10 and the He gas 11 was radicalized and ionized, and the plasma 12 was generated.
[0019]
FIG. ₂ The reaction schematic diagram of the plasma nitridation near the film surface is shown. In FIG. 4, reference numeral 100 denotes Si atoms, 101 denotes O atoms, 102 denotes N atoms, 103 denotes He atoms, 104 denotes a Si atomic layer near the surface of a Si wafer, and 105 denotes a gate insulating film formed by dry oxidation. ₂ Membrane, 106 is N ₂ A radical, 107 is a He ion, 108 is a NO group, 109 is an N radical, and 110 is an N ion. As a result, as shown in FIG. 4, He ions 107 having a particularly small mass number in the plasma 12 are converted to SiO 2 at a bias voltage of about 50 V. ₂ Irradiation is performed on the surface of the film 105, and in a region from the surface where the He ions 107 can penetrate to a depth of about 0.5 nm, N ₂ N atom 102 in radical 106 and SiO ₂ The O atom 101 in the film 105 was replaced, and the reaction to generate the NO group 108 was promoted. Also, by lowering the temperature of the substrate, SiO ₂ The diffusion of the N atoms 102 in the film 105 is suppressed.
[0020]
FIG. 5 shows a SiO film having a thickness of 1.2 nm. ₂ The results obtained by measuring the distribution in the depth direction of N atom% contained in the film by SIMS and RBS after performing the above-described treatment on the film for 36 seconds are shown. As shown in FIG. ₂ In the film, while the N atom content becomes 30% or more at the peak value, ₂ It was confirmed that a steep N atom concentration distribution without N atom precipitation at the / Si interface was formed. Further, using an ellipsometer, the SiO 2 before and after the main nitriding treatment was formed on a Si wafer 15 having a diameter of 300 mm. ₂ As a result of measuring the film thickness distribution over 100 points, the fluctuation of the film thickness increase due to the nitriding treatment is 0.03 nm or less in peak-to-valley (p-v) value, and ± 3% or less in terms of N atom concentration distribution. , Good in-plane uniformity was obtained.
[0021]
Further, FIG. 6 shows a 1 nm, 1.2 nm, 1.3 nm thick SiO 2 film. ₂ The film was subjected to the above treatment for 30 seconds, 36 seconds and 40 seconds, respectively, and then hydrogen (H ₂ 3) shows the result of measuring the leakage current with respect to an operating voltage of 1 V by performing annealing in an atmosphere and further depositing a polysilicon gate electrode to form a MOS transistor structure. SiO of each film thickness ₂ It was confirmed that the leakage current of the film could be reduced to about 1/100 or less.
[0022]
In the present embodiment, N ₂ He gas 11 is added to gas 10, and the ion irradiation effect of He ions 107 causes N ₂ Radical 106 and SiO ₂ Although the substitution reaction of the O atoms 101 in the film 105 was promoted, even if the He gas was changed to another inert gas such as neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), The effect of the similar tendency was obtained. Even when no inert gas is added, as shown in FIG. 4, the N radicals 109 and SiO ₂ It was possible to induce a substitution reaction with the O atoms 101 in the film 105. Although the substrate temperature was set to −20 ° C., the same effect was observed in a temperature range up to −200 ° C. where cooling with liquid nitrogen was possible. Further, an external bias voltage was applied to the substrate by the high frequency 18, ₂ When nitriding only in the vicinity of the surface, it is possible to induce the above substitution reaction by reducing the external bias voltage or performing ion irradiation only by the plasma self-bias without applying the external bias voltage. Was.
[0023]
In the present embodiment, SiO for a gate insulating film for a MOS transistor formed by dry oxidation is used. ₂ Although the film was subjected to plasma nitridation, formation of an interlayer insulating film and an element isolation region, formation of a gate insulating film of a top gate or bottom gate thin film transistor, formation of a tunnel insulating film for flash memory, and Aluminum oxide (Al ₂ O ₃ ), SiO ₂ Silicate with zirconium (Zr) or hafnium (Hf) added thereto, zirconium dioxide (ZrO ₂ ), Hafnium dioxide (HfO) ₂ This method is also applicable to the formation of a so-called High-k material film such as
(Embodiment 2)
Plasma nitriding is performed using the plasma processing apparatus shown in FIG. 1, and ammonia (NH ₃ An embodiment in which a gas is introduced will be described.
FIG. ₂ The reaction schematic diagram of the plasma nitridation near the film surface is shown. In FIG. 7, 200 is a hydrogen (H) atom, 201 is NH ₃ NH radical generated from gas, 202 is OH group, 203 is NH ₃ NH generated from gas ₂ Radical, 204 is H ₂ O molecule.
[0024]
In FIG. 1, a Si wafer 16 was transported into a chamber 1 and fixed on a sample stage 13, and then a coolant 15 was circulated to keep the Si wafer 16 at a low temperature of −20 ° C. Next, from the gas path 8, NH ₃ The gas 10 was introduced at a flow rate of 200 ml / min, the He gas 11 was introduced at a flow rate of 100 ml / min from the gas path 9, and the pressure in the chamber was maintained at 5 Pa. Next, a voltage of 1 kV was applied to the electrostatic chuck 14 and a high frequency 5 of 800 W output and a high frequency 18 of 50 W were respectively applied. ₃ The mixed gas of the gas 10 and the He gas 11 was radicalized and ionized, and the plasma 12 was generated.
[0025]
As a result, as shown in FIG. 7, in the plasma 12, He ions 107 having a particularly small mass number ₂ The N atoms 102 in the NH radical 201 and the SiO 2 are ion-assisted in the region from the surface where the He ions can penetrate to the surface to a depth of about 0.5 nm. ₂ A reaction in which the O atoms 101 in the film 105 are substituted to generate an OH group 202, or NH ₂ N atom 102 in radical 203 and SiO ₂ O atoms 101 in the film 105 are substituted, and H ₂ The reaction to generate O molecules 204 was promoted. Also, by lowering the temperature of the substrate, SiO ₂ The diffusion of the N atoms 102 in the film 105 is suppressed.
[0026]
The above treatment was carried out using a 1.2 nm thick SiO ₂ After the film was applied for 25 seconds, the depth direction distribution of N atom% in the film was measured by SIMS and RBS, and as a result, the N atom content became 30% or more and SiO ₂ It was confirmed that a steep N atom concentration distribution without N atom precipitation at the / Si interface was formed. Further, using an ellipsometer, the SiO 2 before and after the main nitriding treatment was formed on the Si wafer 16 having a diameter of 300 mm. ₂ As a result of measuring the film thickness distribution over 100 points (points), the variation of the film thickness increase due to the nitriding treatment was 0.03 nm or less in pv value and ± 3% or less in N atom concentration distribution conversion. In-plane uniformity was obtained. Although an external bias voltage was applied to the substrate by the high frequency 18, SiO 2 ₂ When nitriding only in the vicinity of the surface, it is possible to induce the above substitution reaction by reducing the external bias voltage or performing ion irradiation only by the plasma self-bias without applying the external bias voltage. Was.
[0027]
Further, SiO having a thickness of 1 nm, 1.2 nm, and 1.3 nm is used. ₂ The film was subjected to the above treatment for 20 seconds, 25 seconds, and 30 seconds, respectively, ₂ Annealing was performed in an atmosphere, a polysilicon gate electrode was further deposited to form a MOS transistor structure, and a leakage current was measured for an operating voltage of 1 V. ₂ It was confirmed that the leakage current of the film could be reduced to about 1/100 or less.
(Embodiment 3)
SiO by plasma oxidation in the same chamber or cluster chamber ₂ Film formation and SiO ₂ An embodiment in which plasma nitridation of a film is performed will be described with reference to FIGS.
8, reference numeral 300 denotes an Si wafer; 301, an electrostatic chuck made of aluminum nitride; 302, a heater made of tungsten incorporated in the electrostatic chuck 301; 303, a DC voltage applied to the heater 302; In FIG. 9, reference numeral 400 denotes a wafer input unit, 401 denotes a wafer unloading unit, 402 denotes a wafer transfer unit, 403 denotes a wafer transfer mechanism, 404 denotes a plasma oxidation chamber, and 405 denotes a plasma nitridation chamber.
The Si wafer 300 has a diameter of 300 mm. Then, prior to the transfer into the chamber 1, the Si wafer 300 is treated with ammonium hydroxide (NH). ₄ OH) / hydrogen peroxide (H ₂ O ₂ ) Wash with aqueous solution and add hydrochloric acid (HCl) / hydrogen peroxide (H ₂ O ₂ ) Natural oxide film and metal contamination are removed by washing with an aqueous solution.
[0028]
In FIG. 8, a Si wafer 300 is transferred into a chamber 1 and fixed on an electrostatic chuck 301 of a sample stage 13. Next, a DC voltage 303 was applied to the heater 302 to maintain the surface temperature of the Si wafer 300 at 600 ° C. Next, O ₂ Gas 10 was introduced at a flow rate of 2000 ml / min, and the pressure in the chamber was kept at 50 Pa. Next, while applying a voltage of 1 kW to the electrostatic chuck 301 and applying a high frequency 5 having an output of 1 kW for 120 seconds, ₂ The gas is radicalized in the plasma 11 and radical oxidation on the surface of the Si wafer 15 is promoted. ₂ A film was formed. In addition, this SiO ₂ From the cross-sectional observation results of the film, ₂ It was confirmed that the roughness of the / Si interface was as good as 0.1 nm rms. Also, O ₂ The oxidation rate could be controlled by adding an inert gas such as He or Ar to the gas 10 or applying a high frequency 18.
[0029]
Next, the coolant 15 was circulated in the sample stage 13 to keep the Si wafer at a low temperature of −20 ° C. Next, from the gas path 9, N ₂ Gas 11 in which gas and He gas were mixed at a ratio of 2: 1 was introduced at a flow rate of 300 ml / min, and the pressure in the chamber was maintained at 5 Pa. Next, while applying a voltage of 1 kV to the electrostatic chuck 200 and applying a high frequency 5 of 800 W output and a high frequency 18 of 50 W output, N ₂ The mixed gas 10 of He and He is radicalized and ionized, and the plasma 12 is generated.
[0030]
As a result, as shown in FIG. 4, He ions 107 having a particularly small mass number in the plasma 11 are converted into SiO 2 ions at a bias voltage of about 50 V. ₂ The surface of the film 105 is irradiated with ion-assisted N2 in a region from the surface where He ions can enter to a depth of about 0.5 nm. ₂ N atoms in the radicals 106 to 109 and SiO ₂ The substitution reaction of the O atoms 101 in the film 105 was promoted. Further, by lowering the temperature of the substrate, the SiO 2 ₂ The diffusion in the film 105 was suppressed.
[0031]
After performing this treatment for 30 seconds, the depth distribution of N atom% contained in the film was measured by SIMS and RBS, and as a result, the N atom content became 30% or more and SiO ₂ It was confirmed that a steep N atom concentration distribution without N atom precipitation at the / Si interface was formed. Further, using an ellipsometer, the SiO before and after the main nitriding treatment was performed on a Si wafer 300 having a diameter of 300 mm. ₂ As a result of measuring the film thickness distribution over 100 points, the variation in the film thickness increase due to the nitriding treatment was 0.03 nm or less in pv value and ± 3% or less in terms of N atom concentration distribution, and was excellent in-plane uniformity. Sex was obtained. Although an external bias voltage was applied to the substrate by the high frequency 18, SiO 2 ₂ When nitriding only in the vicinity of the surface, it is possible to induce the above substitution reaction by reducing the external bias voltage or performing ion irradiation only by the plasma self-bias without applying the external bias voltage. Was.
[0032]
Furthermore, the SiO ₂ H on the membrane ₂ Annealing was performed in an atmosphere, and a polysilicon gate electrode was further deposited to form a MOS transistor structure. The leakage current was measured for an operating voltage of 1 V. As a result, it was confirmed that the leakage current could be reduced to about 1/100 or less. Was done.
[0033]
In the present embodiment, N ₂ A mixture gas of He and He is used as the reaction gas 11, and N radicals 106 and SiO ₂ Although the substitution reaction of the O atoms 100 in the film 105 was promoted, even when He gas was not added, the substitution reaction could be induced by the irradiation effect of the N ions 109 in the plasma as shown in FIG. Met. A bias voltage of 50 V was externally applied to the substrate. ₂ In the case where only the vicinity of the surface of the film 105 is nitrided, it was possible to induce the above-described substitution reaction by performing ion irradiation by accelerating only the plasma potential without applying a bias voltage from the outside. Further, NH 3 is added to the reaction gas 11. ₃ Even when a mixed gas of He and He is used, as in the second embodiment, ₂ It was possible to efficiently nitride the film 105.
[0034]
As described above, as shown in the present embodiment, by the integrated processing in the chamber 1, the SiO.sub. ₂ The deposition of the film and its nitriding process are possible.
(Embodiment 4)
In this embodiment, as shown in FIG. 9, a plasma processing apparatus in which a chamber 404 for plasma oxidation and a chamber 405 for plasma nitridation are separated and independently formed as a cluster chamber. In FIG. 9, a wafer loaded from a wafer loading unit (loader) 400 is transported to a chamber 404 using a wafer transport handler 403 in a transport chamber 402 to perform a plasma oxidation process, and further transported to a chamber 405. A plasma nitriding process is performed. After the plasma processing, the wafer is stored in the wafer unloading unit (unloader) 401. That is, the plasma processing apparatus according to the present embodiment includes a plasma oxidation processing chamber (plasma oxidation chamber 404) and a sample stage (FIG. 8, sample stage) for installing the semiconductor substrate provided in the plasma oxidation processing chamber. 13), an antenna (FIG. 8, antenna 3) arranged opposite to the sample stage to supply a high frequency in the UHF band, and a heater (FIG. 8, heater 302) provided on the sample stage. A first processing apparatus, a plasma nitriding chamber (plasma nitriding chamber 405), a sample stage (FIG. 1, sample stage 13) for installing the semiconductor substrate provided in the plasma nitriding chamber, An antenna (FIG. 1, antenna 3) that is arranged to face the sample stage and supplies a high frequency in the UHF band, and a refrigerant circulation unit (FIG. 1, pipe 1) provided on the sample stage Wherein the second processing unit consisting of the a), the transfer chamber 402 to the handler 403 is installed, in that it consists of.
Since the plasma oxidation process and the plasma nitridation process are performed in different chambers as in this embodiment, the substrate temperature can be controlled independently by these processes, and the throughput is improved.
While the embodiments of the present invention have been described above, the features of the present invention, which are derived from the embodiments and their modifications and are not described in the claims, are listed below.
(1) a processing chamber (chamber) for performing a plasma nitridation process on a semiconductor substrate having an oxide film on a main surface, a sample table provided in the processing chamber for installing the semiconductor substrate, and An antenna for supplying a high frequency in a UHF band, a gas introduction unit for introducing a reaction gas containing nitrogen or a nitrogen compound into the processing chamber, and a refrigerant circulation provided on the sample stage Means for maintaining the semiconductor substrate at a low temperature of 100 ° C. or less by the refrigerant circulation means.
(2) The plasma processing apparatus according to (1), wherein the refrigerant circulating means comprises a pipe provided inside the sample stage.
(3) The plasma processing apparatus according to (1), wherein the UHF band is from 100 MHz to 1000 MHz.
(4) The plasma processing apparatus according to (2), wherein liquefied nitrogen is used as the refrigerant circulated in the pipe.
(5) The plasma processing apparatus according to (1), wherein an RF bias is applied to the sample stage.
(6) a processing chamber, a sample stage provided in the processing chamber for installing the semiconductor substrate, and an antenna arranged to face the sample stage and supplying a high frequency in a UHF band. A gas introduction unit for introducing a reaction gas containing nitrogen or a nitrogen compound into the processing chamber, a refrigerant circulation unit provided on the sample stage, and a heater provided on the sample stage, and the semiconductor The semiconductor substrate is heated by the heater at the stage of forming an oxide film on the main surface of the substrate, and the semiconductor substrate is kept at a low temperature of 100 ° C. or less by the refrigerant circulation unit at the stage of nitriding the oxide film. A plasma processing apparatus characterized by the above-mentioned.
(7) A plasma oxidation processing chamber, a sample stage provided in the first plasma oxidation processing chamber for installing the semiconductor substrate, and arranged opposite to the sample stage to supply a UHF band high frequency. A first processing apparatus comprising: an antenna for; and a heater provided on the sample stage;
A plasma nitriding chamber, a sample stage provided in the first plasma oxidation chamber for mounting the semiconductor substrate, and an antenna disposed opposite to the sample stage for supplying a high frequency in a UHF band And a second processing apparatus comprising: a refrigerant circulating unit provided on the sample stage;
A transfer chamber where the handler is installed,
A plasma processing apparatus comprising:
[0035]
【The invention's effect】
According to the present invention, ultra-thin SiO for a gate insulating film formed on a large-diameter Si wafer ₂ The N atom content in the film is at least 25%, the in-plane distribution of the content is less than ± 5%, and the Si / SiO ₂ It is possible to provide a plasma nitridation method and a nitridation apparatus capable of negligibly precipitating N atoms at an interface, having a high N atom content and in-plane uniformity, and capable of forming a sharp N atom concentration distribution. become.
[Brief description of the drawings]
FIG. 1 is a conceptual diagram of a nitriding apparatus for performing a plasma nitriding method of the present invention.
FIG. 2 is a characteristic diagram showing a distribution of N atom% in a depth direction according to the first embodiment of the present invention.
FIG. 3 is a characteristic diagram obtained by calculating a substrate temperature dependency based on the experimental result of FIG. 2;
FIG. 4 is a view showing a SiO 2 according to the first embodiment of the present invention; ₂ FIG. 3 is a schematic reaction diagram in the vicinity of the film surface.
FIG. 5 is a characteristic diagram showing a distribution of N atom% in a depth direction according to the first embodiment of the present invention.
FIG. 6 is a view showing a SiO 2 according to the first embodiment of the present invention; ₂ FIG. 4 is a characteristic diagram showing a gate leak current of a film.
FIG. 7 shows a SiO 2 according to the second embodiment of the present invention. ₂ FIG. 3 is a schematic reaction diagram in the vicinity of the film surface.
FIG. 8 is a conceptual diagram of a plasma processing apparatus according to a third embodiment of the present invention.
FIG. 9 is a conceptual diagram of a plasma processing apparatus according to a fourth embodiment of the present invention.
FIG. 10 is a sectional view illustrating the manufacturing process of the semiconductor device according to the first embodiment of the present invention;
FIG. 11 is a sectional view illustrating the manufacturing process of the semiconductor device according to the first embodiment of the present invention;
FIG. 12 is a sectional view illustrating the manufacturing process of the semiconductor device according to the first embodiment of the present invention;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Chamber, 2 ... Exhaust of chamber, 3 ... Antenna, 4 ... Permanent magnet, 5 ... UHF band high frequency of frequency 450MHz, 6 ... Quartz plate, 7 ... Shower plate, 8, 9 ... Reaction gas introduction path, 10 ... Reaction Gas, 11: reaction gas, 12: reaction gas plasma, 13: sample stage, 14: electrostatic chuck, 15: refrigerant, 16: Si wafer, 17: capacitor, 18: HF band high frequency of 13.56 MHz,
100 ... Si atom, 101 ... O atom, 102 ... N atom, 103 ... He atom, 104 ... Si atomic layer, 105 ... SiO ₂ Membrane, 106 ... N ₂ Radicals, 107 He ions, 108 NO groups, 109 N radicals, 110 N ions,
200 ... H atom, 201 ... NH radical, 202 ... OH group, 203 ... NH ₂ Radical, 204 ... H ₂ O molecule,
300: Si wafer; 301: electrostatic chuck made of aluminum nitride; 302: heater; 303: DC voltage applied to heater 302;
400: Wafer input unit, 401: Wafer unloading unit, 402: Wafer transfer unit, 403: Handler, 404: Plasma oxidation chamber, 405: Plasma nitriding chamber
500: Si substrate, 501: Active region, 502: Element isolation region, 503: Gate oxide film, 504: Gate electrode, 505s: Source region, 505d: Drain region.

Claims

A method for manufacturing a semiconductor device, comprising: converting a reaction gas containing nitrogen or a nitrogen compound into plasma, and nitriding an insulating film on a surface of a semiconductor substrate, wherein the step is performed in a depth direction of the insulating film; A method for manufacturing a semiconductor device, comprising: forming a temperature gradient such that the surface of an insulating film has a higher temperature than the surface of the substrate; and nitriding the insulating film.

2. The method according to claim 1, wherein the temperature gradient in the insulating film is such that a bias voltage applied to the substrate is maintained at a temperature at which the diffusion length of nitrogen atoms contained in the insulating film does not exceed the insulating film thickness during the nitriding treatment. Forming a semiconductor device by heating the vicinity of the surface of the insulating film by irradiating an ion component in the plasma.

3. The method according to claim 1, wherein when the nitriding is performed, the insulating film is re-sputtered with an ion component accelerated by the bias voltage, the bias voltage being externally applied to the substrate. A method for manufacturing a semiconductor device, wherein the area is controlled to an extent that does not occur.

2. The method according to claim 1, wherein the plasma is generated by a high frequency supplied to an antenna facing a substrate in the chamber and a magnetic field generated by a magnet installed in the antenna or the chamber.

5. The method according to claim 4, wherein the high frequency is in a UHF band from 100 MHz to 1000 MHz.

In claim 1, the nitrogen or nitrogen compound gas is nitrogen, ammonia, or a mixture thereof, or a gas obtained by diluting them with an inert gas such as helium, neon, argon, krypton, xenon, or a mixture thereof. A method for manufacturing a semiconductor device, comprising:

A method for manufacturing a semiconductor device, comprising:
(1) a step of selectively forming an element isolation region on a main surface of a semiconductor substrate;
(2) forming an oxide film on a surface of the active region partitioned by the element isolation region;
(3) Forming a temperature gradient in the depth direction of the oxide film such that the surface of the oxide film becomes higher in temperature in the depth direction of the oxide film than the substrate surface in an atmosphere in which a reaction gas containing nitrogen or a nitrogen compound is turned into plasma. And a step of nitriding the oxide film, and thereafter,
(4) forming a gate electrode on the oxide film;
(5) a step of introducing an impurity into the surface of the active region where the gate electrode is not formed to form source / drain regions.

8. The method according to claim 7, wherein the temperature gradient in the oxide film is such that a bias voltage applied to the substrate is maintained at a temperature such that the diffusion length of nitrogen atoms contained in the oxide film does not exceed the oxide film thickness during the nitriding treatment. Forming a semiconductor device by heating the vicinity of the surface of the oxide film by irradiating an ion component in the plasma.

9. The method according to claim 7, wherein when the nitriding is performed, a bias voltage value externally applied to the substrate is reduced by an ion component accelerated by the bias voltage. A method for manufacturing a semiconductor device, wherein the area is controlled to an extent that does not occur.

8. The method according to claim 7, wherein the plasma is generated by a high frequency supplied to an antenna facing a substrate in the chamber and a magnetic field generated by a magnet installed in the antenna or the chamber.

11. The method according to claim 10, wherein the high frequency is in a UHF band of 100 MHz to 1000 MHz.

In claim 7, the nitrogen or nitrogen compound gas is nitrogen, ammonia, or a mixture thereof, or a gas obtained by diluting them with an inert gas such as helium, neon, argon, krypton, xenon, or a mixture thereof. A method for manufacturing a semiconductor device, comprising: