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GB2403833B - Method and apparatus for resteering failing speculation check instructions field - Google Patents

Method and apparatus for resteering failing speculation check instructions field

Info

Publication number
GB2403833B
GB2403833B GB0423198A GB0423198A GB2403833B GB 2403833 B GB2403833 B GB 2403833B GB 0423198 A GB0423198 A GB 0423198A GB 0423198 A GB0423198 A GB 0423198A GB 2403833 B GB2403833 B GB 2403833B
Authority
GB
United Kingdom
Prior art keywords
resteering
instructions field
check instructions
failing
speculation check
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0423198A
Other versions
GB0423198D0 (en
GB2403833A (en
Inventor
James Douglas Gibson
Rohit Bhatia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/505,093 external-priority patent/US6636960B1/en
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of GB0423198D0 publication Critical patent/GB0423198D0/en
Publication of GB2403833A publication Critical patent/GB2403833A/en
Application granted granted Critical
Publication of GB2403833B publication Critical patent/GB2403833B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
GB0423198A 2000-02-16 2001-01-29 Method and apparatus for resteering failing speculation check instructions field Expired - Fee Related GB2403833B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/505,093 US6636960B1 (en) 2000-02-16 2000-02-16 Method and apparatus for resteering failing speculation check instructions
GB0102263A GB2365581B (en) 2000-02-16 2001-01-29 Method and apparatus for resteering failing speculation check instructions field

Publications (3)

Publication Number Publication Date
GB0423198D0 GB0423198D0 (en) 2004-11-24
GB2403833A GB2403833A (en) 2005-01-12
GB2403833B true GB2403833B (en) 2005-02-23

Family

ID=33554127

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0423198A Expired - Fee Related GB2403833B (en) 2000-02-16 2001-01-29 Method and apparatus for resteering failing speculation check instructions field

Country Status (1)

Country Link
GB (1) GB2403833B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4827402A (en) * 1985-04-22 1989-05-02 Hitachi, Ltd. Branch advanced control apparatus for advanced control of a branch instruction in a data processing system
US5072364A (en) * 1989-05-24 1991-12-10 Tandem Computers Incorporated Method and apparatus for recovering from an incorrect branch prediction in a processor that executes a family of instructions in parallel
US5675759A (en) * 1995-03-03 1997-10-07 Shebanow; Michael C. Method and apparatus for register management using issue sequence prior physical register and register association validity information

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4827402A (en) * 1985-04-22 1989-05-02 Hitachi, Ltd. Branch advanced control apparatus for advanced control of a branch instruction in a data processing system
US5072364A (en) * 1989-05-24 1991-12-10 Tandem Computers Incorporated Method and apparatus for recovering from an incorrect branch prediction in a processor that executes a family of instructions in parallel
US5675759A (en) * 1995-03-03 1997-10-07 Shebanow; Michael C. Method and apparatus for register management using issue sequence prior physical register and register association validity information

Also Published As

Publication number Publication date
GB0423198D0 (en) 2004-11-24
GB2403833A (en) 2005-01-12

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20090129