CN103353593A - Multifunctional universal tester used for LTC radar - Google Patents
Multifunctional universal tester used for LTC radar Download PDFInfo
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Abstract
The invention discloses a multifunctional universal tester used for an LTC radar. The multifunctional universal tester used for an LTC radar includes a tester case. A noise factor measuring module, a standing-wave ratio measuring module, a power measuring module, a frequency measuring module, an oscilloscope module and a power source module fault diagnosis module arranged in the tester case are in communication connection with a host of an external computer through a CPCI bus respectively.
Description
Technical field
The present invention relates to the radar testing device field, be specially a kind of LTC radar multifunctional universal tester.
Background technology
Current radar system index is various, needs various testing apparatus numbers in when test, under existing management mode, need to involve a lot of departments and personnel, must have influence on work efficiency, and several equipment work simultaneously, and operation cost also can increase greatly.
The realization of radar overall performance index mainly is integrated by the index of each subsystem, the testing apparatus of each subsystem index is not quite similar, the trueness error of similar testing apparatus will inevitably have influence on radar overall performance index, how the major function with various testing apparatuss realizes small modular, then highly be integrated in an integral body, be connected with the outer computer host communication by cpci bus, realize the integration of multiple testing apparatus, so both reduce the quantity of test site equipment, effectively avoided causing owing to the trueness error of equipment room simultaneously the deviation of radar overall performance index.
Radar multifunctional universal tester just is being based on this technical background, for the designer provides a kind of brand-new design concept.
Radar multifunctional universal tester, mainly be with noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module, and the test data that other test modules collect is sent to exclusive data analog input card and processing unit, be connected with the outer computer host communication by cpci bus
Outer computer will calculate and analyze by the data that cpci bus receives, by the internal data comparison with analyze and to provide detailed analysis report to radar overall performance index, for dependence test and maintenance personal quickly and accurately the failure judgement point precision navigation is provided.
Summary of the invention
Problem for prior art exists the invention provides a kind of LTC radar multifunctional universal tester.
The technical solution adopted in the present invention is:
A kind of LTC radar multifunctional universal tester, include the tester mainframe box, it is characterized in that: be provided with noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module in the tester mainframe box, and cpci bus, described noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module are connected with the outer computer host communication by cpci bus respectively, wherein:
Described noise-factor measurement module is by input isolation circuit, signal conditioning circuit, data acquisition circuit, data caching circuit, the master control logic circuit, numerical control attenuation circuit, isolated drive circuit, interface circuit consists of, the noise-factor measurement signal passes through input isolation circuit successively, signal conditioning circuit is processed rear by the data acquisition circuit collection, data acquisition circuit is sent the noise-factor measurement signal that collects into the data caching circuit buffer memory, the master control logic circuit reads noise-factor measurement signal and processing from data caching circuit after, the master control logic circuit sends control signal, control signal is through numerical control attenuation circuit, export after the driving isolation processing of circuit, the master control logic circuit is by cpci bus in the interface circuit access tester mainframe box simultaneously;
Described SWR measurement module comprises the power signal feeder line, the forward power probe, the backward power probe, power signal acquisition process unit, the SWR measurement signal is sent into the power signal feeder line from power signal feeder line one end as input end, the power signal feeder line other end is as output terminal, described forward power probe gathers the forward power data in power signal feeder line one side near input end, the backward power probe gathers the backward power data in power signal feeder line one side near output terminal, the forward power probe is with the forward power data that gather, the backward power probe is sent the backward power data that gather into respectively power signal acquisition process unit, cpci bus in the described power signal acquisition process unit access tester mainframe box;
Described power measurement module comprises power probe, the change-over switch module, amplifier, low-pass filter circuit, low speed A/D modular converter, the voltage controlled gain module, the high-speed a/d modular converter, the FIFO storer, the D/A module, digital temperature sensor and EEROM module, FPGA, power probe is sent into the change-over switch module after gathering power measurement signal, the change-over switch module is switched between two-way output, power measurement signal is through amplifier in one tunnel output, low-pass filter circuit is sent into low speed A/D modular converter after processing, after the conversion of low speed A/D modular converter, send into FPGA by spi bus, send into the high-speed a/d modular converter after the power measurement signal process voltage controlled gain resume module in another road output, sending into the FIFO storer after the conversion of high-speed a/d modular converter calls for FPGA, described FPGA transmits control signal to the D/A modular converter by spi bus, control signal is sent into the voltage controlled gain module after changing through the D/A modular converter, described digital temperature sensor and EEROM module access FPGA by spi bus, cpci bus in the FPGA access tester mainframe box in the power measurement module;
Described frequency measurement module comprises that amplification and rectification circuit, high-frequency receiver NB6L16, high frequency divider ZL40800, high frequency divider SP8782, FPGA consist of, the frequency measurement signal that is lower than 100MHz is sent into FPGA after through the amplification and rectification circuit shaping and is counted frequency measurement, the frequency measurement signal of 100MHz-6GHz is sent into the frequency measurement of FPGA counting through high frequency divider ZL40800, high frequency divider SP8782 frequency division again after high frequency divider SP8782 reception, shaping, cpci bus in the FPGA access tester mainframe box in the frequency measurement module;
Described oscillograph module comprises that system sequence produces control circuit, coupling fan-in network, buffer amplifier, A-D converter AD9054, two-way latch, storer, phaselocked loop hour hands generation circuit, address generator, record length counter, cpci bus interface, triggers enable logic; The quiet coupling fan-in network of analogue measurement signal of input is sent into analog to digital converter AD9054 and is processed after sending into and amplifying the impact damper buffer memory and amplify, and the data after analog to digital converter AD9054 processes are sent into the two-way latches and by two-way latch write store; The phaselocked loop hour hands produce the circuit input by cpci bus in the cpci bus interface access tester mainframe box, the phaselocked loop hour hands produce the hour hands signal of circuit output and send into respectively A-D converter AD9054 and system sequence generation control circuit, system sequence produces that control circuit produces system clock and according to the hour hands of A-D converter AD9054 sampling and the requirement of A-D converter AD9054 output interface sequential, send latch clock to the two-way latch, and providing reading/writing pulses to storer, system sequence produces control circuit and also sends the counting hour hands to address generator and record length counter; Record length counter, address generator by cpci bus in the cpci bus interface access tester mainframe box, trigger enable logic and send enable signal to the record length counter respectively;
Described power module fault diagnosis module comprises that supply module, fictitious load combination, data collecting card consist of, cpci bus in the data collecting card access tester mainframe box, and data collecting card is connected with the outer computer host communication by cpci bus, the outer computer main frame sends power supplying control signal by data collecting card to supply module, supply module is powered to the fictitious load associating power supply by power module after receiving power supplying control signal, simultaneous data-collecting card gathers the data of power module, and the power supply output characteristic data of fictitious load combination.
Described a kind of LTC radar multifunctional universal tester, it is characterized in that: in the described noise-factor measurement module, interface circuit is made of port address code translator and data buffer, the outer computer main frame by port address code translator in the cpci bus, interface circuit to the master control logic circuit sending signal, in the data data writing buffer of master control logic circuit, the outer computer main frame is by the data in the cpci bus reading out data buffer.
Described a kind of LTC radar multifunctional universal tester, it is characterized in that: described SWR measurement module is measured based on the feed-through type power meter principle.
Described a kind of LTC radar multifunctional universal tester, it is characterized in that: described power measurement module also comprises 50MHz calibration source output module, described 50MHz calibration source output module is as the power reference source of power probe.
Described a kind of LTC radar multifunctional universal tester, it is characterized in that: in the described power module fault diagnosis module, data collecting card is by the data sampling interface bus, the digital signal acquiring passage, the collection of simulant signal passage, frequency measurement channels, the logic control center, buffer area and control channel consist of, wherein cpci bus in the tester mainframe box is accessed at the logic control center, buffer area access logic control center, the power supplying control signal of outer computer main frame is sent into the logic control center through cpci bus, send power supplying control signal by control channel to supply module by the logic control center, the data of power module are through the data sampling interface bus, the digital signal acquiring passage is sent into the logic control center, behind the power supply output characteristic data process data sampling interface bus of fictitious load combination, corresponding to the collection of simulant signal passage respectively, frequency measurement channels is sent into the logic control center.
Advantage of the present invention is:
1, each functional module is relatively independent, both can test the individual event performance index, can test simultaneously many index again.
2, compact integral structure, sturdy and durable, lightweight, easy to carry.
3, have multiple working power mode, adapt to especially the field work pattern.
4, have superpower anti-electromagnetic interference performance, can adapt to the test assignment under the complex electromagnetic environment.
5, the human engineering degree is high, and operation interface is simple.
Description of drawings
Fig. 1 is system principle diagram of the present invention.
Fig. 2 is noise-factor measurement module principle block diagram among the present invention.
Fig. 3 is SWR measurement module principle block diagram among the present invention.
Fig. 4 is power measurement module theory diagram among the present invention.
Fig. 5 is medium frequency measurement module theory diagram of the present invention.
Fig. 6 is oscillograph module principle block diagram among the present invention.
Fig. 7 is power module fault diagnosis module theory diagram among the present invention.
Fig. 8 is data collecting card theory diagram in the power module fault diagnosis module.
Embodiment
As shown in Figure 1.A kind of LTC radar multifunctional universal tester, include the tester mainframe box, be provided with noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module in the tester mainframe box, and cpci bus, noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module are connected with the outer computer host communication by cpci bus respectively, wherein:
As shown in Figure 2.The noise-factor measurement module is by input isolation circuit, signal conditioning circuit, data acquisition circuit, data caching circuit, the master control logic circuit, numerical control attenuation circuit, isolated drive circuit, interface circuit consists of, the noise-factor measurement signal passes through input isolation circuit successively, signal conditioning circuit is processed rear by the data acquisition circuit collection, data acquisition circuit is sent the noise-factor measurement signal that collects into the data caching circuit buffer memory, the master control logic circuit reads noise-factor measurement signal and processing from data caching circuit after, the master control logic circuit sends control signal, control signal is through numerical control attenuation circuit, export after the driving isolation processing of circuit, the master control logic circuit is by cpci bus in the interface circuit access tester mainframe box simultaneously;
As shown in Figure 3.The SWR measurement module comprises the power signal feeder line, the forward power probe, the backward power probe, power signal acquisition process unit, the SWR measurement signal is sent into the power signal feeder line from power signal feeder line one end as input end, the power signal feeder line other end is as output terminal, the forward power probe gathers the forward power data in power signal feeder line one side near input end, the backward power probe gathers the backward power data in power signal feeder line one side near output terminal, the forward power probe is with the forward power data that gather, the backward power probe is sent the backward power data that gather into respectively power signal acquisition process unit, cpci bus in the power signal acquisition process unit access tester mainframe box;
As shown in Figure 4.Power measurement module comprises power probe, the change-over switch module, amplifier, low-pass filter circuit, low speed A/D modular converter, the voltage controlled gain module, the high-speed a/d modular converter, the FIFO storer, the D/A module, digital temperature sensor and EEROM module, FPGA, power probe is sent into the change-over switch module after gathering power measurement signal, the change-over switch module is switched between two-way output, power measurement signal is through amplifier in one tunnel output, low-pass filter circuit is sent into low speed A/D modular converter after processing, after the conversion of low speed A/D modular converter, send into FPGA by spi bus, send into the high-speed a/d modular converter after the power measurement signal process voltage controlled gain resume module in another road output, sending into the FIFO storer after the conversion of high-speed a/d modular converter calls for FPGA, described FPGA transmits control signal to the D/A modular converter by spi bus, control signal is sent into the voltage controlled gain module after changing through the D/A modular converter, described digital temperature sensor and EEROM module access FPGA by spi bus, cpci bus in the FPGA access tester mainframe box in the power measurement module;
As shown in Figure 5.The frequency measurement module comprises that amplification and rectification circuit, high-frequency receiver NB6L16, high frequency divider ZL40800, high frequency divider SP8782, FPGA consist of, the frequency measurement signal that is lower than 100MHz is sent into FPGA after through the amplification and rectification circuit shaping and is counted frequency measurement, the frequency measurement signal of 100MHz-6GHz is sent into the frequency measurement of FPGA counting through high frequency divider ZL40800, high frequency divider SP8782 frequency division again after high frequency divider SP8782 reception, shaping, cpci bus in the FPGA access tester mainframe box in the frequency measurement module;
As shown in Figure 6.The oscillograph module comprises that system sequence produces control circuit, coupling fan-in network, buffer amplifier, A-D converter AD9054, two-way latch, storer, phaselocked loop hour hands generation circuit, address generator, record length counter, cpci bus interface, triggers enable logic; The quiet coupling fan-in network of analogue measurement signal of input is sent into analog to digital converter AD9054 and is processed after sending into and amplifying the impact damper buffer memory and amplify, and the data after analog to digital converter AD9054 processes are sent into the two-way latches and by two-way latch write store; The phaselocked loop hour hands produce the circuit input by cpci bus in the cpci bus interface access tester mainframe box, the phaselocked loop hour hands produce the hour hands signal of circuit output and send into respectively A-D converter AD9054 and system sequence generation control circuit, system sequence produces that control circuit produces system clock and according to the hour hands of A-D converter AD9054 sampling and the requirement of A-D converter AD9054 output interface sequential, send latch clock to the two-way latch, and providing reading/writing pulses to storer, system sequence produces control circuit and also sends the counting hour hands to address generator and record length counter; Record length counter, address generator by cpci bus in the cpci bus interface access tester mainframe box, trigger enable logic and send enable signal to the record length counter respectively;
As shown in Figure 7.The power module fault diagnosis module comprises that supply module, fictitious load combination, data collecting card consist of, cpci bus in the data collecting card access tester mainframe box, and data collecting card is connected with the outer computer host communication by cpci bus, the outer computer main frame sends power supplying control signal by data collecting card to supply module, supply module is powered to the fictitious load associating power supply by power module after receiving power supplying control signal, simultaneous data-collecting card gathers the data of power module, and the power supply output characteristic data of fictitious load combination.
In the noise-factor measurement module, interface circuit is made of port address code translator and data buffer, the outer computer main frame by port address code translator in the cpci bus, interface circuit to the master control logic circuit sending signal, in the data data writing buffer of master control logic circuit, the outer computer main frame is by the data in the cpci bus reading out data buffer.
The SWR measurement module is measured based on the feed-through type power meter principle.
Power measurement module also comprises 50MHz calibration source output module, and described 50MHz calibration source output module is as the power reference source of power probe.
As shown in Figure 8.In the power module fault diagnosis module, data collecting card is by the data sampling interface bus, the digital signal acquiring passage, the collection of simulant signal passage, frequency measurement channels, the logic control center, buffer area and control channel consist of, wherein cpci bus in the tester mainframe box is accessed at the logic control center, buffer area access logic control center, the power supplying control signal of outer computer main frame is sent into the logic control center through cpci bus, send power supplying control signal by control channel to supply module by the logic control center, the data of power module are through the data sampling interface bus, the digital signal acquiring passage is sent into the logic control center, behind the power supply output characteristic data process data sampling interface bus of fictitious load combination, corresponding to the collection of simulant signal passage respectively, frequency measurement channels is sent into the logic control center.
Claims (5)
1. LTC radar multifunctional universal tester, include the tester mainframe box, it is characterized in that: be provided with noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module in the tester mainframe box, and cpci bus, described noise-factor measurement module, SWR measurement module, power measurement module, frequency measurement module, oscillograph module, power module fault diagnosis module are connected with the outer computer host communication by cpci bus respectively, wherein:
Described noise-factor measurement module is by input isolation circuit, signal conditioning circuit, data acquisition circuit, data caching circuit, the master control logic circuit, numerical control attenuation circuit, isolated drive circuit, interface circuit consists of, the noise-factor measurement signal passes through input isolation circuit successively, signal conditioning circuit is processed rear by the data acquisition circuit collection, data acquisition circuit is sent the noise-factor measurement signal that collects into the data caching circuit buffer memory, the master control logic circuit reads noise-factor measurement signal and processing from data caching circuit after, the master control logic circuit sends control signal, control signal is through numerical control attenuation circuit, export after the driving isolation processing of circuit, the master control logic circuit is by cpci bus in the interface circuit access tester mainframe box simultaneously;
Described SWR measurement module comprises the power signal feeder line, the forward power probe, the backward power probe, power signal acquisition process unit, the SWR measurement signal is sent into the power signal feeder line from power signal feeder line one end as input end, the power signal feeder line other end is as output terminal, described forward power probe gathers the forward power data in power signal feeder line one side near input end, the backward power probe gathers the backward power data in power signal feeder line one side near output terminal, the forward power probe is with the forward power data that gather, the backward power probe is sent the backward power data that gather into respectively power signal acquisition process unit, cpci bus in the described power signal acquisition process unit access tester mainframe box;
Described power measurement module comprises power probe, the change-over switch module, amplifier, low-pass filter circuit, low speed A/D modular converter, the voltage controlled gain module, the high-speed a/d modular converter, the FIFO storer, the D/A module, digital temperature sensor and EEROM module, FPGA, power probe is sent into the change-over switch module after gathering power measurement signal, the change-over switch module is switched between two-way output, power measurement signal is through amplifier in one tunnel output, low-pass filter circuit is sent into low speed A/D modular converter after processing, after the conversion of low speed A/D modular converter, send into FPGA by spi bus, send into the high-speed a/d modular converter after the power measurement signal process voltage controlled gain resume module in another road output, sending into the FIFO storer after the conversion of high-speed a/d modular converter calls for FPGA, described FPGA transmits control signal to the D/A modular converter by spi bus, control signal is sent into the voltage controlled gain module after changing through the D/A modular converter, described digital temperature sensor and EEROM module access FPGA by spi bus, cpci bus in the FPGA access tester mainframe box in the power measurement module;
Described frequency measurement module comprises that amplification and rectification circuit, high-frequency receiver NB6L16, high frequency divider ZL40800, high frequency divider SP8782, FPGA consist of, the frequency measurement signal that is lower than 100MHz is sent into FPGA after through the amplification and rectification circuit shaping and is counted frequency measurement, the frequency measurement signal of 100MHz-6GHz is sent into the frequency measurement of FPGA counting through high frequency divider ZL40800, high frequency divider SP8782 frequency division again after high frequency divider SP8782 reception, shaping, cpci bus in the FPGA access tester mainframe box in the frequency measurement module;
Described oscillograph module comprises that system sequence produces control circuit, coupling fan-in network, buffer amplifier, A-D converter AD9054, two-way latch, storer, phaselocked loop hour hands generation circuit, address generator, record length counter, cpci bus interface, triggers enable logic; The quiet coupling fan-in network of analogue measurement signal of input is sent into analog to digital converter AD9054 and is processed after sending into and amplifying the impact damper buffer memory and amplify, and the data after analog to digital converter AD9054 processes are sent into the two-way latches and by two-way latch write store; The phaselocked loop hour hands produce the circuit input by cpci bus in the cpci bus interface access tester mainframe box, the phaselocked loop hour hands produce the hour hands signal of circuit output and send into respectively A-D converter AD9054 and system sequence generation control circuit, system sequence produces that control circuit produces system clock and according to the hour hands of A-D converter AD9054 sampling and the requirement of A-D converter AD9054 output interface sequential, send latch clock to the two-way latch, and providing reading/writing pulses to storer, system sequence produces control circuit and also sends the counting hour hands to address generator and record length counter; Record length counter, address generator by cpci bus in the cpci bus interface access tester mainframe box, trigger enable logic and send enable signal to the record length counter respectively;
Described power module fault diagnosis module comprises that supply module, fictitious load combination, data collecting card consist of, cpci bus in the data collecting card access tester mainframe box, and data collecting card is connected with the outer computer host communication by cpci bus, the outer computer main frame sends power supplying control signal by data collecting card to supply module, supply module is powered to the fictitious load associating power supply by power module after receiving power supplying control signal, simultaneous data-collecting card gathers the data of power module, and the power supply output characteristic data of fictitious load combination.
2. a kind of LTC radar multifunctional universal tester according to claim 1, it is characterized in that: in the described noise-factor measurement module, interface circuit is made of port address code translator and data buffer, the outer computer main frame by port address code translator in the cpci bus, interface circuit to the master control logic circuit sending signal, in the data data writing buffer of master control logic circuit, the outer computer main frame is by the data in the cpci bus reading out data buffer.
3. a kind of LTC radar multifunctional universal tester according to claim 1, it is characterized in that: described SWR measurement module is measured based on the feed-through type power meter principle.
4. a kind of LTC radar multifunctional universal tester according to claim 1, it is characterized in that: described power measurement module also comprises 50MHz calibration source output module, described 50MHz calibration source output module is as the power reference source of power probe.
5. a kind of LTC radar multifunctional universal tester according to claim 1, it is characterized in that: in the described power module fault diagnosis module, data collecting card is by the data sampling interface bus, the digital signal acquiring passage, the collection of simulant signal passage, frequency measurement channels, the logic control center, buffer area and control channel consist of, wherein cpci bus in the tester mainframe box is accessed at the logic control center, buffer area access logic control center, the power supplying control signal of outer computer main frame is sent into the logic control center through cpci bus, send power supplying control signal by control channel to supply module by the logic control center, the data of power module are through the data sampling interface bus, the digital signal acquiring passage is sent into the logic control center, behind the power supply output characteristic data process data sampling interface bus of fictitious load combination, corresponding to the collection of simulant signal passage respectively, frequency measurement channels is sent into the logic control center.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103713281A (en) * | 2013-12-12 | 2014-04-09 | 中国人民解放军海军工程大学 | Radar Signal Unit Performance Test and Fault Diagnosis System Based on General Test Platform |
| CN104993887A (en) * | 2015-05-08 | 2015-10-21 | 中国电子科技集团公司第四十一研究所 | Integrated pulse state noise factor test method and tester |
| CN106130826A (en) * | 2016-08-25 | 2016-11-16 | 中国人民解放军济南军区72465部队 | Combat Command System joint debugging test system and method for testing |
| CN112327803A (en) * | 2020-10-29 | 2021-02-05 | 深圳市道通科技股份有限公司 | Calibration system and method for automobile diagnosis equipment |
| CN113804992A (en) * | 2020-06-16 | 2021-12-17 | 普源精电科技股份有限公司 | Test function module, multifunctional test system and method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61283887A (en) * | 1985-06-11 | 1986-12-13 | Nissan Motor Co Ltd | Laser radar for vehicle |
| CN201364385Y (en) * | 2009-03-13 | 2009-12-16 | 广东省东莞市质量计量监督检测所 | Radar tachymeter simulation verification instrument |
| CN102508216A (en) * | 2011-10-27 | 2012-06-20 | 零八一电子集团有限公司 | Method for automatically testing main performance indexes of pulse instrumentation radar |
| CN202433519U (en) * | 2011-12-14 | 2012-09-12 | 四川九洲电器集团有限责任公司 | Secondary radar receiver |
-
2013
- 2013-07-04 CN CN201310280155.0A patent/CN103353593B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61283887A (en) * | 1985-06-11 | 1986-12-13 | Nissan Motor Co Ltd | Laser radar for vehicle |
| CN201364385Y (en) * | 2009-03-13 | 2009-12-16 | 广东省东莞市质量计量监督检测所 | Radar tachymeter simulation verification instrument |
| CN102508216A (en) * | 2011-10-27 | 2012-06-20 | 零八一电子集团有限公司 | Method for automatically testing main performance indexes of pulse instrumentation radar |
| CN202433519U (en) * | 2011-12-14 | 2012-09-12 | 四川九洲电器集团有限责任公司 | Secondary radar receiver |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103713281A (en) * | 2013-12-12 | 2014-04-09 | 中国人民解放军海军工程大学 | Radar Signal Unit Performance Test and Fault Diagnosis System Based on General Test Platform |
| CN103713281B (en) * | 2013-12-12 | 2016-06-08 | 中国人民解放军海军工程大学 | Radar Signal Unit Performance Test and Fault Diagnosis System Based on General Test Platform |
| CN104993887A (en) * | 2015-05-08 | 2015-10-21 | 中国电子科技集团公司第四十一研究所 | Integrated pulse state noise factor test method and tester |
| CN104993887B (en) * | 2015-05-08 | 2017-11-10 | 中国电子科技集团公司第四十一研究所 | Integrated pulse condition noise coefficient method of testing and tester |
| CN106130826A (en) * | 2016-08-25 | 2016-11-16 | 中国人民解放军济南军区72465部队 | Combat Command System joint debugging test system and method for testing |
| CN106130826B (en) * | 2016-08-25 | 2019-06-04 | 中国人民解放军济南军区72465部队 | Combat Command System joint debugging test macro and test method |
| CN113804992A (en) * | 2020-06-16 | 2021-12-17 | 普源精电科技股份有限公司 | Test function module, multifunctional test system and method |
| CN112327803A (en) * | 2020-10-29 | 2021-02-05 | 深圳市道通科技股份有限公司 | Calibration system and method for automobile diagnosis equipment |
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