CN101893483A - A packaging process and packaging device for an uncooled infrared focal plane array device - Google Patents

Abstract

The invention discloses a packaging device for an uncooled infrared focal plane array device, which is characterized in that it includes a body and a cover, the body and the cover work together, and the two are packaged as one in a vacuum chamber through heating and compression. Among them: ①The body includes a first substrate, on the surface of the substrate is provided a heavily doped region with P and N characteristics, a strip-shaped metal frame is provided in the middle of the substrate, and a readout circuit is provided above the strip-shaped metal frame area area, the focal plane array area is set below, the area of the heavily doped area is larger than the focal plane array area, the focal plane array area has M×N units, and several pressing pads are set between the strip metal pattern and the edge of the substrate. A number of reference resistors are set in the focal plane array area; ②The cover includes a second substrate, on both sides of the second substrate there is a diamond-like film, and on either side there is a strip-shaped metal frame corresponding to the body. The cover metal frame is provided with metal solder on the cover metal frame.

Description

A packaging process and packaging device for an uncooled infrared focal plane array device

technical field

The invention relates to the technical field of photoelectric packaging, in particular to the technical field of vacuum packaging for uncooled infrared detection.

Background technique

Electronic vacuum packaging is a major problem in controlling the cost of electronic devices. Traditional metal and ceramic packaging processes are complex and costly, and optoelectronic devices that need to work in vacuum conditions are also very expensive to test. The packaging form can utilize the existing microelectronic technology and greatly reduce the cost of the infrared vacuum device.

With the development of integrated circuit and semiconductor process technology, the readout circuit of the uncooled infrared focal plane device is also integrated on a unified substrate. The device structure on the readout circuit of the microelectronics process has become a process trend in this field. After completing this type of process on a unified silicon wafer, it will undergo characteristic testing, marking and dicing, and finally single-chip packaging. In this technological process, the test generally must provide a high-vacuum test environment and an effective radiation source, which brings certain difficulties to the test and virtually increases the operating cost of the test environment. The traditional metal or ceramic packaging involves complex welding processes, such as edge metallization of the light window, indium tin welding, laser welding, vacuum pumping, etc., in addition to expensive shells, light windows, GETTER, TEC, NTC and other components. Moreover, some processes, such as vacuum pumping conditions and indium tin welding, are very demanding, and the cost of industrialization is also very high.

The basic principle of VPOW (vacuum packaging on wafer) is to use the infrared-transmitting physical characteristics of silicon wafers. First, coat infrared anti-reflection coatings on silicon wafers and combine single-chip edge metal treatment, through the relatively mature technology of wafer-level packaging in the microelectronics field. , to realize the packaging of photoelectric infrared devices on the microelectronics process line. Complete the infrared device high transmittance, long vacuum life, high integration, miniaturization, low-cost packaging and testing requirements.

The traditional uncooled infrared vacuum package adopts a metal shell or a ceramic shell with a low air leakage rate. For silver-copper soldering, generally the pins need to be plated with gold, while Kovar needs to be plated with nickel because it is easy to rust. The internal NTC and TEC form a temperature control closed loop to control the temperature of the focal plane when it is working. The structure is complicated, the process is loaded down with trivial details, and the cost is very high.

Contents of the invention

The problem to be solved by the present invention is: how to provide a packaging process and packaging device for an uncooled infrared focal plane array device. Compared with traditional packaging methods such as metal packaging and ceramic packaging, the packaging technology and packaging device can effectively reduce the The cost of packaging and testing of focal plane array devices makes up for the defect of no temperature control function in UPOC technology, and has all the functions of traditional packaging.

The technical problem proposed by the present invention is solved as follows: a packaging device for an uncooled infrared focal plane array device is provided, which is characterized in that it includes a body and a cover, and the body and the cover cooperate to work together in a vacuum chamber. The ones are packaged as a whole by heating and pressing, among which:

①The body includes a first substrate, on the surface of the substrate is provided a heavily doped region with P and N characteristics, a strip-shaped metal frame is provided in the middle of the substrate, and a readout circuit area is provided above the strip-shaped metal frame area, The focal plane array area is set below, and the area of the heavily doped area is larger than the focal plane array area. The focal plane array area has M×N units, and several pressing pads are set between the strip metal pattern and the edge of the substrate. The array area is provided with several reference resistors;

②The cover includes a second substrate, on both sides of the second substrate is provided with a diamond-like film, on either side is provided with a cover metal frame corresponding to the strip metal frame in the body, and on the cover metal Metal solder is provided on the frame.

According to the packaging device of the uncooled infrared focal plane array device provided by the present invention, it is characterized in that the cover is provided with a film-shaped getter on the side where the metal frame is provided, and the film-form getter is heated when the temperature It will be activated to a certain extent.

According to the packaging device of the uncooled infrared focal plane array device provided by the present invention, it is characterized in that the metal solder is indium tin solder.

A packaging process for an uncooled infrared focal plane array device, characterized in that it comprises the following steps:

① Prepare the body:

a. Preparation of semiconductor refrigerator: prepare a heavily doped region with P and N characteristics on the surface of the first silicon substrate. The area of the heavily doped region is larger than that of the focal plane array area, and then use the reflective layer metal of the focal plane array itself as an electrode , realize the connection of P and N poles, cut off the metal connection of the reflective layer at the position corresponding to the edge of the focal plane array area by photolithography process, and form a complete semiconductor refrigerator;

b. Preparation of negative temperature coefficient sensor: The reference unit based on the microbolometer is itself a negative temperature coefficient sensor. It only needs to lead out two sub-solder spots in the process of making the focal plane device, and the negative temperature coefficient sensor will be The substrate temperature can be detected.

c. Preparation of the metal frame: After preparing the reflective layer and the passivation layer on one side of the semiconductor refrigerator on the silicon substrate, a transition layer is prepared, and a metal layer is prepared on the transition layer, and then between Prepare a frame-shaped photoresist in the area between the focal plane array area, the readout circuit area, and the edge of the silicon substrate, and then sacrifice the transition layer and metal layer except for the position where the photoresist is set, and remove the photoresist , forming a metal frame whose thickness is greater than that of the focal plane array

d. Setting of pressure pads: set several pressure pads at the position between the metal frame and the edge of the silicon substrate;

②Preparation of the cap:

a. Preparation of the cover metal frame: select a second silicon substrate corresponding to the size of the first silicon substrate, coat a diamond-like film on both sides of the silicon substrate, and then prepare a transition layer and a metal layer at one time, on the metal layer Setting photoresist corresponding to the metal frame of the body, then sacrificing the metal layer at positions other than the photoresist, and then removing the photoresist to form a sealing metal frame, and setting metal solder on the metal frame;

b. Preparation of the getter: prepare a thin film getter on the cover metal frame, and the setting position of the thin film getter does not correspond to the focal plane array area;

c. Preparation of anti-reflection film: prepare anti-reflection film on both sides of the cover, the anti-reflection film does not cover the film getter;

③Integral seal:

First, put the prepared body and cover into a vacuum chamber, clamp the body and cover along the metal frame, heat the metal solder through the upper and lower heating plates, and activate the film getter to complete the packaging process.

Beneficial effects of the present invention: the present invention utilizes the characteristics of the infrared focal plane reference resistance, replaces the NTC function by bonding, and the TEC uses the P, N ion implantation process of the traditional microelectronics process on the power device to successfully realize the P, N Junction coupling pair, so as to realize the function of TEC (semiconductor cooler), which is a more economical packaging method compared with metal packaging and ceramic packaging, and makes up for the defect of uPOC technology without temperature control (lack of TEC and NTC). The unique infrared anti-reflection coating, diamond-like film technology and silicon wafer metal welding technology have successfully solved the new packaging technology solution for uncooled infrared packaging. After the mass production of the uncooled infrared focal plane, this technology can effectively reduce the cost of packaging and testing of this product, and has all the functions of traditional packaging.

This solution combines and expands the achievements in related fields, introduces and integrates the most cutting-edge technology in this field, makes up for the shortcomings of some infrared focal plane packaging solutions, and realizes a more comprehensive infrared focal plane packaging solution.

Description of drawings

Fig. 1 is a structural schematic diagram of a new packaged uncooled infrared focal plane device body and cover;

Figure 2 Schematic diagram of the working principle and structure of the semiconductor refrigerator (TEC);

The manufacturing process flow diagram of Fig. 3 semiconductor refrigerator;

Fig. 4 Process flow and structural illustration of infrared focal plane body packaging preparation;

Fig. 5 Process flow and structural illustration of infrared focal plane capping and packaging preparation;

Figure 6 is a structural schematic diagram of the overall seal.

Among them, 1. Focal plane array area, 2. Readout circuit, 3. Metal solder area, 4. Thin film getter, 5. Strip metal pattern, 6. Press pad, 7. Reference resistor, 8. n+ Doped area, 9, p+ doped area, 10, reflective layer metal, 11, photoresist, 12, passivation layer and other upper film systems, 13, transition layer, 14, photoresist, 15, diamond-like film, 16. Silicon substrate, 17. Diamond-like film, 18. Transition layer, 19. Metal layer, 20. Photoresist.

Detailed ways

The present invention will be further described below in conjunction with accompanying drawing:

First, there is a schematic diagram of the structure of the uncooled infrared focal plane as shown in Figure 1(a). There are M×N units in the focal plane array area, the focal plane array area 1 is located below, and the readout circuit area 2 is located above, and the strip metal 5 pattern Located near the inner side of the frame, the pressure pad 6 is between the metal pattern and the edge. Most of the focal planes are shown in the figure, and reference resistors 7 are distributed on both sides for comparison of the resistance value of the differential signal. Figure 1(b) shows the distribution of the cover. Inside the edge of the cover is a metal solder area 3 covered with a film-like getter 4. The getter will be activated when the temperature reaches a certain level. Note that when the cover is closed, the coverage area of the getter cannot coincide with the focal plane array area, otherwise, the infrared will not be able to pass through the cover to reach the focal plane. The principle and process of the main body, the cover, and the overall sealing process will be described below.

(1), bulk preparation

The preparation of the body is the most critical and complicated part of the process. In the field of packaging, it mainly includes three aspects: the semiconductor refrigerator, the negative temperature coefficient sensor, and the preparation of the welded metal frame.

The semiconductor cooler is an integral part of the infrared focal plane, and its main function is to keep the temperature of the focal plane stable and the temperature distribution uniform. Its basic principle is to use the Peltier effect in semiconductors, as shown in Figure 2, that is, to weld an N-type and P-type semiconductor particles with a metal connecting piece to form a galvanic pair. When the direct current flows from the N pole to the P pole, the upper end of the two will absorb heat, which is called the cold end, and the lower end will generate heat release, which is called the hot end. If the direction of the current is reversed, the hot and cold ends will switch to each other.

In VPOW, the process flow is shown in Figure 3, 1 in the figure represents the heavily doped region with N characteristics, 2 represents the heavily doped region with P characteristics, 10 represents metal aluminum in the reflective layer, 11 represents the photoresist layer, and 12 the passivation layer Wait for the upper film system, 6 focal planes are displayed. First, the surface of the silicon substrate is heavily doped 2 with P characteristics and heavily doped 8 with N characteristics, and the doped area is approximately larger than the area of the focal plane array. Then, use the reflective layer metal aluminum 10 of the focal plane itself as an electrode to realize two-stage connection of P and N. The reflective layer mainly adopts the sputtering process of metal aluminum, and the reflective layer is used as the bottom of the reflective cavity for infrared signals, which is conducive to infrared signal absorption. . Afterwards, a photoresist 11 is laid on it, and the metal connection is cut off according to the position shown in FIG. 3( d ) by photolithography, thereby forming a complete semiconductor refrigerator. This process does not affect the preparation process of the back-end focal plane, and subsequent processes can be developed on this basis.

The negative temperature coefficient sensor, that is, the NTC part, can be completed by a standard reference resistor, as shown in Figure 1(a), the reference resistor is distributed at both ends of the focal plane array area, and the resistance will change with temperature, and the resistance value will become smaller , and at room temperature, the linearity of resistance change is good, which is an ideal NTC. This process only needs to lead separately in the process, and it can be led out by bonding.

The manufacturing process of the metal frame adopts relatively common sputtering, photolithography, and wet etching processes, and its process flow is shown in Figure 4. In FIG. 4, 8 represents the n+ doped region, 9 represents the p+ doped region, 10 represents the reflective layer and passivation layer, etc., 13 represents the transition layer, 11 represents the metal layer, and 14 photoresist. First, nickel-cadmium is used as a primer on the upper layer, sputtered with 500 Angstroms, and then 2um aluminum is sputtered, and then developed by standard photolithography process, wet-etched, and the metal frame pattern is prepared.

(2), capping preparation

The preparation of the cover is similar to that of the metal frame of the body, and its process flow is shown in Figure 5. In Fig. 5, 15 represents a diamond-like film, 16 represents a silicon substrate, 17 represents a diamond-like film, 18 represents a transition layer, 19 represents a metal layer, 20 represents a photoresist, 3 represents a metal solder, and 4 represents a thin film getter. First, a diamond-like film is coated on both sides of the silicon substrate. The main function of the diamond-like film is to increase the strength of the silicon wafer. It adopts the method of graphite sputtering, and the thickness is 1um. Then, the transition layer is still prepared by nickel-cadmium sputtering, and the thickness of nickel-cadmium is still 500 angstroms. On this basis, 2um metal aluminum is sputtered, and then the metal frame is obtained through the same method as the preparation method of the metal frame of the body. The next critical step is the coating of indium tin solder. Indium tin solder has good air tightness and low melting point, which is suitable for welding between thinner metal coatings. The coating of indium tin solder adopts the method of molten solder injection, and the injection process is completed under nitrogen environment, so as to ensure that the solder will not be oxidized during the process of injecting the solder into the metal in the molten state.

After the preparation of the above process, the cap needs to carry out the last two processes, namely the preparation of the getter (getter). The getter is activated in a vacuum environment. After activation, it can continuously inhale in the vacuum cavity to balance The problem of shortened vacuum life caused by the release of gas molecules and micro cracks caused by localized solder aging. The film getter is made of zirconium-vanadium-iron alloy powder sintered at a high temperature of 500 degrees Celsius, and the alloy powder is evenly coated with a thickness of 50um. Finally, the evaporation antireflection film is left. The double-sided evaporation of the antireflection film is made of zinc sulfide. The temperature is generally controlled between 200 and 300 degrees Celsius. According to the quarter-wavelength principle of antireflection, the thickness is about 2 ~ Between 3um, the specific thickness is determined by the selected transmittance peak. Composite film system design can also be used to complete the process. So far, the preparation of the cover has been completed.

(3), integral seal

After the preparation of the body and the cover is completed, it enters the overall sealing process, as shown in Figure 6. In Figure 6, 1 represents the anti-reflection coating. This process requires attention to environmental control and alignment. First put all the parts that need to be sealed into the vacuum chamber, the vacuum degree is generally 1E10-5Pa. After the clamping and alignment are completed, heat through the upper and lower heating plates, and the heating temperature is controlled at 200 degrees. After heating for 5 minutes, the solder has basically melted, and the upper top is pressed down to realize the butt joint. The temperature of the top port is controlled at 250 degrees Celsius, the getter is activated, and the pressing time is about ten minutes so that the solder can be completely moistened. Finally, the heating is stopped, and the annealing time is controlled at 120 minutes, that is, the entire packaging process is completed.

The specific embodiment of the present invention below:

Example 1

An uncooled infrared focal plane device, consisting of 320×240 uncooled infrared focal plane units, each uncooled infrared focal plane unit is 50um×50um in size, the array area is 16mm×12mm in size, and the integrated readout circuit is 22mm in size ×25mm, the readout method is the column gating method. Prepare 241 thermistors in the production, P, N injection according to 4mm × 16mm, and 8mm × 16mm specifications and connected with aluminum layer, the metal pattern is concentric with the chip, the size is 18mm × 20mm. The cover area is 20mm×22mm.

Example 2

An uncooled infrared focal plane device, consisting of 640×480 uncooled infrared focal plane units, each uncooled infrared focal plane unit is 15um×15um in size, the array area size is 9.6mm×7.2mm, integrated readout The size of the circuit is 15mm×18mm, and the readout method is the row strobe method. Prepare 641 thermistors in production, P, N injection according to 3.2mm×7.2mm, and 6.4mm×7.2mm specifications and connect with aluminum layer, the middle gap is 50um, the metal pattern is concentric with the chip, and the size is 12mm×13mm. The cover size is 13mm×16mm.

According to the structure of the uncooled infrared focal plane unit, the materials and sizes of the various components can be combined into many similar implementations, which will not be described in detail here.

Claims (4)

1. the packaging system of a device of non-refrigerated infrared focal plane array is characterized in that, comprises body and capping, described body and capping cooperating, and both are packaged as a whole through heating to compress in vacuum chamber, wherein:

1. body comprises first substrate, be provided with the heavily doped region of P, N characteristic on the surface of substrate, in the middle of substrate, be provided with the strip metal frame, top in the strip metal frame region is provided with the sensing circuit zone, the below is provided with the focal plane array column region, and the heavily doped region area is greater than the focal plane array column region, and the focal plane array column region has M * N unit, between strip metal figure and edges of substrate, be provided with some bond pad, be provided with some reference resistance at the focal plane array column region;

2. capping comprises second substrate, all is provided with diamond-film-like in the both sides of second substrate, either side be provided with body in the corresponding capping metal edge frame of strip metal frame, and the capping metal edge frame is provided with brazing metal.

2. the packaging system of device of non-refrigerated infrared focal plane array according to claim 1, it is characterized in that, the described side that is provided with metal edge frame that is sealed on is provided with the film like getter, and this film like getter is worked as temperature and is heated to a certain degree and will be activated.

3. the packaging system of device of non-refrigerated infrared focal plane array according to claim 1 is characterized in that, described brazing metal is the indium tin solder.

4. the packaging technology of a device of non-refrigerated infrared focal plane array is characterized in that, may further comprise the steps:

1. prepare body:

The preparation of a, semiconductor cooler: the heavily doped region for preparing P, N characteristic in first surface of silicon, this heavily doped region area is greater than the focal plane array column region, utilize the reflection horizon metal of focal plane arrays (FPA) itself to do electrode then, realize that P, N the two poles of the earth connect, adopting photoetching process to cut off the connection of reflection horizon metal, form a complete semiconductor cooler in the position of corresponding focal plane arrays (FPA) edges of regions;

The preparation of b, negative temperature coefficient sensor: in making the focal plane device process, draw two inferior solder joints;

The preparation of c, metal edge frame: behind precipitation reflection horizon, a side that has prepared semiconductor cooler on the silicon substrate and passivation layer, at preparation one deck transition bed, preparation layer of metal layer on transition bed, prepare a shaped as frame photoresist in the zone between focal plane array column region, sensing circuit zone and silicon substrate edge then, sacrifice transition bed and metal level except that the photoresist position is set afterwards, removing photoresist, form metal edge frame, the thickness of metal edge frame is greater than the thickness of focal plane arrays (FPA)

The setting of d, bond pad: several bond pad are set in position between metal edge frame and silicon substrate edge;

2. prepare capping:

The preparation of a, capping metal edge frame: select and the second corresponding silicon substrate of first silicon substrate size, at silicon substrate two sides coating diamond-like film, once prepare transition bed and metal level then, on metal level, be provided with and the corresponding photoresist of base metal frame, sacrifice then to remove the metal level of photoresist with external position is set, remove photoresist again, form the capping metal edge frame, and brazing metal is set on metal edge frame;

The preparation of b, getter: prepare the film getter at the capping metal edge frame, this film getter that the position is set is not corresponding with the focal plane array column region;

The preparation of c, anti-reflection film: the both sides in capping prepare anti-reflection film, and this anti-reflection film is the cover film getter not;

3. integral sealing:

At first vacuum chamber is put in the body and the capping that prepare, body and capping are clamped along metal edge frame, heat by heating plate up and down brazing metal is melted, and activate the film getter, finish encapsulation process.

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